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History log of /src/sys/arch/powerpc/include/booke/pmap.h
RevisionDateAuthorComments
 1.25  28-Sep-2023  skrll #define<space> -> #define<tab> for consistency
 1.24  20-Dec-2020  skrll Support __HAVE_PMAP_PV_TRACK in sys/uvm/pmap based pmaps (aka common pmap)
 1.23  07-Aug-2020  skrll branches: 1.23.2;
Provide a pmap_segtab_deactivate for symmetry with pmap_segtab_activate
and use it in pmap_deactivate

Call pmap_md_xtab_{,de}activate from pmap_segtab_{,de}activate to be used
for PMAP_HWPAGEWALKER and any caches ops that might be required.

Provide empty (for now) pmap_md_xtab_{,de}activate functions on the
platforms that use sys/uvm/pmap
 1.22  06-Jul-2020  rin Style and cosmetic changes. No binary changes intended.
 1.21  08-Apr-2020  skrll Simplify #ifdefs
 1.20  12-Mar-2020  thorpej If we're going to consult the MULTIPROCESSOR option, we should pull in
"opt_multiprocessor.h".
 1.19  11-Mar-2020  thorpej With DEBUG defined, it's possible to execute a TLB-vs-segmap consistency
check from a (soft) interrupt handler. But if a platform does not otherwise
require the pmap_tlb_miss_lock, then where will be a brief window of
inconsistency that, while harmless, will still fire an assertion in the
consistency check.

Fix this with the following changes:
1- Refactor the pmap_tlb_miss_lock into MI code and rename it from
pmap_tlb_miss_lock_{enter,exit}() to pmap_tlb_miss_lock_{enter,exit}().
MD code can still define the "md" hooks as necessary, and if so, will
override the common implementation.
2- Provde a pmap_bootstrap_common() function to perform common pmap bootstrap
operations, namely initializing the pmap_tlb_miss_lock if it's needed.
If MD code overrides the implementation, it's responsible for initializing
its own lock.
3- Call pmap_bootstrap_common() from the mips, powerpc booke, and riscv
pmap_bootstrap() routines. (This required adding one for riscv.)
4- Switch powerpc booke to the common pmap_tlb_miss_lock.
5- Enable pmap_tlb_miss_lock if DEBUG is defined, even if it's not otherwise
required.

PR port-mips/55062 (Failed assertion in pmap_md_tlb_check_entry())
 1.18  19-Apr-2018  christos branches: 1.18.2;
s/static inline/static __inline/g for consistency.
 1.17  24-Dec-2016  cherry branches: 1.17.14;
Tell mpc85xx about uvm_hotplug(9)

Should fix the evbppc build breakage.
 1.16  11-Jul-2016  matt branches: 1.16.2;
Adapt to common pmap changes.
 1.15  26-Jan-2015  nonaka Avoid race condition between PTE update and TLB miss walk.
 1.14  03-Apr-2014  matt branches: 1.14.6;
Add PMAP_TLB_FLUSH_ASID_ON_RESET define
 1.13  18-Mar-2014  riastradh Merge riastradh-drm2 to HEAD.
 1.12  17-Jul-2013  matt kcpuset_t changes for the pmap and removal of __cpuset_t
 1.11  02-Oct-2012  christos branches: 1.11.2; 1.11.8;
move common tlb stuff to uvm
 1.10  09-Jul-2012  matt branches: 1.10.2;
Use pmap_segtab_t
 1.9  29-Mar-2012  matt Add vsize_t to pmap_md_{un,}map_poolpage.
Add pmap_kvptefill prototype.
Slightly change pmap_bootstrap prototype.
 1.8  30-Jun-2011  matt branches: 1.8.2; 1.8.6; 1.8.8;
Modify mapiodev to take a third argument indicating whether the space
should be prefetchable (true) or not (false).
 1.7  23-Jun-2011  matt Move some MD parts back to the booke pmap.c. Cleanup initialization a bit.
 1.6  20-Jun-2011  matt PowerPC now exports a common view of cpu.h, vmparam.h and pmap.h
when building a MODULAR kernel or compiling _MODULE.
It should be noted that MODULAR or _MODULE export a view of the kernel
as being MULTIPROCESSOR (even if isn't).
The shared pmap TLB uses mdpg in places where it used mdpg to avoid
deadly embrance inclusion problems.
 1.5  05-Jun-2011  matt Remove <machine/atomic.h>; use <sys/atomic.h> instead.
Add <powerpc/cpuset.h> (for mpc85xx pmap).
Add some initial MP code for mpc85xx
Rework ipi code to be common across all ppcs
Change PPC to keep curlwp in %r13 while in the kernel.
Move astpending from cpu_info to mdlwp
Improve cpu_need_resched to be more MP friendly.
 1.4  17-Feb-2011  matt branches: 1.4.2; 1.4.4;
Use _PMAP_PRIVATE to control the inclusion of <powerpc/booke/cpuvar.h>.
This prevents most of the MI files from depending on it.
 1.3  08-Feb-2011  matt BookE needs PMAP_NEEDS_PROCWR (for ptrace breakpoints)
 1.2  18-Jan-2011  matt branches: 1.2.2;
Add support for BookE Freescale MPC85xx (e500 core) processors.
Add fast softint support for PowerPC (though only booke uses it).
Redo FPU/VEC support and add e500 SPE support.
Rework trap/intrs to use a common trapframe format.
Support SOFTFLOAT (no hardfloat or fpu emulation) for BookE.
 1.1  07-Jan-2011  matt branches: 1.1.2; 1.1.4;
file pmap.h was initially added on branch matt-nb5-pq3.
 1.1.4.1  06-Jun-2011  jruoho Sync with HEAD.
 1.1.2.2  14-Oct-2011  matt Sync with current pulling P2020 and other newer processor support.
 1.1.2.1  07-Jan-2011  matt Add mpc85xx support for netbsd-5 (with some incompatible kernel changes).
 1.2.2.2  05-Mar-2011  bouyer Sync with HEAD
 1.2.2.1  08-Feb-2011  bouyer Sync with HEAD
 1.4.4.1  23-Jun-2011  cherry Catchup with rmind-uvmplock merge.
 1.4.2.3  12-Jun-2011  rmind sync with head
 1.4.2.2  05-Mar-2011  rmind sync with head
 1.4.2.1  17-Feb-2011  rmind file pmap.h was added on branch rmind-uvmplock on 2011-03-05 20:51:37 +0000
 1.8.8.1  09-May-2012  riz Pull up following revision(s) (requested by matt in ticket #241):
sys/arch/powerpc/conf/kern-mb.ldscript: revision 1.1
sys/arch/powerpc/include/booke/pmap.h: revision 1.9
sys/arch/powerpc/booke/e500_tlb.c: revision 1.8
sys/arch/powerpc/conf/files.powerpc: revision 1.83
sys/arch/powerpc/booke/booke_pmap.c: revision 1.13
sys/arch/powerpc/include/booke/e500var.h: revision 1.5
sys/arch/evbppc/mpc85xx/machdep.c: revision 1.23
Add ldscript which aligns .data to a 1MB boundary. (used for testing)
Add PMAP_MINIMALTLB defflag
Add vsize_t to pmap_md_{un,}map_poolpage.
Add pmap_kvptefill prototype.
Slightly change pmap_bootstrap prototype.
Add e500_tlb_minimize prototype.
Add support PMAP_MINIMALTLB option. This changes the default use of TLB1
entries to map all of physical memory to using two TLB1 entries, one for
mapping text and one for data. The rest of memory is mapped using the
page table which is updated as needed. This is used to trap memory
corruption issues.
Add support for PMAP_MINIMALTLB.
 1.8.6.1  05-Apr-2012  mrg sync to latest -current.
 1.8.2.3  22-May-2014  yamt sync with head.

for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.

this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
 1.8.2.2  30-Oct-2012  yamt sync with head
 1.8.2.1  17-Apr-2012  yamt sync with head
 1.10.2.3  03-Dec-2017  jdolecek update from HEAD
 1.10.2.2  20-Aug-2014  tls Rebase to HEAD as of a few days ago.
 1.10.2.1  20-Nov-2012  tls Resync to 2012-11-19 00:00:00 UTC
 1.11.8.1  23-Jul-2013  riastradh sync with HEAD
 1.11.2.2  18-May-2014  rmind sync with head
 1.11.2.1  28-Aug-2013  rmind sync with head
 1.14.6.3  05-Feb-2017  skrll Sync with HEAD
 1.14.6.2  05-Oct-2016  skrll Sync with HEAD
 1.14.6.1  06-Apr-2015  skrll Sync with HEAD
 1.16.2.1  07-Jan-2017  pgoyette Sync with HEAD. (Note that most of these changes are simply $NetBSD$
tag issues.)
 1.17.14.1  22-Apr-2018  pgoyette Sync with HEAD
 1.18.2.2  13-Apr-2020  martin Mostly merge changes from HEAD upto 20200411
 1.18.2.1  08-Apr-2020  martin Merge changes from current as of 20200406
 1.23.2.1  03-Jan-2021  thorpej Sync w/ HEAD.

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