History log of /src/sys/arch/powerpc/include/oea |
Revision | Date | Author | Comments |
1.2 | 25-Feb-2010 |
matt | Split <powerpc/spr.h> into a common <powerpc/spr.h> and <powerpc/XXX/spr.h> where XXX is ibm4xx or oea.
|
1.1 | 03-Feb-2003 |
matt | branches: 1.1.108; 1.1.128; 1.1.132; Rename PPC_MPC6XX to PPC_OEA (and any mpc6xx reference to oea).
|
1.1.132.1 | 07-Jan-2011 |
matt | Add spr.h
|
1.1.128.1 | 30-Apr-2010 |
uebayasi | Sync with HEAD.
|
1.1.108.1 | 11-Mar-2010 |
yamt | sync with head
|
1.20 | 06-Jul-2020 |
rin | Include missing opt_ppcarch.h.
|
1.19 | 06-Jul-2020 |
rin | Style and cosmetic changes. No binary changes intended.
|
1.18 | 06-Jul-2014 |
mrg | make sure struct bat is aligned to 8 bytes as we shift them 3 bits.
fixes PReP lossage as reported on port-powerpc and port-prep. thanks to makoto@ki.nu and kiyohara@netbsd.
|
1.17 | 15-Feb-2012 |
macallan | branches: 1.17.6; 1.17.20; make BATs >256MB work, now macppc works again on 745x CPUs as well ok riz
|
1.16 | 15-Feb-2012 |
matt | When making BATU, use (BAT_XBL|BAT_BL) for the extended bat lengths.
|
1.15 | 01-Feb-2012 |
matt | Enable XBSEN and HIGHBAT for OEA 7455 and related CPUs. The BAT entries now have a resolution of 8MB. (Adjacent entries are merged up to a total of 2GB per entry).
|
1.14 | 20-Jun-2011 |
matt | branches: 1.14.2; 1.14.6; Include <powerpc/psl.h>
|
1.13 | 21-Jul-2009 |
nisimura | branches: 1.13.10; protect C constructs from assembler source inclusion.
|
1.12 | 28-Apr-2008 |
martin | branches: 1.12.22; Remove clause 3 and 4 from TNF licenses
|
1.11 | 23-Feb-2008 |
matt | branches: 1.11.2; 1.11.4; Add BAT_VA2IDX to abstract out the va to index calculation.
|
1.10 | 23-Feb-2008 |
matt | Add BAT_WIMG and some XBL aware BAT_BL_{512,1G,2G,4G} macros.
|
1.9 | 05-Feb-2008 |
garbled | branches: 1.9.2; 1.9.6; Rewrite a big chunk of the pmap and locore code for powerpc to better deal with the 64bit bridge mode. pmap changes by Matt Thomas, rest by myself.
Change pmap.c to work similar to exec_elf.c to allow us to compile in multiple pmaps to a single kernel. This allows the pmap for bridge64 to co-exist with the 32bit pmap.
Yank __HAVE_PMAP_PHYSSEG from all the oea code.
Add a new global, "oeacpufeat", which is used early in locore to determine certain cpu features. This allows us to conditionalize code early in the boot for certain CPUs that have special needs.
Yank most of the ifdef PPC_OEA_BRIDGE64 code from almost every file it was found in. Some of it seemed incorrect, and my 7044 booted just fine without it. It would appear that the bridge cpus treat BAT instructions as nops, so they seem to be safe.
In ofppc, check the oeacpufeat, and if we are on a 64bit proc, clear MSR[SF], and ASR[V].
With all of these changes, a kernel with both PPC_OEA and PPC_OEA_BRIDGE64 will boot on the POWERIII-2 cpu. However, it will not yet boot on a 32bit cpu, because of CACHELINESIZE. Work remains to be done there to fix that.
|
1.8 | 05-Aug-2006 |
sanjayl | branches: 1.8.34; 1.8.40; 1st cut of Powermac G5 support (uses bridge mode).
|
1.7 | 11-Dec-2005 |
christos | branches: 1.7.4; 1.7.8; merge ktrace-lwp.
|
1.6 | 21-Jan-2005 |
matt | branches: 1.6.8; Add extended BAT block size definitions.
|
1.5 | 14-Mar-2003 |
matt | branches: 1.5.2; 1.5.10; Add _LOCORE protection.
|
1.4 | 06-Feb-2003 |
matt | Add oea_iobat_remove(paddr_t).
|
1.3 | 05-Feb-2003 |
matt | Make _LP64 friendly.
|
1.2 | 05-Feb-2003 |
matt | Make things a bit more LP64 friendly.
|
1.1 | 03-Feb-2003 |
matt | Rename PPC_MPC6XX to PPC_OEA (and any mpc6xx reference to oea).
|
1.5.10.1 | 29-Apr-2005 |
kent | sync with -current
|
1.5.2.1 | 24-Jan-2005 |
skrll | Sync with HEAD.
|
1.6.8.3 | 27-Feb-2008 |
yamt | sync with head.
|
1.6.8.2 | 11-Feb-2008 |
yamt | sync with head.
|
1.6.8.1 | 30-Dec-2006 |
yamt | sync with head.
|
1.7.8.1 | 11-Aug-2006 |
yamt | sync with head
|
1.7.4.1 | 09-Sep-2006 |
rpaulo | sync with head
|
1.8.40.1 | 18-Feb-2008 |
mjf | Sync with HEAD.
|
1.8.34.1 | 23-Mar-2008 |
matt | sync with HEAD
|
1.9.6.2 | 02-Jun-2008 |
mjf | Sync with HEAD.
|
1.9.6.1 | 03-Apr-2008 |
mjf | Sync with HEAD.
|
1.9.2.1 | 24-Mar-2008 |
keiichi | sync with head.
|
1.11.4.2 | 19-Aug-2009 |
yamt | sync with head.
|
1.11.4.1 | 16-May-2008 |
yamt | sync with head.
|
1.11.2.1 | 18-May-2008 |
yamt | sync with head.
|
1.12.22.1 | 26-Jan-2011 |
matt | Change battable to have a granularity of 8MB.
|
1.13.10.1 | 23-Jun-2011 |
cherry | Catchup with rmind-uvmplock merge.
|
1.14.6.1 | 18-Feb-2012 |
mrg | merge to -current.
|
1.14.2.1 | 17-Apr-2012 |
yamt | sync with head
|
1.17.20.1 | 10-Aug-2014 |
tls | Rebase.
|
1.17.6.1 | 20-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
1.6 | 26-Feb-2021 |
thorpej | Split cpu_model_init() into cpu_features_probe() and cpu_features_enable() so that early bootstrap can do those two steps independently, if needed.
Continue to provide a cpu_model_init() wrapper for now.
|
1.5 | 22-Mar-2018 |
macallan | branches: 1.5.14; provide a wrapper for mapiodev() - if we have BATs just use the paddr, if we don't then actually map it
|
1.4 | 28-Apr-2008 |
martin | branches: 1.4.86; Remove clause 3 and 4 from TNF licenses
|
1.3 | 23-Feb-2008 |
matt | branches: 1.3.2; 1.3.4; 1.3.6; Add a XBSEN flag for large BATs
|
1.2 | 14-Feb-2008 |
matt | branches: 1.2.2; 1.2.4; 1.2.8; Add multiple inclusion protection. add oeacpufeat.
|
1.1 | 05-Feb-2008 |
garbled | branches: 1.1.2; Rewrite a big chunk of the pmap and locore code for powerpc to better deal with the 64bit bridge mode. pmap changes by Matt Thomas, rest by myself.
Change pmap.c to work similar to exec_elf.c to allow us to compile in multiple pmaps to a single kernel. This allows the pmap for bridge64 to co-exist with the 32bit pmap.
Yank __HAVE_PMAP_PHYSSEG from all the oea code.
Add a new global, "oeacpufeat", which is used early in locore to determine certain cpu features. This allows us to conditionalize code early in the boot for certain CPUs that have special needs.
Yank most of the ifdef PPC_OEA_BRIDGE64 code from almost every file it was found in. Some of it seemed incorrect, and my 7044 booted just fine without it. It would appear that the bridge cpus treat BAT instructions as nops, so they seem to be safe.
In ofppc, check the oeacpufeat, and if we are on a 64bit proc, clear MSR[SF], and ASR[V].
With all of these changes, a kernel with both PPC_OEA and PPC_OEA_BRIDGE64 will boot on the POWERIII-2 cpu. However, it will not yet boot on a 32bit cpu, because of CACHELINESIZE. Work remains to be done there to fix that.
|
1.1.2.3 | 27-Feb-2008 |
yamt | sync with head.
|
1.1.2.2 | 11-Feb-2008 |
yamt | sync with head.
|
1.1.2.1 | 05-Feb-2008 |
yamt | file cpufeat.h was added on branch yamt-lazymbuf on 2008-02-11 14:59:28 +0000
|
1.2.8.2 | 02-Jun-2008 |
mjf | Sync with HEAD.
|
1.2.8.1 | 03-Apr-2008 |
mjf | Sync with HEAD.
|
1.2.4.1 | 24-Mar-2008 |
keiichi | sync with head.
|
1.2.2.2 | 18-Feb-2008 |
mjf | Sync with HEAD.
|
1.2.2.1 | 14-Feb-2008 |
mjf | file cpufeat.h was added on branch mjf-devfs on 2008-02-18 21:04:58 +0000
|
1.3.6.1 | 16-May-2008 |
yamt | sync with head.
|
1.3.4.1 | 18-May-2008 |
yamt | sync with head.
|
1.3.2.2 | 23-Mar-2008 |
matt | sync with HEAD
|
1.3.2.1 | 23-Feb-2008 |
matt | file cpufeat.h was added on branch matt-armv6 on 2008-03-23 02:04:17 +0000
|
1.4.86.1 | 30-Mar-2018 |
pgoyette | Resolve conflicts between branch and HEAD
|
1.5.14.1 | 03-Apr-2021 |
thorpej | Sync with HEAD.
|
1.15 | 10-Mar-2024 |
rillig | powerpc/hid: fix snprintb format for HID0_970_BITMASK_U
|
1.14 | 20-Jan-2024 |
jmcneill | fix comments: HID0 ICFI/DCFI are "flash invalidate", not "flush invalidate"
|
1.13 | 06-Jul-2020 |
rin | branches: 1.13.20; Include missing opt_ppcarch.h.
|
1.12 | 16-Feb-2018 |
macallan | add a few pp970-specific bits
|
1.11 | 07-Jul-2017 |
macallan | add bits & masks for ppc970 HID0
|
1.10 | 22-Sep-2013 |
matt | branches: 1.10.6; Define HID1_{SYNCBE,ABE} for the 7450
|
1.9 | 25-May-2008 |
phx | branches: 1.9.32; 1.9.42; 1.9.48; Better call it HID0_BTCD, as in prep, mvmeppc and rs6000 locore.
|
1.8 | 25-May-2008 |
phx | Added HID0[BTAC] bit for the 604.
|
1.7 | 11-Dec-2005 |
christos | branches: 1.7.74; 1.7.76; 1.7.78; 1.7.80; merge ktrace-lwp.
|
1.6 | 21-Jan-2005 |
matt | Add some HID1 definitions and HID0_XBSEN for 7455+ processors.
|
1.5 | 21-Jan-2005 |
matt | Correct BHTCLR/XAEN definitions.
|
1.4 | 11-Jan-2005 |
chs | branches: 1.4.2; enable powersave mode on 7450 and family. also, the HID0_DOZE bit in this context doesn't mean "doze", it's actually "enable extra BATs". add an alias for this bit and use it as appropriate.
|
1.3 | 13-Feb-2004 |
wiz | Uppercase CPU, plural is CPUs.
|
1.2 | 29-Mar-2003 |
matt | branches: 1.2.2; Add 7450 LRSTK and FOLD bits.
|
1.1 | 03-Feb-2003 |
matt | Rename PPC_MPC6XX to PPC_OEA (and any mpc6xx reference to oea).
|
1.2.2.5 | 24-Jan-2005 |
skrll | Sync with HEAD.
|
1.2.2.4 | 17-Jan-2005 |
skrll | Sync with HEAD.
|
1.2.2.3 | 21-Sep-2004 |
skrll | Fix the sync with head I botched.
|
1.2.2.2 | 18-Sep-2004 |
skrll | Sync with HEAD.
|
1.2.2.1 | 03-Aug-2004 |
skrll | Sync with HEAD
|
1.4.2.1 | 29-Apr-2005 |
kent | sync with -current
|
1.7.80.1 | 23-Jun-2008 |
wrstuden | Sync w/ -current. 34 merge conflicts to follow.
|
1.7.78.1 | 04-May-2009 |
yamt | sync with head.
|
1.7.76.1 | 04-Jun-2008 |
yamt | sync with head
|
1.7.74.1 | 02-Jun-2008 |
mjf | Sync with HEAD.
|
1.9.48.1 | 18-May-2014 |
rmind | sync with head
|
1.9.42.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
1.9.42.1 | 20-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
1.9.32.1 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid a limitation of cvs. ("Protocol error: too many arguments")
|
1.10.6.1 | 28-Aug-2017 |
skrll | Sync with HEAD
|
1.13.20.1 | 03-Feb-2024 |
martin | Pull up following revision(s) (requested by jmcneill in ticket #561):
etc/etc.evbppc/Makefile.inc: revision 1.15 sys/arch/evbppc/wii/dev/wiifb.c: revision 1.1 sys/arch/evbppc/wii/dev/wiifb.c: revision 1.2 sys/arch/evbppc/wii/dev/bwdsp.c: revision 1.1 sys/arch/evbppc/wii/dev/wiifb.c: revision 1.3 sys/arch/evbppc/wii/dev/bwdsp.c: revision 1.2 distrib/utils/embedded/files/evbppc_wii_icon.png: revision 1.1 usr.sbin/sysinst/arch/evbppc/md.h: revision 1.4 sys/arch/evbppc/wii/dev/wiifb.c: revision 1.4 sys/arch/evbppc/wii/dev/viio.h: revision 1.1 sys/arch/evbppc/wii/dev/wiifb.c: revision 1.5 sys/arch/evbppc/wii/dev/mainbus.h: revision 1.1 distrib/utils/embedded/conf/wii.conf: revision 1.1 distrib/utils/embedded/conf/wii.conf: revision 1.2 distrib/utils/embedded/conf/wii.conf: revision 1.3 sys/dev/sdmmc/sdhcvar.h: revision 1.34 sys/dev/sdmmc/sdhc.c: revision 1.118 sys/arch/evbppc/wii/dev/resetbtn.c: revision 1.1 distrib/utils/embedded/conf/evbppc.conf: revision 1.1 sys/dev/wsfb/genfb.c: revision 1.91 sys/arch/evbppc/wii/dev/resetbtn.c: revision 1.2 sys/dev/wscons/wsconsio.h: revision 1.127 sys/arch/powerpc/oea/oea_machdep.c: revision 1.85 sys/arch/evbppc/wii/dev/hollywood.h: revision 1.1 sys/arch/evbppc/conf/std.wii: revision 1.1 sys/arch/evbppc/wii/dev/hollywood.h: revision 1.2 sys/arch/evbppc/wii/dev/hollywood.c: revision 1.1 sys/arch/evbppc/conf/std.wii: revision 1.2 sys/arch/evbppc/wii/dev/hollywood.c: revision 1.2 sys/arch/evbppc/conf/std.wii: revision 1.3 sys/arch/powerpc/oea/cpu_subr.c: revision 1.109 sys/arch/evbppc/wii/wii_mmuinit.S: revision 1.1 sys/dev/usb/usb.h: revision 1.124 sys/arch/evbppc/wii/machdep.c: revision 1.1 sys/arch/evbppc/wii/dev/rtcsram.c: revision 1.1 sys/arch/powerpc/include/oea/hid.h: revision 1.14 sys/arch/evbppc/wii/mainbus.c: revision 1.1 sys/arch/evbppc/wii/machdep.c: revision 1.2 sys/arch/evbppc/wii/dev/ehci_hollywood.c: revision 1.1 sys/arch/evbppc/wii/mainbus.c: revision 1.2 sys/arch/evbppc/wii/machdep.c: revision 1.3 sys/arch/evbppc/wii/dev/ehci_hollywood.c: revision 1.2 sys/arch/evbppc/wii/mainbus.c: revision 1.3 sys/arch/evbppc/wii/machdep.c: revision 1.4 sys/arch/evbppc/wii/dev/hwgpio.c: revision 1.1 sys/arch/evbppc/wii/dev/sdhc_hollywood.c: revision 1.1 sys/arch/evbppc/wii/dev/sdhc_hollywood.c: revision 1.2 sys/arch/evbppc/wii/wii_locore.S: revision 1.1 sys/arch/evbppc/conf/files.wii: revision 1.1 sys/arch/evbppc/wii/wii_locore.S: revision 1.2 sys/arch/evbppc/include/wii.h: revision 1.1 sys/arch/evbppc/conf/files.wii: revision 1.2 sys/arch/evbppc/wii/dev/exi.c: revision 1.1 sys/arch/evbppc/include/wii.h: revision 1.2 sys/arch/evbppc/conf/files.wii: revision 1.3 sys/arch/powerpc/powerpc/clock.c: revision 1.18 sys/arch/evbppc/include/wii.h: revision 1.3 sys/arch/evbppc/conf/files.wii: revision 1.4 sys/arch/evbppc/include/wii.h: revision 1.4 sys/arch/evbppc/wii/dev/exi.h: revision 1.1 sys/arch/evbppc/wii/dev/avenc.c: revision 1.1 sys/arch/evbppc/include/wii.h: revision 1.5 sys/arch/evbppc/include/wii.h: revision 1.6 sys/arch/evbppc/include/wii.h: revision 1.7 sys/arch/evbppc/wii/dev/avenc.h: revision 1.1 distrib/utils/embedded/mkimage: revision 1.79 sys/arch/evbppc/conf/WII: revision 1.1 sys/arch/evbppc/conf/INSTALL_WII: revision 1.1 distrib/utils/embedded/files/evbppc_wii_meta.xml: revision 1.1 sys/arch/evbppc/wii/dev/vireg.h: revision 1.1 sys/arch/evbppc/conf/WII: revision 1.2 distrib/utils/embedded/files/evbppc_wii_meta.xml: revision 1.2 sys/arch/evbppc/wii/dev/vireg.h: revision 1.2 sys/arch/evbppc/conf/WII: revision 1.3 sys/arch/evbppc/conf/WII: revision 1.4 usr.sbin/sysinst/arch/evbppc/md.c: revision 1.11 sys/arch/evbppc/wii/dev/ohci_hollywood.c: revision 1.1 sys/dev/usb/ehcivar.h: revision 1.52 sys/arch/evbppc/wii/pic_pi.c: revision 1.1 sys/arch/evbppc/wii/dev/ohci_hollywood.c: revision 1.2 etc/etc.evbppc/ttys: revision 1.8 sys/arch/evbppc/wii/dev/bwai.c: revision 1.1 sys/arch/evbppc/wii/dev/bwai.c: revision 1.2 sys/arch/evbppc/wii/dev/bwai.c: revision 1.3 sys/arch/evbppc/wii/autoconf.c: revision 1.1 sys/arch/evbppc/conf/Makefile.wii.inc: revision 1.1 sys/arch/evbppc/wii/dev/bwai.h: revision 1.1 sys/arch/evbppc/wii/autoconf.c: revision 1.2 sys/arch/evbppc/conf/Makefile.wii.inc: revision 1.2
powerpc: oea: Fix prefetchable mappings Prefetchable mappings need PMAP_NOCACHE to get write-combine semantics. powerpc: oea: Decode IBM750CL L2 cache information. sdmmc: add support for optional delay after register write wscons: Add HOLLYWOOD display and YUY2 pixel format types wsfb: add support for optional "devcmap" property A hardware driver can supply a pointer to a 16x 32-bit array to override the default rasops device colour map in the "devcmap" property. ehci: add EHCIF_32BIT_ACCESS flag to force 32-bit MMIO fix comments: HID0 ICFI/DCFI are "flash invalidate", not "flush invalidate" powerpc: fix delay for large (> ~5sec) values When calculating the target timebase, promote '1000' on the RHS to ULL to force 64-bit calculation, otherwise 'n * 1000' will overflow. usb: increase USB_PORT_RESET_RECOVERY from 10ms to 20ms I changed this from 250ms to 10ms back in 2021 based on a similar FreeBSD change, but it seems to be a bit too aggressive for some platforms. evbppc: Add initial support for the Nintendo Wii wii: support RB_POWERDOWN build fix: use dd with count=1 for compat with NetBSD dd(1) wii: Add NTSC 480p support. In addition to this, add VIIO_{GET,SET}REGS ioctl support to allow for poking at video interface registers from userland. This is helpful for debugging display issues. wii: Add 128x48 icon to SD card image wii: Fix a comment wii: Add drivers for Broadway DSP and Audio interface. 0: [*] audio0 @ bwdsp0: Broadway DSP playback: 16, 2ch, 48000Hz record: unavailable (P-) slinear_be 16/16, 2ch, { 48000 } wii: Add screenblank support. wii: Use screen dimming register for screen blanking. wii: Add GPIO, I2C, and basic A/V encoder driver. wii: Use A/V encoder volume controls instead of using a software filter. wii: Simply DSP driver - no interrupt handler required. wii: provide device names to intr_establish wii$ intrctl list interrupt id CPU0 device name(s) pi irq 14 64769* hollywood0 hollywood irq 36 5872* ehci0 hollywood irq 39 58907* sdhc0 hollywood irq 40 4* sdhc1 hollywood irq 49 0* resetbtn0 pi irq 5 0* bwai0 wii: Add support for passing boot options to the kernel. wii: Add External interface bus and RTC support wii: Remove objcopy after kernel build. HBC will do the right thing. Add wsvt25 entries (off by default) for ttyE0-ttyE3. Add support for "PAL" (576i) mode on Wii.
|
1.2 | 28-Apr-2008 |
martin | Remove clause 3 and 4 from TNF licenses
|
1.1 | 03-Feb-2003 |
matt | branches: 1.1.104; 1.1.106; 1.1.108; Rename PPC_MPC6XX to PPC_OEA (and any mpc6xx reference to oea).
|
1.1.108.1 | 16-May-2008 |
yamt | sync with head.
|
1.1.106.1 | 18-May-2008 |
yamt | sync with head.
|
1.1.104.1 | 02-Jun-2008 |
mjf | Sync with HEAD.
|
1.39 | 15-Dec-2023 |
rin | powerpc: oea: For OEA64_BRIDGE, 1:1 map up to 3GiB memory
As done for OEA. Note that kva over 3GiB is reserved.
Provide PMAP_MAP_POOLPAGE for OEA64_BRIDGE at the same time, by which direct-mapped memory is utilized in order to work around starvation of 512MiB kernel virtual space.
PR kern/57621
|
1.38 | 28-Sep-2023 |
skrll | Trailing whitespace.
|
1.37 | 07-May-2022 |
rin | branches: 1.37.4; Try to fix PV tracking support.
* For oea (with real PV tracking support):
Define __HAVE_PMAP_PV_TRACK. Otherwise, pmap_pv_init() is not called by uvm_init().
* For booke and ibm4xx (without PV tracking support):
For MODULAR kernel and modules, define __HAVE_PMAP_PV_TRACK together with PMAP_PV_TRACK_ONLY_STUBS, so that modules can be shared with oea.
Note that PMAP_PV_TRACK_ONLY_STUBS can be used even for oea, as a compile-time option to strip real PV tracking support.
|
1.36 | 16-Feb-2022 |
riastradh | powerpc: Implement pv-tracking for unmanaged pages.
Needed for drm.
|
1.35 | 12-Mar-2021 |
thorpej | Re-factor the code in pmap_extract() that checks the 601 I/O segment table and the BAT tables into separate functions that can be called from outside of the pmap module.
|
1.34 | 02-Mar-2021 |
thorpej | Complete the pmap symbol renaming shenanigans for pmap_bootstrap[12]().
|
1.33 | 01-Mar-2021 |
thorpej | Split pmap_bootstrap() into 2 functions: - pmap_bootstrap1(), which sets up the low-level pmap data structures. - pmap_bootstrap2(), which actually programs the MMU hardware based on pmap_bootstrap1()'s work.
pmap_bootstrap() is still provided as a wrapper around the two, but this provides flexibility to platforms that might need to do additional work between these two phases.
|
1.32 | 06-Jul-2020 |
rin | branches: 1.32.2; Include missing opt_modular.h so that struct vm_page_md is compatible to that for booke.
|
1.31 | 06-Jul-2020 |
rin | LKM was gone.
|
1.30 | 14-Mar-2020 |
ad | pmap_remove_all(): Return a boolean value to indicate the behaviour. If true, all mappings have been removed, the pmap is totally cleared out, and UVM can then avoid doing the work to call pmap_remove() for each map entry. If false, either nothing has been done, or some helpful arch-specific voodoo has taken place.
|
1.29 | 19-Apr-2018 |
christos | branches: 1.29.2; s/static inline/static __inline/g for consistency.
|
1.28 | 28-Feb-2014 |
matt | branches: 1.28.28; Add pmap_ste_spill
|
1.27 | 28-Jul-2012 |
matt | branches: 1.27.2; 1.27.4; Fix -fno-common fallout.
|
1.26 | 27-Sep-2011 |
jym | branches: 1.26.2; Modify *ASSERTMSG() so they are now used as variadic macros. The main goal is to provide routines that do as KASSERT(9) says: append a message to the panic format string when the assertion triggers, with optional arguments.
Fix call sites to reflect the new definition.
Discussed on tech-kern@. See http://mail-index.netbsd.org/tech-kern/2011/09/07/msg011427.html
|
1.25 | 30-Jun-2011 |
matt | Modify mapiodev to take a third argument indicating whether the space should be prefetchable (true) or not (false).
|
1.24 | 20-Jun-2011 |
matt | PowerPC now exports a common view of cpu.h, vmparam.h and pmap.h when building a MODULAR kernel or compiling _MODULE. It should be noted that MODULAR or _MODULE export a view of the kernel as being MULTIPROCESSOR (even if isn't). The shared pmap TLB uses mdpg in places where it used mdpg to avoid deadly embrance inclusion problems.
|
1.23 | 20-Jun-2011 |
matt | Add #error for unknown PPC variant Now that oea calls cpu_fixup_stubs, we don't need pmap_fixup_stubs.
|
1.22 | 15-Feb-2011 |
macallan | branches: 1.22.2; implement pmap_mmap_flags() and teach PowerPC's bus_space_mmap() to actually use BUS_SPACE_MAP_PREFETCHABLE which, now that /dev/pci* knows how to use it, helps improve X performance
|
1.21 | 12-Feb-2011 |
matt | When an OEA kernel is configured for multiple MMU types, use the new powerpc fixup mechanism to bind the kernel to a particular MMU. This avoids an indirect call for every pmap call.
|
1.20 | 18-Jan-2011 |
matt | branches: 1.20.2; Add support for BookE Freescale MPC85xx (e500 core) processors. Add fast softint support for PowerPC (though only booke uses it). Redo FPU/VEC support and add e500 SPE support. Rework trap/intrs to use a common trapframe format. Support SOFTFLOAT (no hardfloat or fpu emulation) for BookE.
|
1.19 | 14-Nov-2010 |
uebayasi | branches: 1.19.2; Move struct vm_page_md definition from vmparam.h to pmap.h, because it's used only by pmap. vmparam.h has definitions for wider audience.
All GENERIC kernels build tested, except ia64.
powerpc/include/booke/vmparam.h has one too, but it has no pmap.h, so it's left as is.
|
1.18 | 07-Nov-2009 |
cegger | branches: 1.18.4; Add a flags argument to pmap_kenter_pa(9). Patch showed on tech-kern@ http://mail-index.netbsd.org/tech-kern/2009/11/04/msg006434.html No objections.
|
1.17 | 21-Oct-2009 |
rmind | Remove uarea swap-out functionality:
- Addresses the issue described in PR/38828. - Some simplification in threading and sleepq subsystems. - Eliminates pmap_collect() and, as a side note, allows pmap optimisations. - Eliminates XS_CTL_DATA_ONSTACK in scsipi code. - Avoids few scans on LWP list and thus potentially long holds of proc_lock. - Cuts ~1.5k lines of code. Reduces amd64 kernel size by ~4k. - Removes __SWAP_BROKEN cases.
Tested on x86, mips, acorn32 (thanks <mpumford>) and partly tested on acorn26 (thanks to <bjh21>).
Discussed on <tech-kern>, reviewed by <ad>.
|
1.16 | 21-Apr-2009 |
cegger | change pmap flags argument from int to u_int. discussed with christos@ on source-changes-d@
|
1.15 | 28-Dec-2008 |
he | branches: 1.15.2; Wrap #include "opt_ppcarch.h" in #ifdef _KERNEL_OPT, to allow lib/librump to build for evbppc.
|
1.14 | 09-Dec-2008 |
pooka | Make pmap_kernel() a MI macro for struct pmap *kernel_pmap_ptr, which is now the "API" provided by the pmap module. pmap_kernel() remains as the syntactic sugar.
Bonus cosmetics round: move all the pmap_t pointer typedefs into uvm_pmap.h.
Thanks to Greg Oster for providing cpu muscle for doing test builds.
|
1.13 | 07-Feb-2008 |
matt | branches: 1.13.6; 1.13.10; 1.13.16; 1.13.18; 1.13.30; Cleanup/simplify #if/#endif
|
1.12 | 05-Feb-2008 |
garbled | Rewrite a big chunk of the pmap and locore code for powerpc to better deal with the 64bit bridge mode. pmap changes by Matt Thomas, rest by myself.
Change pmap.c to work similar to exec_elf.c to allow us to compile in multiple pmaps to a single kernel. This allows the pmap for bridge64 to co-exist with the 32bit pmap.
Yank __HAVE_PMAP_PHYSSEG from all the oea code.
Add a new global, "oeacpufeat", which is used early in locore to determine certain cpu features. This allows us to conditionalize code early in the boot for certain CPUs that have special needs.
Yank most of the ifdef PPC_OEA_BRIDGE64 code from almost every file it was found in. Some of it seemed incorrect, and my 7044 booted just fine without it. It would appear that the bridge cpus treat BAT instructions as nops, so they seem to be safe.
In ofppc, check the oeacpufeat, and if we are on a 64bit proc, clear MSR[SF], and ASR[V].
With all of these changes, a kernel with both PPC_OEA and PPC_OEA_BRIDGE64 will boot on the POWERIII-2 cpu. However, it will not yet boot on a 32bit cpu, because of CACHELINESIZE. Work remains to be done there to fix that.
|
1.11 | 09-Jan-2008 |
garbled | When compiling in bridge mode, add a prototype for pmap_setup_segment0_map()
|
1.10 | 21-Feb-2007 |
thorpej | branches: 1.10.22; 1.10.28; 1.10.34; Replace the Mach-derived boolean_t type with the C99 bool type. A future commit will replace use of TRUE and FALSE with true and false.
|
1.9 | 05-Aug-2006 |
sanjayl | branches: 1.9.10; 1st cut of Powermac G5 support (uses bridge mode).
|
1.8 | 24-Dec-2005 |
perry | branches: 1.8.4; 1.8.8; Remove leading __ from __(const|inline|signed|volatile) -- it is obsolete.
|
1.7 | 11-Dec-2005 |
christos | merge ktrace-lwp.
|
1.6 | 21-Nov-2003 |
matt | branches: 1.6.16; More PPC64 changes. (latent for now).
|
1.5 | 24-Aug-2003 |
chs | add support for non-executable mappings (where the hardware allows this) and make the stack and heap non-executable by default. the changes fall into two basic catagories:
- pmap and trap-handler changes. these are all MD: = alpha: we already track per-page execute permission with the (software) PG_EXEC bit, so just have the trap handler pay attention to it. = i386: use a new GDT segment for %cs for processes that have no executable mappings above a certain threshold (currently the bottom of the stack). track per-page execute permission with the last unused PTE bit. = powerpc/ibm4xx: just use the hardware exec bit. = powerpc/oea: we already track per-page exec bits, but the hardware only implements non-exec mappings at the segment level. so track the number of executable mappings in each segment and turn on the no-exec segment bit iff the count is 0. adjust the trap handler to deal. = sparc (sun4m): fix our use of the hardware protection bits. fix the trap handler to recognize text faults. = sparc64: split the existing unified TSB into data and instruction TSBs, and only load TTEs into the appropriate TSB(s) for the permissions. fix the trap handler to check for execute permission. = not yet implemented: amd64, hppa, sh5
- changes in all the emulations that put a signal trampoline on the stack. instead, we now put the trampoline into a uvm_aobj and map that into the process separately.
originally from openbsd, adapted for netbsd by me.
|
1.4 | 09-Apr-2003 |
matt | branches: 1.4.2; Add POOL_VTOPHYS. Change vtophys to return -1 if pmap_extract fails. (callers of vtophys should always supply a valid VA so that pmap_extract should never fail).
|
1.3 | 15-Mar-2003 |
matt | Make lint happy.
|
1.2 | 05-Feb-2003 |
matt | Make things a bit more LP64 friendly.
|
1.1 | 03-Feb-2003 |
matt | Rename PPC_MPC6XX to PPC_OEA (and any mpc6xx reference to oea).
|
1.4.2.3 | 21-Sep-2004 |
skrll | Fix the sync with head I botched.
|
1.4.2.2 | 18-Sep-2004 |
skrll | Sync with HEAD.
|
1.4.2.1 | 03-Aug-2004 |
skrll | Sync with HEAD
|
1.6.16.5 | 11-Feb-2008 |
yamt | sync with head.
|
1.6.16.4 | 21-Jan-2008 |
yamt | sync with head
|
1.6.16.3 | 26-Feb-2007 |
yamt | sync with head.
|
1.6.16.2 | 30-Dec-2006 |
yamt | sync with head.
|
1.6.16.1 | 21-Jun-2006 |
yamt | sync with head.
|
1.8.8.1 | 11-Aug-2006 |
yamt | sync with head
|
1.8.4.1 | 09-Sep-2006 |
rpaulo | sync with head
|
1.9.10.1 | 27-Feb-2007 |
yamt | - sync with head. - move sched_changepri back to kern_synch.c as it doesn't know PPQ anymore.
|
1.10.34.1 | 10-Jan-2008 |
bouyer | Sync with HEAD
|
1.10.28.1 | 18-Feb-2008 |
mjf | Sync with HEAD.
|
1.10.22.1 | 23-Mar-2008 |
matt | sync with HEAD
|
1.13.30.1 | 07-Jan-2011 |
matt | PMAP_NC -> PMAP_NOCACHE.
|
1.13.18.2 | 28-Apr-2009 |
skrll | Sync with HEAD.
|
1.13.18.1 | 19-Jan-2009 |
skrll | Sync with HEAD.
|
1.13.16.1 | 13-Dec-2008 |
haad | Update haad-dm branch to haad-dm-base2.
|
1.13.10.2 | 11-Mar-2010 |
yamt | sync with head
|
1.13.10.1 | 04-May-2009 |
yamt | sync with head.
|
1.13.6.1 | 17-Jan-2009 |
mjf | Sync with HEAD.
|
1.15.2.1 | 13-May-2009 |
jym | Sync with HEAD.
Commit is split, to avoid a "too many arguments" protocol error.
|
1.18.4.1 | 05-Mar-2011 |
rmind | sync with head
|
1.19.2.1 | 06-Jun-2011 |
jruoho | Sync with HEAD.
|
1.20.2.1 | 17-Feb-2011 |
bouyer | Sync with HEAD
|
1.22.2.1 | 23-Jun-2011 |
cherry | Catchup with rmind-uvmplock merge.
|
1.26.2.2 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid a limitation of cvs. ("Protocol error: too many arguments")
|
1.26.2.1 | 30-Oct-2012 |
yamt | sync with head
|
1.27.4.1 | 18-May-2014 |
rmind | sync with head
|
1.27.2.1 | 20-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
1.28.28.1 | 22-Apr-2018 |
pgoyette | Sync with HEAD
|
1.29.2.1 | 08-Apr-2020 |
martin | Merge changes from current as of 20200406
|
1.32.2.1 | 03-Apr-2021 |
thorpej | Sync with HEAD.
|
1.37.4.1 | 29-Dec-2023 |
martin | Additionally pull up following revision(s) (requested by rin in ticket #400):
sys/arch/powerpc/include/oea/pmap.h: revision 1.39 sys/arch/powerpc/include/pmap.h: revision 1.43 sys/arch/powerpc/oea/pmap_kernel.c: revision 1.14 sys/arch/powerpc/oea/pmap.c: revision 1.117 sys/arch/powerpc/oea/pmap.c: revision 1.118 sys/arch/powerpc/oea/pmap.c: revision 1.119 sys/arch/powerpc/include/vmparam.h: revision 1.27 sys/arch/powerpc/powerpc/trap.c: revision 1.165 sys/arch/powerpc/oea/pmap.c: revision 1.120 sys/arch/powerpc/oea/pmap.c: revision 1.121 sys/arch/powerpc/powerpc/vm_machdep.c: revision 1.106 sys/arch/powerpc/powerpc/bus_dma.c: revision 1.56
powerpc/oea: trap: pmap_{pte,ste}_spill() even in the interrupt context
Page table for oea is something like L2 TLB on memory; kernel and processes share its entries, and process entries can be spilled out.
As done for MMU based on software-managed TLB, we need to restore such entries even in the interrupt context.
Note that pmap_pte_spill() require no resouce to restore entries. Still-not-implemented pmap_ste_spill() for OEA64 should also. Part of PR kern/57621
powerpc/oea: pmap: Drop unused argument for pmap_pvo_reclaim(), NFC Part of PR kern/57621
powerpc/oea: pmap: Rework pmap_pte_spill()
It was broken in many ways... Now, it gets working stable both for OEA and OEA64_BRIDGE, as far as I can see. Part of PR kern/57621
powerpc/oea: pmap: Fix mostly-pointless overhead of pmap_pvo_pool (1) Drop __aligned(32) from struct pvo_entry; otherwise, sizeof(struct pvo_entry) is round-up'ed to a multiple of 32. (2) Do not set sizeof(struct pvo_entry) to `align` argument for pool_init(9); it must be power of 2. (3) Align pvo_entry to 32-byte boundary only if reasonably possible, i.e., OEA without DIAGNOSTIC (--> POOL_REDZONE) for now. Part of PR kern/57621
powerpc/oea: pmap_create: Use PR_ZERO and drop memset(9), NFC Part of PR kern/57621
powerpc: oea: For OEA64_BRIDGE, 1:1 map up to 3GiB memory As done for OEA. Note that kva over 3GiB is reserved.
Provide PMAP_MAP_POOLPAGE for OEA64_BRIDGE at the same time, by which direct-mapped memory is utilized in order to work around starvation of 512MiB kernel virtual space. PR kern/57621
powerpc: Make sure direct-mapped buffer fits within correct range
For OEA and OEA64_BRIDGE, only first 3GiB memory is direct-mapped. Part of PR kern/57621
|
1.10 | 06-Jul-2020 |
rin | Fix comments. No binary changes.
|
1.9 | 05-Feb-2008 |
garbled | Rewrite a big chunk of the pmap and locore code for powerpc to better deal with the 64bit bridge mode. pmap changes by Matt Thomas, rest by myself.
Change pmap.c to work similar to exec_elf.c to allow us to compile in multiple pmaps to a single kernel. This allows the pmap for bridge64 to co-exist with the 32bit pmap.
Yank __HAVE_PMAP_PHYSSEG from all the oea code.
Add a new global, "oeacpufeat", which is used early in locore to determine certain cpu features. This allows us to conditionalize code early in the boot for certain CPUs that have special needs.
Yank most of the ifdef PPC_OEA_BRIDGE64 code from almost every file it was found in. Some of it seemed incorrect, and my 7044 booted just fine without it. It would appear that the bridge cpus treat BAT instructions as nops, so they seem to be safe.
In ofppc, check the oeacpufeat, and if we are on a 64bit proc, clear MSR[SF], and ASR[V].
With all of these changes, a kernel with both PPC_OEA and PPC_OEA_BRIDGE64 will boot on the POWERIII-2 cpu. However, it will not yet boot on a 32bit cpu, because of CACHELINESIZE. Work remains to be done there to fix that.
|
1.8 | 05-Aug-2006 |
sanjayl | branches: 1.8.34; 1.8.40; 1st cut of Powermac G5 support (uses bridge mode).
|
1.7 | 27-Dec-2005 |
ross | branches: 1.7.4; 1.7.8; Fix typo inside PPC_OEA64
|
1.6 | 11-Dec-2005 |
christos | merge ktrace-lwp.
|
1.5 | 21-Nov-2003 |
matt | branches: 1.5.16; More PPC64 changes. (latent for now).
|
1.4 | 21-Nov-2003 |
matt | Add PowerPC64 definitions
|
1.3 | 24-Aug-2003 |
chs | add support for non-executable mappings (where the hardware allows this) and make the stack and heap non-executable by default. the changes fall into two basic catagories:
- pmap and trap-handler changes. these are all MD: = alpha: we already track per-page execute permission with the (software) PG_EXEC bit, so just have the trap handler pay attention to it. = i386: use a new GDT segment for %cs for processes that have no executable mappings above a certain threshold (currently the bottom of the stack). track per-page execute permission with the last unused PTE bit. = powerpc/ibm4xx: just use the hardware exec bit. = powerpc/oea: we already track per-page exec bits, but the hardware only implements non-exec mappings at the segment level. so track the number of executable mappings in each segment and turn on the no-exec segment bit iff the count is 0. adjust the trap handler to deal. = sparc (sun4m): fix our use of the hardware protection bits. fix the trap handler to recognize text faults. = sparc64: split the existing unified TSB into data and instruction TSBs, and only load TTEs into the appropriate TSB(s) for the permissions. fix the trap handler to check for execute permission. = not yet implemented: amd64, hppa, sh5
- changes in all the emulations that put a signal trampoline on the stack. instead, we now put the trampoline into a uvm_aobj and map that into the process separately.
originally from openbsd, adapted for netbsd by me.
|
1.2 | 05-Feb-2003 |
matt | branches: 1.2.2; Make things a bit more LP64 friendly.
|
1.1 | 03-Feb-2003 |
matt | Rename PPC_MPC6XX to PPC_OEA (and any mpc6xx reference to oea).
|
1.2.2.3 | 21-Sep-2004 |
skrll | Fix the sync with head I botched.
|
1.2.2.2 | 18-Sep-2004 |
skrll | Sync with HEAD.
|
1.2.2.1 | 03-Aug-2004 |
skrll | Sync with HEAD
|
1.5.16.3 | 11-Feb-2008 |
yamt | sync with head.
|
1.5.16.2 | 30-Dec-2006 |
yamt | sync with head.
|
1.5.16.1 | 21-Jun-2006 |
yamt | sync with head.
|
1.7.8.1 | 11-Aug-2006 |
yamt | sync with head
|
1.7.4.1 | 09-Sep-2006 |
rpaulo | sync with head
|
1.8.40.1 | 18-Feb-2008 |
mjf | Sync with HEAD.
|
1.8.34.1 | 23-Mar-2008 |
matt | sync with HEAD
|
1.7 | 06-Jul-2020 |
rin | Include missing opt_ppcarch.h.
|
1.6 | 01-Jun-2018 |
macallan | add functions to access SCOM registers on 970 CPUs
|
1.5 | 04-May-2018 |
macallan | add Hardware Interrupt Offset Register found on 970
|
1.4 | 16-Feb-2018 |
macallan | branches: 1.4.2; add a few pp970-specific bits
|
1.3 | 07-Jul-2015 |
macallan | add instruction cache throttling SPR found on 750
|
1.2 | 01-Feb-2012 |
matt | branches: 1.2.6; 1.2.24; Enable XBSEN and HIGHBAT for OEA 7455 and related CPUs. The BAT entries now have a resolution of 8MB. (Adjacent entries are merged up to a total of 2GB per entry).
|
1.1 | 25-Feb-2010 |
matt | branches: 1.1.2; 1.1.6; 1.1.8; 1.1.16; 1.1.20; Split <powerpc/spr.h> into a common <powerpc/spr.h> and <powerpc/XXX/spr.h> where XXX is ibm4xx or oea.
|
1.1.20.1 | 18-Feb-2012 |
mrg | merge to -current.
|
1.1.16.1 | 17-Apr-2012 |
yamt | sync with head
|
1.1.8.3 | 28-Jan-2011 |
matt | Add SPR_DBAT7L ...
|
1.1.8.2 | 07-Jan-2011 |
matt | Split spr.h into generic PPC <powerpc/spr.h> and chip-specific <powerpc/XXX/spr.h> (XXX=oea, ibm4xx, booke)
|
1.1.8.1 | 25-Feb-2010 |
matt | file spr.h was added on branch matt-nb5-pq3 on 2011-01-07 01:34:24 +0000
|
1.1.6.2 | 30-Apr-2010 |
uebayasi | Sync with HEAD.
|
1.1.6.1 | 25-Feb-2010 |
uebayasi | file spr.h was added on branch uebayasi-xip on 2010-04-30 14:39:43 +0000
|
1.1.2.2 | 11-Mar-2010 |
yamt | sync with head
|
1.1.2.1 | 25-Feb-2010 |
yamt | file spr.h was added on branch yamt-nfs-mp on 2010-03-11 15:02:51 +0000
|
1.2.24.1 | 22-Sep-2015 |
skrll | Sync with HEAD
|
1.2.6.1 | 03-Dec-2017 |
jdolecek | update from HEAD
|
1.4.2.2 | 25-Jun-2018 |
pgoyette | Sync with HEAD
|
1.4.2.1 | 21-May-2018 |
pgoyette | Sync with HEAD
|
1.6 | 27-Feb-2021 |
thorpej | Rather than putting it on the caller, just let oea_iobat_add() decide whether to call mpc601_ioseg_add().
|
1.5 | 28-Apr-2008 |
martin | branches: 1.5.100; Remove clause 3 and 4 from TNF licenses
|
1.4 | 09-Apr-2007 |
garbled | branches: 1.4.34; 1.4.36; 1.4.38; Make the SR601_VALID_P check less draconic wrt valid io segregs. There are perfectly valid iosegregs for which the old test would fail.
|
1.3 | 11-Dec-2005 |
christos | branches: 1.3.26; 1.3.30; 1.3.32; merge ktrace-lwp.
|
1.2 | 06-Jun-2004 |
kleink | branches: 1.2.12; Add some BAT-style predicate macros.
|
1.1 | 03-Feb-2003 |
matt | branches: 1.1.2; 1.1.6; Rename PPC_MPC6XX to PPC_OEA (and any mpc6xx reference to oea).
|
1.1.6.1 | 07-Aug-2005 |
riz | Pull up revision 1.2 (requested by briggs in ticket #1238): Add some BAT-style predicate macros.
|
1.1.2.3 | 21-Sep-2004 |
skrll | Fix the sync with head I botched.
|
1.1.2.2 | 18-Sep-2004 |
skrll | Sync with HEAD.
|
1.1.2.1 | 03-Aug-2004 |
skrll | Sync with HEAD
|
1.2.12.1 | 03-Sep-2007 |
yamt | sync with head.
|
1.3.32.1 | 11-Jul-2007 |
mjf | Sync with head.
|
1.3.30.1 | 10-Apr-2007 |
ad | Sync with head.
|
1.3.26.1 | 15-Apr-2007 |
yamt | sync with head.
|
1.4.38.1 | 16-May-2008 |
yamt | sync with head.
|
1.4.36.1 | 18-May-2008 |
yamt | sync with head.
|
1.4.34.1 | 02-Jun-2008 |
mjf | Sync with HEAD.
|
1.5.100.1 | 03-Apr-2021 |
thorpej | Sync with HEAD.
|
1.23 | 03-Feb-2022 |
macallan | bump MAXTSIZ now clang runs again
|
1.22 | 11-Sep-2021 |
andvar | Add missing double p and d for stopped and overriden accordingly. Fix few more typos along the way, mainly in copy-pasted comments.
|
1.21 | 17-Apr-2021 |
rin | Adjust TABs. No functional changes.
|
1.20 | 17-Aug-2017 |
sevan | branches: 1.20.18; Raise the maximum text size value to 128MB, this allows binaries such as clang which currently has a text area of around 96MB to execute successfully on macppc.
ok macallan
|
1.19 | 13-Feb-2017 |
skrll | branches: 1.19.6; G/C VM_MAX_KERNEL_BUF
|
1.18 | 28-Feb-2014 |
matt | branches: 1.18.6; 1.18.10; 1.18.14; Make this 64-bit aware.
|
1.17 | 20-Jun-2011 |
matt | branches: 1.17.2; 1.17.12; 1.17.16; PowerPC now exports a common view of cpu.h, vmparam.h and pmap.h when building a MODULAR kernel or compiling _MODULE. It should be noted that MODULAR or _MODULE export a view of the kernel as being MULTIPROCESSOR (even if isn't). The shared pmap TLB uses mdpg in places where it used mdpg to avoid deadly embrance inclusion problems.
|
1.16 | 14-Nov-2010 |
uebayasi | branches: 1.16.6; Move struct vm_page_md definition from vmparam.h to pmap.h, because it's used only by pmap. vmparam.h has definitions for wider audience.
All GENERIC kernels build tested, except ia64.
powerpc/include/booke/vmparam.h has one too, but it has no pmap.h, so it's left as is.
|
1.15 | 06-Nov-2010 |
uebayasi | Remove incomplete, never worked dynamic run-time memory registration (uvm_page_physload(9)). This functionality will be re-added later.
|
1.14 | 06-Mar-2009 |
joerg | branches: 1.14.2; 1.14.4; Remove SHMMAXPGS from all kernel configs. Dynamically compute the initial limit as 1/4 of the physical memory. Ensure the limit is at least 1024 pages, the old default on most platforms.
|
1.13 | 28-Apr-2008 |
martin | branches: 1.13.8; 1.13.14; Remove clause 3 and 4 from TNF licenses
|
1.12 | 05-Feb-2008 |
garbled | branches: 1.12.6; 1.12.8; 1.12.10; Rewrite a big chunk of the pmap and locore code for powerpc to better deal with the 64bit bridge mode. pmap changes by Matt Thomas, rest by myself.
Change pmap.c to work similar to exec_elf.c to allow us to compile in multiple pmaps to a single kernel. This allows the pmap for bridge64 to co-exist with the 32bit pmap.
Yank __HAVE_PMAP_PHYSSEG from all the oea code.
Add a new global, "oeacpufeat", which is used early in locore to determine certain cpu features. This allows us to conditionalize code early in the boot for certain CPUs that have special needs.
Yank most of the ifdef PPC_OEA_BRIDGE64 code from almost every file it was found in. Some of it seemed incorrect, and my 7044 booted just fine without it. It would appear that the bridge cpus treat BAT instructions as nops, so they seem to be safe.
In ofppc, check the oeacpufeat, and if we are on a 64bit proc, clear MSR[SF], and ASR[V].
With all of these changes, a kernel with both PPC_OEA and PPC_OEA_BRIDGE64 will boot on the POWERIII-2 cpu. However, it will not yet boot on a 32bit cpu, because of CACHELINESIZE. Work remains to be done there to fix that.
|
1.11 | 19-Jan-2008 |
aymeric | bump the default data size to 256MB (i.e. double it) because compiling gcc during a standard native system build doesn't pass with 128MB.
|
1.10 | 21-Sep-2006 |
matt | branches: 1.10.28; 1.10.34; 1.10.42; Define a PHYSMAP_VSID for mapping pa==va.
|
1.9 | 05-Aug-2006 |
sanjayl | branches: 1.9.4; 1.9.6; 1st cut of Powermac G5 support (uses bridge mode).
|
1.8 | 10-Jan-2005 |
matt | branches: 1.8.10; 1.8.22; 1.8.26; Now that countless UVM bugs have been fixed, enable "topdown" memory allocation by default.
|
1.7 | 21-Nov-2003 |
matt | More PPC64 changes. (latent for now).
|
1.6 | 01-Apr-2003 |
thorpej | branches: 1.6.2; Make PAGE_SIZE, PAGE_SHIFT, and PAGE_MASK compile-time constants for PowerPC processors.
|
1.5 | 23-Feb-2003 |
atatat | #include opt_uvm.h in machine/vmparam.h (for those ports offering the topdown option) so that including it directly before including uvm/uvm_param.h (or uvm/uvm_extern.h which includes uvm/uvm_param.h) and attempting to use topdown won't result in a compiler error.
Problem noted in private email.
|
1.4 | 21-Feb-2003 |
matt | Add TOPDOWN VM support.
|
1.3 | 06-Feb-2003 |
matt | Allow KERNEL_SR/KERNEL2_SR to be overriden (I run a kernel with the mapped space at 0x8000000-0x9fffffff).
|
1.2 | 05-Feb-2003 |
matt | Make LP64 friendly.
|
1.1 | 03-Feb-2003 |
matt | Rename PPC_MPC6XX to PPC_OEA (and any mpc6xx reference to oea).
|
1.6.2.2 | 17-Jan-2005 |
skrll | Sync with HEAD.
|
1.6.2.1 | 03-Aug-2004 |
skrll | Sync with HEAD
|
1.8.26.1 | 11-Aug-2006 |
yamt | sync with head
|
1.8.22.1 | 09-Sep-2006 |
rpaulo | sync with head
|
1.8.10.3 | 11-Feb-2008 |
yamt | sync with head.
|
1.8.10.2 | 21-Jan-2008 |
yamt | sync with head
|
1.8.10.1 | 30-Dec-2006 |
yamt | sync with head.
|
1.9.6.1 | 22-Oct-2006 |
yamt | sync with head
|
1.9.4.1 | 18-Nov-2006 |
ad | Sync with head.
|
1.10.42.1 | 20-Jan-2008 |
bouyer | Sync with HEAD
|
1.10.34.1 | 18-Feb-2008 |
mjf | Sync with HEAD.
|
1.10.28.1 | 23-Mar-2008 |
matt | sync with HEAD
|
1.12.10.2 | 04-May-2009 |
yamt | sync with head.
|
1.12.10.1 | 16-May-2008 |
yamt | sync with head.
|
1.12.8.1 | 18-May-2008 |
yamt | sync with head.
|
1.12.6.1 | 02-Jun-2008 |
mjf | Sync with HEAD.
|
1.13.14.1 | 13-May-2009 |
jym | Sync with HEAD.
Commit is split, to avoid a "too many arguments" protocol error.
|
1.13.8.1 | 28-Apr-2009 |
skrll | Sync with HEAD.
|
1.14.4.1 | 05-Mar-2011 |
rmind | sync with head
|
1.14.2.3 | 16-Nov-2010 |
uebayasi | Sync with HEAD.
|
1.14.2.2 | 26-Apr-2010 |
uebayasi | Remove the unfinished code to add a memory segment after uvm_page_init(). It doesn't even compile.
(In the future, we should allocate struct vm_page [] on the added memory segment for NUMA's sake.)
|
1.14.2.1 | 23-Feb-2010 |
uebayasi | Convert all VM_MDPAGE_INIT()'s to take struct vm_page_md * and paddr_t.
|
1.16.6.1 | 23-Jun-2011 |
cherry | Catchup with rmind-uvmplock merge.
|
1.17.16.1 | 18-May-2014 |
rmind | sync with head
|
1.17.12.2 | 03-Dec-2017 |
jdolecek | update from HEAD
|
1.17.12.1 | 20-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
1.17.2.1 | 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid a limitation of cvs. ("Protocol error: too many arguments")
|
1.18.14.1 | 21-Apr-2017 |
bouyer | Sync with HEAD
|
1.18.10.1 | 20-Mar-2017 |
pgoyette | Sync with HEAD
|
1.18.6.1 | 28-Aug-2017 |
skrll | Sync with HEAD
|
1.19.6.1 | 31-Aug-2017 |
martin | Pull up following revision(s) (requested by sevan in ticket #241): sys/arch/powerpc/include/oea/vmparam.h: revision 1.20 Raise the maximum text size value to 128MB, this allows binaries such as clang which currently has a text area of around 96MB to execute successfully on macppc. ok macallan
|
1.20.18.1 | 17-Apr-2021 |
thorpej | Sync with HEAD.
|