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History log of /src/sys/arch/powerpc/include/oea/bat.h
RevisionDateAuthorComments
 1.20  06-Jul-2020  rin Include missing opt_ppcarch.h.
 1.19  06-Jul-2020  rin Style and cosmetic changes. No binary changes intended.
 1.18  06-Jul-2014  mrg make sure struct bat is aligned to 8 bytes as we shift them 3 bits.

fixes PReP lossage as reported on port-powerpc and port-prep.
thanks to makoto@ki.nu and kiyohara@netbsd.
 1.17  15-Feb-2012  macallan branches: 1.17.6; 1.17.20;
make BATs >256MB work, now macppc works again on 745x CPUs as well
ok riz
 1.16  15-Feb-2012  matt When making BATU, use (BAT_XBL|BAT_BL) for the extended bat lengths.
 1.15  01-Feb-2012  matt Enable XBSEN and HIGHBAT for OEA 7455 and related CPUs.
The BAT entries now have a resolution of 8MB. (Adjacent entries are merged
up to a total of 2GB per entry).
 1.14  20-Jun-2011  matt branches: 1.14.2; 1.14.6;
Include <powerpc/psl.h>
 1.13  21-Jul-2009  nisimura branches: 1.13.10;
protect C constructs from assembler source inclusion.
 1.12  28-Apr-2008  martin branches: 1.12.22;
Remove clause 3 and 4 from TNF licenses
 1.11  23-Feb-2008  matt branches: 1.11.2; 1.11.4;
Add BAT_VA2IDX to abstract out the va to index calculation.
 1.10  23-Feb-2008  matt Add BAT_WIMG and some XBL aware BAT_BL_{512,1G,2G,4G} macros.
 1.9  05-Feb-2008  garbled branches: 1.9.2; 1.9.6;
Rewrite a big chunk of the pmap and locore code for powerpc to better
deal with the 64bit bridge mode. pmap changes by Matt Thomas, rest by myself.

Change pmap.c to work similar to exec_elf.c to allow us to compile in
multiple pmaps to a single kernel. This allows the pmap for bridge64 to
co-exist with the 32bit pmap.

Yank __HAVE_PMAP_PHYSSEG from all the oea code.

Add a new global, "oeacpufeat", which is used early in locore to determine
certain cpu features. This allows us to conditionalize code early in the boot
for certain CPUs that have special needs.

Yank most of the ifdef PPC_OEA_BRIDGE64 code from almost every file it was
found in. Some of it seemed incorrect, and my 7044 booted just fine
without it. It would appear that the bridge cpus treat BAT instructions
as nops, so they seem to be safe.

In ofppc, check the oeacpufeat, and if we are on a 64bit proc, clear
MSR[SF], and ASR[V].

With all of these changes, a kernel with both PPC_OEA and PPC_OEA_BRIDGE64
will boot on the POWERIII-2 cpu. However, it will not yet boot on a 32bit
cpu, because of CACHELINESIZE. Work remains to be done there to fix that.
 1.8  05-Aug-2006  sanjayl branches: 1.8.34; 1.8.40;
1st cut of Powermac G5 support (uses bridge mode).
 1.7  11-Dec-2005  christos branches: 1.7.4; 1.7.8;
merge ktrace-lwp.
 1.6  21-Jan-2005  matt branches: 1.6.8;
Add extended BAT block size definitions.
 1.5  14-Mar-2003  matt branches: 1.5.2; 1.5.10;
Add _LOCORE protection.
 1.4  06-Feb-2003  matt Add oea_iobat_remove(paddr_t).
 1.3  05-Feb-2003  matt Make _LP64 friendly.
 1.2  05-Feb-2003  matt Make things a bit more LP64 friendly.
 1.1  03-Feb-2003  matt Rename PPC_MPC6XX to PPC_OEA (and any mpc6xx reference to oea).
 1.5.10.1  29-Apr-2005  kent sync with -current
 1.5.2.1  24-Jan-2005  skrll Sync with HEAD.
 1.6.8.3  27-Feb-2008  yamt sync with head.
 1.6.8.2  11-Feb-2008  yamt sync with head.
 1.6.8.1  30-Dec-2006  yamt sync with head.
 1.7.8.1  11-Aug-2006  yamt sync with head
 1.7.4.1  09-Sep-2006  rpaulo sync with head
 1.8.40.1  18-Feb-2008  mjf Sync with HEAD.
 1.8.34.1  23-Mar-2008  matt sync with HEAD
 1.9.6.2  02-Jun-2008  mjf Sync with HEAD.
 1.9.6.1  03-Apr-2008  mjf Sync with HEAD.
 1.9.2.1  24-Mar-2008  keiichi sync with head.
 1.11.4.2  19-Aug-2009  yamt sync with head.
 1.11.4.1  16-May-2008  yamt sync with head.
 1.11.2.1  18-May-2008  yamt sync with head.
 1.12.22.1  26-Jan-2011  matt Change battable to have a granularity of 8MB.
 1.13.10.1  23-Jun-2011  cherry Catchup with rmind-uvmplock merge.
 1.14.6.1  18-Feb-2012  mrg merge to -current.
 1.14.2.1  17-Apr-2012  yamt sync with head
 1.17.20.1  10-Aug-2014  tls Rebase.
 1.17.6.1  20-Aug-2014  tls Rebase to HEAD as of a few days ago.

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