branches: 1.1.2;
file gen_pci_machdep.c was initially added on branch ppcoea-renovation.

branches: 1.1.2;
file gen_pciconf_indirect.c was initially added on branch ppcoea-renovation.

Merge thorpej-cfargs2.

branches: 1.11.8;
Merge thorpej-cfargs branch:

Simplify and make extensible the config_search() / config_found() /
config_attach() interfaces: rather than having different variants for
which arguments you want pass along, just have a single call that
takes a variadic list of tag-value arguments.

Adjust all call sites:
- Simplify wherever possible; don't pass along arguments that aren't
actually needed.
- Don't be explicit about what interface attribute is attaching if
the device only has one. (More simplification.)
- Add a config_probe() function to be used in indirect configuiration
situations, making is visibly easier to see when indirect config is
in play, and allowing for future change in semantics. (As of now,
this is just a wrapper around config_match(), but that is an
implementation detail.)

Remove unnecessary or redundant interface attributes where they're not
needed.

There are currently 5 "cfargs" defined:
- CFARG_SUBMATCH (submatch function for direct config)
- CFARG_SEARCH (search function for indirect config)
- CFARG_IATTR (interface attribte)
- CFARG_LOCATORS (locators array)
- CFARG_DEVHANDLE (devhandle_t - wraps OFW, ACPI, etc. handles)

...and a sentinel value CFARG_EOL.

Add some extra sanity checking to ensure that interface attributes
aren't ambiguous.

Use CFARG_DEVHANDLE in MI FDT, OFW, and ACPI code, and macppc and shark
ports to associate those device handles with device_t instance. This
will trickle trough to more places over time (need back-end for pre-OFW
Sun OBP; any others?).

branches: 1.10.4;
Style and cosmetic changes. No binary changes intended.

Insert some missing aprint_naive().

branches: 1.8.2; 1.8.6;
#include <sys/bus.h> instead of <machine/bus.h>.

Modify mapiodev to take a third argument indicating whether the space
should be prefetchable (true) or not (false).

struct device * -> device_t
struct cfdata * -> cfdata_t
split device/softc (CFATTACH_DECL_NEW)
use device_accessors and device_private
constify

More device_t, cfdata, CFATTACH_DECL_NEW cleanup.

branches: 1.4.22; 1.4.32;
Remove clause 3 and 4 from TNF licenses

branches: 1.3.6; 1.3.8; 1.3.10;
Apparently BRIDGE mode allows BAT registers, so re-enable that code.
Change the pegasos PCI_NETBSD_CONFIGURE arguments around to wire up mem
space into the correct area, and move the io regs a little to make it
work properly. Just avoid the secondary PCI entirely.
Change the list of things that we fiddle with in pci_conf_hook. Map mem
on the fwohci, avoid display cards, avoid IO on the auvia.
Change some printf's to aprint_*
Yank a call to genppc_pci_indirect_make_tag and change it to the
bus-independant pci call instead. (in pci_conf_hook)

branches: 1.2.2; 1.2.4; 1.2.6; 1.2.8;
Merge the ppcoea-renovation branch to HEAD.

This branch was a major cleanup and rototill of many of the various OEA
cpu based PPC ports that focused on sharing as much code as possible
between the various ports to eliminate near-identical copies of files in
every tree. Additionally there is a new PIC system that unifies the
interface to interrupt code for all different OEA ppc arches. The work
for this branch was done by a variety of people, too long to list here.

TODO:
bebox still needs work to complete the transition to -renovation.
ofppc still needs a bunch of work, which I will be looking at.
ev64260 still needs to be renovated
amigappc was not attempted.

NOTES:
pmppc was removed as an arch, and moved to a evbppc target.

branches: 1.1.2; 1.1.6; 1.1.8;
file pchb.c was initially added on branch ppcoea-renovation.

fix various typos in comments and log messages.

Style and cosmetic changes. No binary changes intended.

IRQ0 is perfectly legal to use on at least some macppc, so don't treat it
as an error or something special
with this svwsata works on my PCI-X G5

remove checks for failure after memory allocation calls that cannot fail:

kmem_alloc() with KM_SLEEP
kmem_zalloc() with KM_SLEEP
percpu_alloc()
pserialize_create()
psref_class_create()

all of these paths include an assertion that the allocation has not failed,
so callers should not assert that again.

Added MSI/MSI-X and interrupt_distribute(9) support for powerpc.

branches: 1.20.6; 1.20.10;
make pci_intr_string and eisa_intr_string take a buffer and a length
instead of relying in local static storage.

sprintf -> snprintf

branches: 1.18.4;
remove PMAC_G5 kludge - fixed this elsewhere

temporary kludge for G5 - on mine some devices are configured with interrupt
pin 0 but a valid IRQ line, so don't treat that as an error if PMAC_G5 is set

Use structure initializers.

branches: 1.15.6;
Use kmem instead of malloc. Remove unneeded <sys/malloc.h> includes.

branches: 1.14.2; 1.14.6;
First pass of the new PCI MSI/MSI ABI definitions. (return EOPNOTSUPP for
now).

Add support pci_intr_setattr.
Export non-inline version of pci api for modules (_MODULE is defined).
Fix definition of pc_conf_hook and pc_conf_interrupt.
Switch to using inlines instead of macros.
Switch ibm4xx to use <powerpc/pci_machdep.h>

Use <sys/foo.h> instead of <machine/foo.h> if such a file exists.
Don't assume <sys/cpu.h> includes <powerpc/subarch/cpu*.h>. Include it
explicitly.

struct device * -> device_t
struct cfdata * -> cfdata_t
split device/softc (CFATTACH_DECL_NEW)
use device_accessors and device_private
constify

branches: 1.10.2;
Neither pci_dma64_available(), pci_probe_device(), pci_mapreg_map(9),
pci_find_rom(), pci_intr_map(9), pci_enumerate_bus(), nor the match
predicate passed to pciide_compat_intr_establish() should ever modify
their pci_attach_args argument, so make their pci_attach_args arguments
const and deal with the fallout throughout the kernel.

For the most part, these changes add a 'const' where there was no
'const' before, however, some drivers and MD code used to modify
pci_attach_args. Now those drivers either copy their pci_attach_args
and modify the copy, or refrain from modifying pci_attach_args:

Xen: according to Manuel Bouyer, writing to pci_attach_args in
pci_intr_map() was a leftover from Xen 2. Probably a bug. I
stopped writing it. I have not tested this change.

siside(4): sis_hostbr_match() needlessly wrote to pci_attach_args.
Probably a bug. I use a temporary variable. I have not tested this
change.

slide(4): sl82c105_chip_map() overwrote the caller's pci_attach_args.
Probably a bug. Use a local pci_attach_args. I have not tested
this change.

viaide(4): via_sata_chip_map() and via_sata_chip_map_new() overwrote the
caller's pci_attach_args. Probably a bug. Make a local copy of the
caller's pci_attach_args and modify the copy. I have not tested
this change.

While I'm here, make pci_mapreg_submap() static.

With these changes in place, I have tested the compilation of these
kernels:

alpha GENERIC
amd64 GENERIC XEN3_DOM0
arc GENERIC
atari HADES MILAN-PCIIDE
bebox GENERIC
cats GENERIC
cobalt GENERIC
evbarm-eb NSLU2
evbarm-el ADI_BRH ARMADILLO9 CP3100 GEMINI GEMINI_MASTER GEMINI_SLAVE GUMSTIX
HDL_G IMX31LITE INTEGRATOR IQ31244 IQ80310 IQ80321 IXDP425 IXM1200
KUROBOX_PRO LUBBOCK MARVELL_NAS NAPPI SHEEVAPLUG SMDK2800 TEAMASA_NPWR
TEAMASA_NPWR_FC TS7200 TWINTAIL ZAO425
evbmips-el AP30 DBAU1500 DBAU1550 MALTA MERAKI MTX-1 OMSAL400 RB153 WGT624V3
evbmips64-el XLSATX
evbppc EV64260 MPC8536DS MPC8548CDS OPENBLOCKS200 OPENBLOCKS266
OPENBLOCKS266_OPT P2020RDB PMPPC RB800 WALNUT
hp700 GENERIC
i386 ALL XEN3_DOM0 XEN3_DOMU
ibmnws GENERIC
macppc GENERIC
mvmeppc GENERIC
netwinder GENERIC
ofppc GENERIC
prep GENERIC
sandpoint GENERIC
sgimips GENERIC32_IP2x
sparc GENERIC_SUN4U KRUPS
sparc64 GENERIC

As of Sun Apr 3 15:26:26 CDT 2011, I could not compile these kernels
with or without my patches in place:

### evbmips-el GDIUM

nbmake: nbmake: don't know how to make /home/dyoung/pristine-nbsd/src/sys/arch/mips/mips/softintr.c. Stop

### evbarm-el MPCSA_GENERIC
src/sys/arch/evbarm/conf/MPCSA_GENERIC:318: ds1672rtc*: unknown device `ds1672rtc'

### ia64 GENERIC

/tmp/genassym.28085/assym.c: In function 'f111':
/tmp/genassym.28085/assym.c:67: error: invalid application of 'sizeof' to incomplete type 'struct pcb'
/tmp/genassym.28085/assym.c:76: error: dereferencing pointer to incomplete type

### sgimips GENERIC32_IP3x

crmfb.o: In function `crmfb_attach':
crmfb.c:(.text+0x2304): undefined reference to `ddc_read_edid'
crmfb.c:(.text+0x2304): relocation truncated to fit: R_MIPS_26 against `ddc_read_edid'
crmfb.c:(.text+0x234c): undefined reference to `edid_parse'
crmfb.c:(.text+0x234c): relocation truncated to fit: R_MIPS_26 against `edid_parse'
crmfb.c:(.text+0x2354): undefined reference to `edid_print'
crmfb.c:(.text+0x2354): relocation truncated to fit: R_MIPS_26 against `edid_print'

branches: 1.9.2;
Change definition of pc_bus_maxdevs to get a void * instead a pci_chipset_tag_t
to match its use in pci_bus_maxdevs. This makes it the same as pci_conf_read
and pci_conf_write.
Change all struct device * to device_t.
[Obviously nothing ever used the first argument to pc_bus_maxdevs since it
could have never worked because it wasn't being passed a pci_chipset_tag_t.]

branches: 1.8.22; 1.8.26;
Remove clause 3 and 4 from TNF licenses

branches: 1.7.6; 1.7.8; 1.7.10;
Add support to ofppc for the IBM 7044-270 machine. This is a POWER3-II
based machine. Currently the kernel to run on this machine is
incompatible with the standard GENERIC kernel, so for now, we have a
separate GENERIC_B64. Eventually, I hope to combine the two.

Please note, this is a port of 32bit ofppc, not a powerpc64 port.

Thanks to Matt Thomas and Kevin Bowling for helping to make this port
possible.

Summary of changes:

Change ofwpci to use the ofmethod config for configuring the PCI bus,
rather than indirect configuration.
Move the wiring of the interrupt controllers from at the start of the
boot, into the configuration of the first PCI bus.
Rewrite the map_isa_ioregs() hack to work on a machine without BATs
Fix a ton of bugs in the genofw_find_pics routine, and in the map_space code.
Split the pic_openpic into openpic_common and pic_openpic.
Create a new pic_distopenpic driver, for the distributed openpic found on
some newer IBM machines.
Fix a bad panic in pmap_extract on 64bit bridge mode

get rid of macppc's private pci_bus_dma_tag

check for __HAVE_PRIVATE_PCI_BUS_DMA_TAG instead of macppc when (not)
declaring pci_bus_dma_tag
while there move #include <machine/isa_machdep.h> to the ISA block so archs
without ISA won't see it. Now macppc builds again.

VT8231 IDE workaround for native mode with "compatibility" interrupts 14/15.
This time done right by calling pciide_machdep_compat_intr_establish() to
get a MD interrupt handler.
Verified that it compiles for XEN again.

__FUNCTION__ -> __func__

branches: 1.2.2; 1.2.4; 1.2.6; 1.2.8; 1.2.10; 1.2.14;
Merge the ppcoea-renovation branch to HEAD.

This branch was a major cleanup and rototill of many of the various OEA
cpu based PPC ports that focused on sharing as much code as possible
between the various ports to eliminate near-identical copies of files in
every tree. Additionally there is a new PIC system that unifies the
interface to interrupt code for all different OEA ppc arches. The work
for this branch was done by a variety of people, too long to list here.

TODO:
bebox still needs work to complete the transition to -renovation.
ofppc still needs a bunch of work, which I will be looking at.
ev64260 still needs to be renovated
amigappc was not attempted.

NOTES:
pmppc was removed as an arch, and moved to a evbppc target.

branches: 1.1.2; 1.1.6; 1.1.8;
file pci_machdep_common.c was initially added on branch ppcoea-renovation.

remove checks for failure after memory allocation calls that cannot fail:

kmem_alloc() with KM_SLEEP
kmem_zalloc() with KM_SLEEP
percpu_alloc()
pserialize_create()
psref_class_create()

all of these paths include an assertion that the allocation has not failed,
so callers should not assert that again.

branches: 1.21.2;
src is too big these days to tolerate superfluous apostrophes. It's
"its", people!

sprintf -> snprintf

- remove set but unused variables

branches: 1.18.6; 1.18.10;
Use kmem instead of malloc. Remove unneeded <sys/malloc.h> includes.

branches: 1.17.2; 1.17.6;
Add support pci_intr_setattr.
Export non-inline version of pci api for modules (_MODULE is defined).
Fix definition of pc_conf_hook and pc_conf_interrupt.
Switch to using inlines instead of macros.
Switch ibm4xx to use <powerpc/pci_machdep.h>

Use <sys/foo.h> instead of <machine/foo.h> if such a file exists.
Don't assume <sys/cpu.h> includes <powerpc/subarch/cpu*.h>. Include it
explicitly.

branches: 1.15.2;
Neither pci_dma64_available(), pci_probe_device(), pci_mapreg_map(9),
pci_find_rom(), pci_intr_map(9), pci_enumerate_bus(), nor the match
predicate passed to pciide_compat_intr_establish() should ever modify
their pci_attach_args argument, so make their pci_attach_args arguments
const and deal with the fallout throughout the kernel.

For the most part, these changes add a 'const' where there was no
'const' before, however, some drivers and MD code used to modify
pci_attach_args. Now those drivers either copy their pci_attach_args
and modify the copy, or refrain from modifying pci_attach_args:

Xen: according to Manuel Bouyer, writing to pci_attach_args in
pci_intr_map() was a leftover from Xen 2. Probably a bug. I
stopped writing it. I have not tested this change.

siside(4): sis_hostbr_match() needlessly wrote to pci_attach_args.
Probably a bug. I use a temporary variable. I have not tested this
change.

slide(4): sl82c105_chip_map() overwrote the caller's pci_attach_args.
Probably a bug. Use a local pci_attach_args. I have not tested
this change.

viaide(4): via_sata_chip_map() and via_sata_chip_map_new() overwrote the
caller's pci_attach_args. Probably a bug. Make a local copy of the
caller's pci_attach_args and modify the copy. I have not tested
this change.

While I'm here, make pci_mapreg_submap() static.

With these changes in place, I have tested the compilation of these
kernels:

alpha GENERIC
amd64 GENERIC XEN3_DOM0
arc GENERIC
atari HADES MILAN-PCIIDE
bebox GENERIC
cats GENERIC
cobalt GENERIC
evbarm-eb NSLU2
evbarm-el ADI_BRH ARMADILLO9 CP3100 GEMINI GEMINI_MASTER GEMINI_SLAVE GUMSTIX
HDL_G IMX31LITE INTEGRATOR IQ31244 IQ80310 IQ80321 IXDP425 IXM1200
KUROBOX_PRO LUBBOCK MARVELL_NAS NAPPI SHEEVAPLUG SMDK2800 TEAMASA_NPWR
TEAMASA_NPWR_FC TS7200 TWINTAIL ZAO425
evbmips-el AP30 DBAU1500 DBAU1550 MALTA MERAKI MTX-1 OMSAL400 RB153 WGT624V3
evbmips64-el XLSATX
evbppc EV64260 MPC8536DS MPC8548CDS OPENBLOCKS200 OPENBLOCKS266
OPENBLOCKS266_OPT P2020RDB PMPPC RB800 WALNUT
hp700 GENERIC
i386 ALL XEN3_DOM0 XEN3_DOMU
ibmnws GENERIC
macppc GENERIC
mvmeppc GENERIC
netwinder GENERIC
ofppc GENERIC
prep GENERIC
sandpoint GENERIC
sgimips GENERIC32_IP2x
sparc GENERIC_SUN4U KRUPS
sparc64 GENERIC

As of Sun Apr 3 15:26:26 CDT 2011, I could not compile these kernels
with or without my patches in place:

### evbmips-el GDIUM

nbmake: nbmake: don't know how to make /home/dyoung/pristine-nbsd/src/sys/arch/mips/mips/softintr.c. Stop

### evbarm-el MPCSA_GENERIC
src/sys/arch/evbarm/conf/MPCSA_GENERIC:318: ds1672rtc*: unknown device `ds1672rtc'

### ia64 GENERIC

/tmp/genassym.28085/assym.c: In function 'f111':
/tmp/genassym.28085/assym.c:67: error: invalid application of 'sizeof' to incomplete type 'struct pcb'
/tmp/genassym.28085/assym.c:76: error: dereferencing pointer to incomplete type

### sgimips GENERIC32_IP3x

crmfb.o: In function `crmfb_attach':
crmfb.c:(.text+0x2304): undefined reference to `ddc_read_edid'
crmfb.c:(.text+0x2304): relocation truncated to fit: R_MIPS_26 against `ddc_read_edid'
crmfb.c:(.text+0x234c): undefined reference to `edid_parse'
crmfb.c:(.text+0x234c): relocation truncated to fit: R_MIPS_26 against `edid_parse'
crmfb.c:(.text+0x2354): undefined reference to `edid_print'
crmfb.c:(.text+0x2354): relocation truncated to fit: R_MIPS_26 against `edid_print'

branches: 1.14.2;
Rename PCI_PRODUCT_MARVELL_MV64360 from PCI_PRODUCT_MARVELL_GT64360.

Remove white-spaces.

branches: 1.12.20; 1.12.22;
Remove clause 3 and 4 from TNF licenses

branches: 1.11.2; 1.11.4;
On the Pegasos2, we must never run PCI-configure for the MV64361 host bridge,
otherwise the devices on that bus might no longer work correctly (e.g.
interrupt flood).
Approved by garbled.

branches: 1.10.2; 1.10.6;
Use model_init to clean up how we decide the ranges for
PCI_NETBSD_CONFIGURE. Add some code to hopefully better handle the
firepower and powerstackII, based on the OFW dumps from those machines.
Untested on those machines, but doesn't break anything on pegasos/7044.

Apparently BRIDGE mode allows BAT registers, so re-enable that code.
Change the pegasos PCI_NETBSD_CONFIGURE arguments around to wire up mem
space into the correct area, and move the io regs a little to make it
work properly. Just avoid the secondary PCI entirely.
Change the list of things that we fiddle with in pci_conf_hook. Map mem
on the fwohci, avoid display cards, avoid IO on the auvia.
Change some printf's to aprint_*
Yank a call to genppc_pci_indirect_make_tag and change it to the
bus-independant pci call instead. (in pci_conf_hook)

Add support to ofppc for the IBM 7044-270 machine. This is a POWER3-II
based machine. Currently the kernel to run on this machine is
incompatible with the standard GENERIC kernel, so for now, we have a
separate GENERIC_B64. Eventually, I hope to combine the two.

Please note, this is a port of 32bit ofppc, not a powerpc64 port.

Thanks to Matt Thomas and Kevin Bowling for helping to make this port
possible.

Summary of changes:

Change ofwpci to use the ofmethod config for configuring the PCI bus,
rather than indirect configuration.
Move the wiring of the interrupt controllers from at the start of the
boot, into the configuration of the first PCI bus.
Rewrite the map_isa_ioregs() hack to work on a machine without BATs
Fix a ton of bugs in the genofw_find_pics routine, and in the map_space code.
Split the pic_openpic into openpic_common and pic_openpic.
Create a new pic_distopenpic driver, for the distributed openpic found on
some newer IBM machines.
Fix a bad panic in pmap_extract on 64bit bridge mode

enable PCI_NETBSD_CONFIGURE for ofppc.

the call to pci_configure_bus(9) and it's supporting code is
copied verbatim from the prep port.

this allows us to completely remove the really gross pegasos
specific pegasospci_indirect_attach_hook() that set various
pci command regs, since all those devices (mostly work now,
see below) and additionally PCI plugin cards work now too.

it also makes the pegasos onboard vr(4) ethernet work with
disk boot (it previously only worked with netboot.)

in the generic macppc ofw pci conf hook and for pegasos,
don't configure the viaide(4) device, and don't configure
memory space on the fwohci(4) device.


with this, and my other recent ofppc/ppc changes the pegasos
port is mostly functional. the marvell gige is not working,
and my 512mb appears as only about 256mb, but otherwise
this port is almost done!

branches: 1.6.2; 1.6.4; 1.6.10;
Lots of small changes for ofppc:

Remove the ofb driver. I'm not interested in trying to make this work.
It should be replaced with the genfb driver, which I have added,
commented out because that driver needs work before it will function on
ofppc. (it's too panic-happy, and ofppc needs a working autoconf.c)

Change the way we do isa_inb/outb. The new way is a slightly nastier
hack, but won't run afoul of the other isa drivers as much.

Fix ofw_consinit.c to remove the dependency on ofb.

Apply a patch from Frank Wille that fixes a stupid in the ofw interrupt map
discovery where the pin value was off by one.

branches: 1.4.2;
Add code to properly detect the interrupt mapping on the PegasosII, and any
other OFW machine that fails our first two methods.

Add a bunch of fixes and minor rewrites to ofppc to bring it closer to
working properly. This is still a work in progress, and all work so far
has been based on the PegasosII machne.

1) Rewrite how the ISA memory and IO space maps are found. More work
will still need to be done in this area.
2) Add a new OFW method of pci configuration. So far I can only get this
to work on the primary PCI bus on the Pegasos. Unsure if this is a
pegasos bug or a code bug.
3) Add the rtas device to ofppc, and add an "rtas_reboot" function to
rtas to allow me to reboot the PegasosII. The rtas driver works, and is
a great start but needs to be changed slightly to allow easier access to
the functions from outside the driver.
4) Fix a number of bugs that existed in the shared PCI code for ofw that
probably weren't tickled by macppc.

There is much much more left to do here, this is all still a work in
progress, but this commit will allow other people to play around with the
code if they want to.

branches: 1.2.2;
Merge the ppcoea-renovation branch to HEAD.

This branch was a major cleanup and rototill of many of the various OEA
cpu based PPC ports that focused on sharing as much code as possible
between the various ports to eliminate near-identical copies of files in
every tree. Additionally there is a new PIC system that unifies the
interface to interrupt code for all different OEA ppc arches. The work
for this branch was done by a variety of people, too long to list here.

TODO:
bebox still needs work to complete the transition to -renovation.
ofppc still needs a bunch of work, which I will be looking at.
ev64260 still needs to be renovated
amigappc was not attempted.

NOTES:
pmppc was removed as an arch, and moved to a evbppc target.

branches: 1.1.2; 1.1.6; 1.1.8;
file pci_machdep_ofw.c was initially added on branch ppcoea-renovation.

Style and cosmetic changes. No binary changes intended.

Provide the pci_* routines for modules to use.

Use {,e}isabus_attach().

Use device_{get,set}prop_bool() for "prep-raven-pchb".

fix few typos in comments.

Merge thorpej-cfargs2.

branches: 1.9.8;
Merge thorpej-cfargs branch:

Simplify and make extensible the config_search() / config_found() /
config_attach() interfaces: rather than having different variants for
which arguments you want pass along, just have a single call that
takes a variadic list of tag-value arguments.

Adjust all call sites:
- Simplify wherever possible; don't pass along arguments that aren't
actually needed.
- Don't be explicit about what interface attribute is attaching if
the device only has one. (More simplification.)
- Add a config_probe() function to be used in indirect configuiration
situations, making is visibly easier to see when indirect config is
in play, and allowing for future change in semantics. (As of now,
this is just a wrapper around config_match(), but that is an
implementation detail.)

Remove unnecessary or redundant interface attributes where they're not
needed.

There are currently 5 "cfargs" defined:
- CFARG_SUBMATCH (submatch function for direct config)
- CFARG_SEARCH (search function for indirect config)
- CFARG_IATTR (interface attribte)
- CFARG_LOCATORS (locators array)
- CFARG_DEVHANDLE (devhandle_t - wraps OFW, ACPI, etc. handles)

...and a sentinel value CFARG_EOL.

Add some extra sanity checking to ensure that interface attributes
aren't ambiguous.

Use CFARG_DEVHANDLE in MI FDT, OFW, and ACPI code, and macppc and shark
ports to associate those device handles with device_t instance. This
will trickle trough to more places over time (need back-end for pre-OFW
Sun OBP; any others?).

branches: 1.8.4;
Style and cosmetic changes. No binary changes intended.

#include <sys/bus.h> instead of <machine/bus.h>.

struct device * -> device_t
struct cfdata * -> cfdata_t
split device/softc (CFATTACH_DECL_NEW)
use device_accessors and device_private
constify

branches: 1.5.32;
Move to 2 clause TNF license

branches: 1.4.2; 1.4.4;
split device_t/softc. Use device_xname and device_private.

branches: 1.3.6;
Add support to ofppc for the IBM 7044-270 machine. This is a POWER3-II
based machine. Currently the kernel to run on this machine is
incompatible with the standard GENERIC kernel, so for now, we have a
separate GENERIC_B64. Eventually, I hope to combine the two.

Please note, this is a port of 32bit ofppc, not a powerpc64 port.

Thanks to Matt Thomas and Kevin Bowling for helping to make this port
possible.

Summary of changes:

Change ofwpci to use the ofmethod config for configuring the PCI bus,
rather than indirect configuration.
Move the wiring of the interrupt controllers from at the start of the
boot, into the configuration of the first PCI bus.
Rewrite the map_isa_ioregs() hack to work on a machine without BATs
Fix a ton of bugs in the genofw_find_pics routine, and in the map_space code.
Split the pic_openpic into openpic_common and pic_openpic.
Create a new pic_distopenpic driver, for the distributed openpic found on
some newer IBM machines.
Fix a bad panic in pmap_extract on 64bit bridge mode

branches: 1.2.2; 1.2.4; 1.2.6; 1.2.8; 1.2.14;
Merge the ppcoea-renovation branch to HEAD.

This branch was a major cleanup and rototill of many of the various OEA
cpu based PPC ports that focused on sharing as much code as possible
between the various ports to eliminate near-identical copies of files in
every tree. Additionally there is a new PIC system that unifies the
interface to interrupt code for all different OEA ppc arches. The work
for this branch was done by a variety of people, too long to list here.

TODO:
bebox still needs work to complete the transition to -renovation.
ofppc still needs a bunch of work, which I will be looking at.
ev64260 still needs to be renovated
amigappc was not attempted.

NOTES:
pmppc was removed as an arch, and moved to a evbppc target.

branches: 1.1.2; 1.1.6; 1.1.8;
file pcib.c was initially added on branch ppcoea-renovation.

Drop unused headers. No functional changes intended.

branches: 1.6.30;
PCI Extended Configuration stuff written by nonaka@:
- Add PCI Extended Configuration Space support into x86.
- Check register offset of pci_conf_read() in MD part. It returns (pcireg_t)-1
if it isn't accessible.
- Decode Extended Capability in PCI Extended Configuration Space.
Currently the following extended capabilities are decoded:
- Advanced Error Reporting
- Virtual Channel
- Device Serial Number
- Power Budgeting
- Root Complex Link Declaration
- Root Complex Event Collector Association
- Access Control Services
- Alternative Routing-ID Interpretation
- Address Translation Services
- Single Root IO Virtualization
- Page Request
- TPH Requester
- Latency Tolerance Reporting
- Secondary PCI Express
- Process Address Space ID
- LN Requester
- L1 PM Substates
The following extended capabilities are not decoded yet:
- Root Complex Internal Link Control
- Multi-Function Virtual Channel
- RCRB Header
- Vendor Unique
- Configuration Access Correction
- Multiple Root IO Virtualization
- Multicast
- Resizable BAR
- Dynamic Power Allocation
- Protocol Multiplexing
- Downstream Port Containment
- Precision Time Management
- M-PCIe
- Function Reading Status Queueing
- Readiness Time Reporting
- Designated Vendor-Specific

branches: 1.5.12; 1.5.30;
Use <sys/foo.h> instead of <machine/foo.h> if such a file exists.
Don't assume <sys/cpu.h> includes <powerpc/subarch/cpu*.h>. Include it
explicitly.

struct device * -> device_t
struct cfdata * -> cfdata_t
split device/softc (CFATTACH_DECL_NEW)
use device_accessors and device_private
constify

branches: 1.3.32;
Remove clause 3 and 4 from TNF licenses

branches: 1.2.2; 1.2.4; 1.2.8; 1.2.22; 1.2.24; 1.2.26;
Merge the ppcoea-renovation branch to HEAD.

This branch was a major cleanup and rototill of many of the various OEA
cpu based PPC ports that focused on sharing as much code as possible
between the various ports to eliminate near-identical copies of files in
every tree. Additionally there is a new PIC system that unifies the
interface to interrupt code for all different OEA ppc arches. The work
for this branch was done by a variety of people, too long to list here.

TODO:
bebox still needs work to complete the transition to -renovation.
ofppc still needs a bunch of work, which I will be looking at.
ev64260 still needs to be renovated
amigappc was not attempted.

NOTES:
pmppc was removed as an arch, and moved to a evbppc target.

branches: 1.1.2; 1.1.6; 1.1.8;
file pciconf_indirect.c was initially added on branch ppcoea-renovation.

Drop unused headers. No functional changes intended.

branches: 1.6.2;
Style and cosmetic changes. No binary changes intended.

PCI Extended Configuration stuff written by nonaka@:
- Add PCI Extended Configuration Space support into x86.
- Check register offset of pci_conf_read() in MD part. It returns (pcireg_t)-1
if it isn't accessible.
- Decode Extended Capability in PCI Extended Configuration Space.
Currently the following extended capabilities are decoded:
- Advanced Error Reporting
- Virtual Channel
- Device Serial Number
- Power Budgeting
- Root Complex Link Declaration
- Root Complex Event Collector Association
- Access Control Services
- Alternative Routing-ID Interpretation
- Address Translation Services
- Single Root IO Virtualization
- Page Request
- TPH Requester
- Latency Tolerance Reporting
- Secondary PCI Express
- Process Address Space ID
- LN Requester
- L1 PM Substates
The following extended capabilities are not decoded yet:
- Root Complex Internal Link Control
- Multi-Function Virtual Channel
- RCRB Header
- Vendor Unique
- Configuration Access Correction
- Multiple Root IO Virtualization
- Multicast
- Resizable BAR
- Dynamic Power Allocation
- Protocol Multiplexing
- Downstream Port Containment
- Precision Time Management
- M-PCIe
- Function Reading Status Queueing
- Readiness Time Reporting
- Designated Vendor-Specific

branches: 1.4.12; 1.4.30;
Use <sys/foo.h> instead of <machine/foo.h> if such a file exists.
Don't assume <sys/cpu.h> includes <powerpc/subarch/cpu*.h>. Include it
explicitly.

struct device * -> device_t
struct cfdata * -> cfdata_t
split device/softc (CFATTACH_DECL_NEW)
use device_accessors and device_private
constify

branches: 1.2.32;
Remove clause 3 and 4 from TNF licenses

branches: 1.1.2; 1.1.4; 1.1.8; 1.1.10; 1.1.24; 1.1.26; 1.1.28;
Add a bunch of fixes and minor rewrites to ofppc to bring it closer to
working properly. This is still a work in progress, and all work so far
has been based on the PegasosII machne.

1) Rewrite how the ISA memory and IO space maps are found. More work
will still need to be done in this area.
2) Add a new OFW method of pci configuration. So far I can only get this
to work on the primary PCI bus on the Pegasos. Unsure if this is a
pegasos bug or a code bug.
3) Add the rtas device to ofppc, and add an "rtas_reboot" function to
rtas to allow me to reboot the PegasosII. The rtas driver works, and is
a great start but needs to be changed slightly to allow easier access to
the functions from outside the driver.
4) Fix a number of bugs that existed in the shared PCI code for ofw that
probably weren't tickled by macppc.

There is much much more left to do here, this is all still a work in
progress, but this commit will allow other people to play around with the
code if they want to.