Merge thorpej-cfargs2.

branches: 1.23.8;
Merge thorpej-cfargs branch:

Simplify and make extensible the config_search() / config_found() /
config_attach() interfaces: rather than having different variants for
which arguments you want pass along, just have a single call that
takes a variadic list of tag-value arguments.

Adjust all call sites:
- Simplify wherever possible; don't pass along arguments that aren't
actually needed.
- Don't be explicit about what interface attribute is attaching if
the device only has one. (More simplification.)
- Add a config_probe() function to be used in indirect configuiration
situations, making is visibly easier to see when indirect config is
in play, and allowing for future change in semantics. (As of now,
this is just a wrapper around config_match(), but that is an
implementation detail.)

Remove unnecessary or redundant interface attributes where they're not
needed.

There are currently 5 "cfargs" defined:
- CFARG_SUBMATCH (submatch function for direct config)
- CFARG_SEARCH (search function for indirect config)
- CFARG_IATTR (interface attribte)
- CFARG_LOCATORS (locators array)
- CFARG_DEVHANDLE (devhandle_t - wraps OFW, ACPI, etc. handles)

...and a sentinel value CFARG_EOL.

Add some extra sanity checking to ensure that interface attributes
aren't ambiguous.

Use CFARG_DEVHANDLE in MI FDT, OFW, and ACPI code, and macppc and shark
ports to associate those device handles with device_t instance. This
will trickle trough to more places over time (need back-end for pre-OFW
Sun OBP; any others?).

branches: 1.22.2;
malloc(9) -> kmem(9)

branches: 1.21.8;
in many device attach paths, allocate memory with M_WAITOK instead of M_NOWAIT
and remove code to handle failures that can no longer happen.

branches: 1.20.54;
#include <sys/bus.h> instead of <machine/bus.h>.

struct device * -> device_t
struct cfdata * -> cfdata_t
use device accessors, use device_private.
some softc/device_t splits (macppc needs a bunch more)
aprint*_dev used considerably more

branches: 1.18.12;
kill MALLOC and FREE macros.

branches: 1.17.8;
Remove clause 3 and 4 from TNF licenses

branches: 1.16.16; 1.16.18; 1.16.20;
Merge the ppcoea-renovation branch to HEAD.

This branch was a major cleanup and rototill of many of the various OEA
cpu based PPC ports that focused on sharing as much code as possible
between the various ports to eliminate near-identical copies of files in
every tree. Additionally there is a new PIC system that unifies the
interface to interrupt code for all different OEA ppc arches. The work
for this branch was done by a variety of people, too long to list here.

TODO:
bebox still needs work to complete the transition to -renovation.
ofppc still needs a bunch of work, which I will be looking at.
ev64260 still needs to be renovated
amigappc was not attempted.

NOTES:
pmppc was removed as an arch, and moved to a evbppc target.

branches: 1.15.2; 1.15.10; 1.15.18; 1.15.20; 1.15.22; 1.15.24;
Kill caddr_t; there will be some MI fallout, but it will be fixed shortly.

branches: 1.14.14;
More KNF. That should be the rest of the .c files.

Add an extra cookie to the ioctl and mmap wsdisplay accessops that points
to the screen on which they are being called. The driver cannot guess
this by itself but it is needed to implement, at least, the getwschar and
putwschar functions in the correct place. There are no functional changes
yet.

Tested on i386 (vga, vga_raster, machfb, vesafb), macppc and sparc64.
Suggested and reviewed by macallan@.

branches: 1.12.4; 1.12.6; 1.12.8; 1.12.10; 1.12.12;
merge ktrace-lwp.

branches: 1.11.12;
pass string length (= boundary info) to pci_devinfo so that we do not run over
the end of memory region

eliminate uvm_useracc() in favor of checking the return value of
copyin() or copyout().

uvm_useracc() tells us whether the mapping permissions allow access to
the desired part of an address space, and many callers assume that
this is the same as knowing whether an attempt to access that part of
the address space will succeed. however, access to user space can
fail for reasons other than insufficient permission, most notably that
paging in any non-resident data can fail due to i/o errors. most of
the callers of uvm_useracc() make the above incorrect assumption. the
rest are all misguided optimizations, which optimize for the case
where an operation will fail. we'd rather optimize for operations
succeeding, in which case we should just attempt the access and handle
failures due to insufficient permissions the same way we handle i/o
errors. since there appear to be no good uses of uvm_useracc(), we'll
just remove it.

__KERNEL_RCSID()

branches: 1.8.6;
Add trailing ; to CFATTACH_DECL.

Use CFATTACH_DECL().

Declare all cfattach structures const.

alloc_attr -> allocattr

Approved by Matthias Drochner.

branches: 1.4.4;
Convert ioctl code to use EPASSTHROUGH instead of -1 or ENOTTY for
indicating an unhandled "command". ERESTART is -1, which can lead to
confusion. ERESTART has been moved to -3 and EPASSTHROUGH has been
placed at -4. No ioctl code should now return -1 anywhere. The
ioctl() system call is now properly restartable.

In order to support both indirect PCI configuration space access as well
as direct-mapped PCI configuration space access (such as implemented on
the IBM 27-82650 PCI Host Bridge), switch to a function vector based
PCI configuration space access implementation. The appropriate PCI
chipset tag is provided by platform-specific code.

branches: 1.2.2; 1.2.6; 1.2.10;
Cleanup/fixup gten support. Add TNF copyright (opps). This now outputs
text correctly. There is no colormap support (e.g. the mechanisms are in
place but does yet talk to the hardware).

Add support for the IBM ThinkPad 820 G10 display (which is a WD90C24A behind
a funky PCI-VLBUS bridge).

Use {,e}isabus_attach().

Merge thorpej-cfargs2.

branches: 1.7.8;
Merge thorpej-cfargs branch:

Simplify and make extensible the config_search() / config_found() /
config_attach() interfaces: rather than having different variants for
which arguments you want pass along, just have a single call that
takes a variadic list of tag-value arguments.

Adjust all call sites:
- Simplify wherever possible; don't pass along arguments that aren't
actually needed.
- Don't be explicit about what interface attribute is attaching if
the device only has one. (More simplification.)
- Add a config_probe() function to be used in indirect configuiration
situations, making is visibly easier to see when indirect config is
in play, and allowing for future change in semantics. (As of now,
this is just a wrapper around config_match(), but that is an
implementation detail.)

Remove unnecessary or redundant interface attributes where they're not
needed.

There are currently 5 "cfargs" defined:
- CFARG_SUBMATCH (submatch function for direct config)
- CFARG_SEARCH (search function for indirect config)
- CFARG_IATTR (interface attribte)
- CFARG_LOCATORS (locators array)
- CFARG_DEVHANDLE (devhandle_t - wraps OFW, ACPI, etc. handles)

...and a sentinel value CFARG_EOL.

Add some extra sanity checking to ensure that interface attributes
aren't ambiguous.

Use CFARG_DEVHANDLE in MI FDT, OFW, and ACPI code, and macppc and shark
ports to associate those device handles with device_t instance. This
will trickle trough to more places over time (need back-end for pre-OFW
Sun OBP; any others?).

branches: 1.6.68;
#include <sys/bus.h> instead of <machine/bus.h>.

struct device * -> device_t
struct cfdata * -> cfdata_t
use device accessors, use device_private.
some softc/device_t splits (macppc needs a bunch more)
aprint*_dev used considerably more

More device_t, cfdata, CFATTACH_DECL_NEW cleanup.

branches: 1.3.22; 1.3.32;
Remove clause 3 and 4 from TNF licenses

branches: 1.2.16; 1.2.18; 1.2.20;
Merge the ppcoea-renovation branch to HEAD.

This branch was a major cleanup and rototill of many of the various OEA
cpu based PPC ports that focused on sharing as much code as possible
between the various ports to eliminate near-identical copies of files in
every tree. Additionally there is a new PIC system that unifies the
interface to interrupt code for all different OEA ppc arches. The work
for this branch was done by a variety of people, too long to list here.

TODO:
bebox still needs work to complete the transition to -renovation.
ofppc still needs a bunch of work, which I will be looking at.
ev64260 still needs to be renovated
amigappc was not attempted.

NOTES:
pmppc was removed as an arch, and moved to a evbppc target.

branches: 1.1.2; 1.1.10; 1.1.16; 1.1.22; 1.1.32; 1.1.40; 1.1.50; 1.1.52; 1.1.54; 1.1.56;
Commit support for the IBM Model 7024 E20 and E30. (E30 not tested).

Changes:
Added a pci-EISA bridge device and associated glue to the prep port.
Adapted from i386.
Change pci_intr_fixup_*() to pass the pin argument on all platforms.
Make PCI_NETBSD_CONFIGURE leave the MPIC alone. We map it separately.

7024 kernel was also succ. tested on an IBM 7043, so no regression there.

Merge the ppcoea-renovation branch to HEAD.

This branch was a major cleanup and rototill of many of the various OEA
cpu based PPC ports that focused on sharing as much code as possible
between the various ports to eliminate near-identical copies of files in
every tree. Additionally there is a new PIC system that unifies the
interface to interrupt code for all different OEA ppc arches. The work
for this branch was done by a variety of people, too long to list here.

TODO:
bebox still needs work to complete the transition to -renovation.
ofppc still needs a bunch of work, which I will be looking at.
ev64260 still needs to be renovated
amigappc was not attempted.

NOTES:
pmppc was removed as an arch, and moved to a evbppc target.

branches: 1.9.18; 1.9.26; 1.9.36; 1.9.38; 1.9.40; 1.9.42;
ANSIfy more code in prep.

branches: 1.8.4; 1.8.6; 1.8.8; 1.8.10; 1.8.12;
merge ktrace-lwp.

branches: 1.7.12;
pass string length (= boundary info) to pci_devinfo so that we do not run over
the end of memory region

__KERNEL_RCSID()

branches: 1.5.6;
Add trailing ; to CFATTACH_DECL.

Use CFATTACH_DECL().

Declare all cfattach structures const.

The MPC105 does not implement the IBM reference implementation's
Equipment Present Register (I/O port 0x080c), so perform L2 cache
detection here.

branches: 1.1.6; 1.1.10; 1.1.14;
Initial import prep port.

malloc(9) -> kmem(9)

branches: 1.43.8;
in many device attach paths, allocate memory with M_WAITOK instead of M_NOWAIT
and remove code to handle failures that can no longer happen.

branches: 1.42.16;
Added MSI/MSI-X and interrupt_distribute(9) support for powerpc.

branches: 1.41.2; 1.41.4;
src is too big these days to tolerate superfluous apostrophes. It's
"its", people!

GCC 4.8 build fixes from John D. Baker

kill sprintf

branches: 1.38.2; 1.38.12; 1.38.16;
Init MSI hooks.

#include <sys/bus.h> instead of <machine/bus.h>.

Modify mapiodev to take a third argument indicating whether the space
should be prefetchable (true) or not (false).

Add support pci_intr_setattr.
Export non-inline version of pci api for modules (_MODULE is defined).
Fix definition of pc_conf_hook and pc_conf_interrupt.
Switch to using inlines instead of macros.
Switch ibm4xx to use <powerpc/pci_machdep.h>

Neither pci_dma64_available(), pci_probe_device(), pci_mapreg_map(9),
pci_find_rom(), pci_intr_map(9), pci_enumerate_bus(), nor the match
predicate passed to pciide_compat_intr_establish() should ever modify
their pci_attach_args argument, so make their pci_attach_args arguments
const and deal with the fallout throughout the kernel.

For the most part, these changes add a 'const' where there was no
'const' before, however, some drivers and MD code used to modify
pci_attach_args. Now those drivers either copy their pci_attach_args
and modify the copy, or refrain from modifying pci_attach_args:

Xen: according to Manuel Bouyer, writing to pci_attach_args in
pci_intr_map() was a leftover from Xen 2. Probably a bug. I
stopped writing it. I have not tested this change.

siside(4): sis_hostbr_match() needlessly wrote to pci_attach_args.
Probably a bug. I use a temporary variable. I have not tested this
change.

slide(4): sl82c105_chip_map() overwrote the caller's pci_attach_args.
Probably a bug. Use a local pci_attach_args. I have not tested
this change.

viaide(4): via_sata_chip_map() and via_sata_chip_map_new() overwrote the
caller's pci_attach_args. Probably a bug. Make a local copy of the
caller's pci_attach_args and modify the copy. I have not tested
this change.

While I'm here, make pci_mapreg_submap() static.

With these changes in place, I have tested the compilation of these
kernels:

alpha GENERIC
amd64 GENERIC XEN3_DOM0
arc GENERIC
atari HADES MILAN-PCIIDE
bebox GENERIC
cats GENERIC
cobalt GENERIC
evbarm-eb NSLU2
evbarm-el ADI_BRH ARMADILLO9 CP3100 GEMINI GEMINI_MASTER GEMINI_SLAVE GUMSTIX
HDL_G IMX31LITE INTEGRATOR IQ31244 IQ80310 IQ80321 IXDP425 IXM1200
KUROBOX_PRO LUBBOCK MARVELL_NAS NAPPI SHEEVAPLUG SMDK2800 TEAMASA_NPWR
TEAMASA_NPWR_FC TS7200 TWINTAIL ZAO425
evbmips-el AP30 DBAU1500 DBAU1550 MALTA MERAKI MTX-1 OMSAL400 RB153 WGT624V3
evbmips64-el XLSATX
evbppc EV64260 MPC8536DS MPC8548CDS OPENBLOCKS200 OPENBLOCKS266
OPENBLOCKS266_OPT P2020RDB PMPPC RB800 WALNUT
hp700 GENERIC
i386 ALL XEN3_DOM0 XEN3_DOMU
ibmnws GENERIC
macppc GENERIC
mvmeppc GENERIC
netwinder GENERIC
ofppc GENERIC
prep GENERIC
sandpoint GENERIC
sgimips GENERIC32_IP2x
sparc GENERIC_SUN4U KRUPS
sparc64 GENERIC

As of Sun Apr 3 15:26:26 CDT 2011, I could not compile these kernels
with or without my patches in place:

### evbmips-el GDIUM

nbmake: nbmake: don't know how to make /home/dyoung/pristine-nbsd/src/sys/arch/mips/mips/softintr.c. Stop

### evbarm-el MPCSA_GENERIC
src/sys/arch/evbarm/conf/MPCSA_GENERIC:318: ds1672rtc*: unknown device `ds1672rtc'

### ia64 GENERIC

/tmp/genassym.28085/assym.c: In function 'f111':
/tmp/genassym.28085/assym.c:67: error: invalid application of 'sizeof' to incomplete type 'struct pcb'
/tmp/genassym.28085/assym.c:76: error: dereferencing pointer to incomplete type

### sgimips GENERIC32_IP3x

crmfb.o: In function `crmfb_attach':
crmfb.c:(.text+0x2304): undefined reference to `ddc_read_edid'
crmfb.c:(.text+0x2304): relocation truncated to fit: R_MIPS_26 against `ddc_read_edid'
crmfb.c:(.text+0x234c): undefined reference to `edid_parse'
crmfb.c:(.text+0x234c): relocation truncated to fit: R_MIPS_26 against `edid_parse'
crmfb.c:(.text+0x2354): undefined reference to `edid_print'
crmfb.c:(.text+0x2354): relocation truncated to fit: R_MIPS_26 against `edid_print'

branches: 1.33.2;
Change definition of pc_bus_maxdevs to get a void * instead a pci_chipset_tag_t
to match its use in pci_bus_maxdevs. This makes it the same as pci_conf_read
and pci_conf_write.
Change all struct device * to device_t.
[Obviously nothing ever used the first argument to pc_bus_maxdevs since it
could have never worked because it wasn't being passed a pci_chipset_tag_t.]

branches: 1.32.42; 1.32.46;
Merge the ppcoea-renovation branch to HEAD.

This branch was a major cleanup and rototill of many of the various OEA
cpu based PPC ports that focused on sharing as much code as possible
between the various ports to eliminate near-identical copies of files in
every tree. Additionally there is a new PIC system that unifies the
interface to interrupt code for all different OEA ppc arches. The work
for this branch was done by a variety of people, too long to list here.

TODO:
bebox still needs work to complete the transition to -renovation.
ofppc still needs a bunch of work, which I will be looking at.
ev64260 still needs to be renovated
amigappc was not attempted.

NOTES:
pmppc was removed as an arch, and moved to a evbppc target.

branches: 1.31.4; 1.31.12; 1.31.14; 1.31.16; 1.31.18;
When we have a non-PReP pci bridge, we need to perform a single swizzle
on the pin, to get us the right pin on the underlying PReP bridge to wire
the interrupt to. Tested with a 4-port fxp card on a 7043-140. Thanks
to simon for helping me get the math right.

Add a second check to the prep-pci-intrmap test, to make sure the dictionary
actually contains entries. It is apparently possible to get a non-null,
but empty dictionary back. This seems to happen if you inject a ppb-card
on pci0 when you also have a prep pci1 at a later device function. With
this, my fxp card works in any slot on my 7043-140.

The motorola RAVEN is both a pchb and an MPIC. Block out the pci
configuration of it's mem area to keep the PIC available.

branches: 1.28.6; 1.28.8; 1.28.12; 1.28.14; 1.28.16;
Add preliminary support for the 7025-F40. The MPIC must not be wired up
by the initial PCI_NETBSD_CONFIGURE, nor should it be manually wired by
the indirect stuff. This is all taken care of by the prep_init() function.
7025-F40 support supports the primary pci bus only. The second PCI bus
on the machine is still unsupported, but the machine runs and can access
everything except for the two slots the other bus covers.

branches: 1.27.4;
Completely rework how we look up PCI interrupts on prep:

1) Rather than build an array of the pci->intr mappings, build a proplib
tree.
2) add a SIMPLEQ of device properties to the pci_chipset_tag to hold the
proplib trees of each bus.
3) Move the interrupt routing code from pci_conf_interrupt to pci_map_intr()
4) Deal properly with non-native PCI bridge chips that are not recognized
by the prep firmware, and therefore are not noted in the residual data.

The major win of this restructure is #4. Hopefully I haven't broken
anything. Tested on a 7248-100, 7043-140 and 7024-E20.

Implement partial support for the RS6K PCI Bridge found on 7025-F40
models. This code was made possible by assistance from Cory Bajus.

Add code that asks the PCI bridge what it's config base address is, and
use that when wiring up an indirect bridge type.
Move prep's user segment register to 10, because the 7025's PCI config
address is at 11, where the user segment used to be.
Add a battable entry for 0xbf800000 for machines with RS6K bridges.

There is still probably work left to be done before a 7025-F40 is fully
supported.

branches: 1.25.2;
s/allready/already/

branches: 1.24.2;
Prep super-commit:

1) create new pnpbus psuedo bus. This is a bus layer that reads the PNP
tree from the residual data and allows attachment of devices with the
information given therein. Based loosely on i386/pnpbios.

2) Delete obio bus, as with the pnp bus we no longer need it.

3) Create a number of functions that gather the information needed to set
up the machine from the residual data, rather than hardcoding it in.

4) Create a quirk table for machines that are bizzare enough that the
residual information is not sufficient. (such as the 6015)

5) Using the data gathering routines and the quirk table, delete struct
platform completely from the architecture. Prep is now almost completely
dynamic in figuring out the machine it is running on and setting things
up properly.

6) Add a wdc_pnpbus driver which attaches the wdc controller found on
some 7248's and the 6015. This replaces the now-defunct wdc_obio.

7) delete all the mot_* and ibm_* files, and replace them with a single
ibm_machdep.c which only contains the quirk functions for the 6015 and
the 6050.

8) Modify GENERIC to work with all this stuff.

branches: 1.23.2; 1.23.4;
Commit support for the IBM Model 7024 E20 and E30. (E30 not tested).

Changes:
Added a pci-EISA bridge device and associated glue to the prep port.
Adapted from i386.
Change pci_intr_fixup_*() to pass the pin argument on all platforms.
Make PCI_NETBSD_CONFIGURE leave the MPIC alone. We map it separately.

7024 kernel was also succ. tested on an IBM 7043, so no regression there.

PCI_NETBSD_CONFIGURE should allocate (but not map) address space expansion
ROMS by default. Full discussion at
http://mail-index.netbsd.org/tech-kern/2005/12/16/0023.html
Closes PR kern/32467
Reviewed by briggs@

branches: 1.21.2; 1.21.4; 1.21.6;
merge ktrace-lwp.

branches: 1.20.2;
RCSId police.

Pass the interrupt swizzle down to the platforms' fixup functions.
N.B. Only using it on the ulmb60xa for now.

__KERNEL_RCSID()

branches: 1.17.6;
remove trailing \n in panic(). approved perry.

Declare the id argument to pci_conf_hook(9) as pcireg_t, which is more
appropriate.

In order to support both indirect PCI configuration space access as well
as direct-mapped PCI configuration space access (such as implemented on
the IBM 27-82650 PCI Host Bridge), switch to a function vector based
PCI configuration space access implementation. The appropriate PCI
chipset tag is provided by platform-specific code.

branches: 1.14.2;
pci_conf_interrupt() takes bus/dev/pin, not bus/dev/func.

branches: 1.13.2; 1.13.6;
Seprate model depended code. (based on arc 'struct platform')

files.prep:
- add new files entry.

pci_machdep.c:
- use dev/pci/pciconf.c instead of mine for pci io/mem addr/intr fixup.

cpu.c:
- separate code

machdep.c:
- call ident_platform()

mainbus.c:
- call pci_configure_bus(), if defined PCI_NETBSD_CONFIGURE

ibm_machdep.c:
- for IBM PReP generic

ibm_6050.c:
- for IBM Personal Power Series 830/850

ibm_7248.c:
- for IBM RS6000/43P deppendency

Back out last changes.

identified prep model.

Use new common bus.h framework.

delint: don't try & return something from void pci_intr_disestablish()

branches: 1.8.2;
Change pci_intr_map to get interrupt source information from a "struct
pci_attach_args *" instead of from four separate parameters which in
all cases were extracted from the same "struct pci_attach_args".

This both simplifies the driver api, and allows for alternate PCI
interrupt mapping schemes, such as one using the tables described in
the Intel Multiprocessor Spec which describe interrupt wirings for
devices behind pci-pci bridges based on the device's location rather
the bridge's location.

Tested on alpha and i386; welcome to 1.5Q

Rework bus_space to conform the PReP I/O & MEM limits. Add a few debugging
printfs concerning interrupts.

branches: 1.6.2;
remove include of <vm/vm.h>. <vm/vm.h> -> <uvm/uvm_extern.h>

remove/move more mach vm header files:

<vm/pglist.h> -> <uvm/uvm_pglist.h>
<vm/vm_inherit.h> -> <uvm/uvm_inherit.h>
<vm/vm_kern.h> -> into <uvm/uvm_extern.h>
<vm/vm_object.h> -> nothing
<vm/vm_pager.h> -> into <uvm/uvm_pager.h>

also includes a bunch of <vm/vm_page.h> include removals (due to redudancy
with <vm/vm.h>), and a scattering of other similar headers.

- rewrite enable io/mem space code.
(rewriten by Tim Rightnour <garbled@netbsd.org>, thanks!)
- more fixup pci base address.

branches: 1.3.2;
Implement the more flexiable `evcnt' interface as discussed (briefly) on
tech-kern and now documented in evcnt(9).

branches: 1.2.2;
more fixup pci base address

Initial import prep port.

Merge the ppcoea-renovation branch to HEAD.

This branch was a major cleanup and rototill of many of the various OEA
cpu based PPC ports that focused on sharing as much code as possible
between the various ports to eliminate near-identical copies of files in
every tree. Additionally there is a new PIC system that unifies the
interface to interrupt code for all different OEA ppc arches. The work
for this branch was done by a variety of people, too long to list here.

TODO:
bebox still needs work to complete the transition to -renovation.
ofppc still needs a bunch of work, which I will be looking at.
ev64260 still needs to be renovated
amigappc was not attempted.

NOTES:
pmppc was removed as an arch, and moved to a evbppc target.

branches: 1.20.2; 1.20.10; 1.20.12; 1.20.14; 1.20.16;
Rather than use the residual data to guess that we have a raven pchb,
note the raven pchb in device_register, and then look that up when
attaching the pcib.

Add special code to properly detect a W83C553 pcib sitting on a RAVEN
based machine. When we do, we have to frob a few special bits on the
pcib to finish the setup that the prom didn't bother completing for us.
With this change, NetBSD finally runs on the MTX604 board.. Many thanks
to John Baker for providing remote access to the machine, and rebooting
it repeatedly for me.

branches: 1.18.6; 1.18.8; 1.18.12; 1.18.14;
Fix a horrible bug in how we initialize the 8259 interrupt controller.
The bug displayed itself by locking up console output on a 7043-140
following a powercycle. This may also have been the cause of bogus
interrupts on motorola class machines.

branches: 1.17.2;
Attach the pnpbus prior to attaching the pci bus on the prep. This
should allow us to probe for both pnp-attached devices and isa-attached
devices while preferring the pnpbus attachment point.

branches: 1.16.4;
ANSIfy more code in prep.

branches: 1.15.2;
Prep super-commit:

1) create new pnpbus psuedo bus. This is a bus layer that reads the PNP
tree from the residual data and allows attachment of devices with the
information given therein. Based loosely on i386/pnpbios.

2) Delete obio bus, as with the pnp bus we no longer need it.

3) Create a number of functions that gather the information needed to set
up the machine from the residual data, rather than hardcoding it in.

4) Create a quirk table for machines that are bizzare enough that the
residual information is not sufficient. (such as the 6015)

5) Using the data gathering routines and the quirk table, delete struct
platform completely from the architecture. Prep is now almost completely
dynamic in figuring out the machine it is running on and setting things
up properly.

6) Add a wdc_pnpbus driver which attaches the wdc controller found on
some 7248's and the 6015. This replaces the now-defunct wdc_obio.

7) delete all the mot_* and ibm_* files, and replace them with a single
ibm_machdep.c which only contains the quirk functions for the 6015 and
the 6050.

8) Modify GENERIC to work with all this stuff.

branches: 1.14.4; 1.14.6; 1.14.8; 1.14.10;
merge ktrace-lwp.

branches: 1.13.12;
Phase out the use of a string as first "attach args" member to control
which bustype should be attached with a specific call to config_found()
(from a "mainbus" or a bus bridge).
Do it for isa/eisa/mca and pci/agp for now. These buses all attach to
an mi interface attribute "isabus", "eisabus" etc., and the autoconf
framework now allows to specify an interface attribute on config_found()
and config_search(), which limits the search of matching config data
to these which attach to that specific attribute.
So we basically have to call config_found_ia(..., "foobus", ...) where
such a bus is attached.
As a consequence, where a "mainbus" or alike also attaches other
devices (eg CPUs) which do not attach to a specific attribute yet,
we need at least pass an attribute name (different from "foobus") so
that the foo bus is not found at these places. This made some minor
changes necessary which are not obviously related to the mentioned buses.

pass string length (= boundary info) to pci_devinfo so that we do not run over
the end of memory region

__KERNEL_RCSID()

branches: 1.10.2;
Add platform support for the IBM PPS Model 6040 (E) (aka ThinkPad 820).

Use aprint_normal() for cfprint routines.

Add trailing ; to CFATTACH_DECL.

Use CFATTACH_DECL().

Declare all cfattach structures const.

branches: 1.5.6;
bcopy -> memcpy, bzero -> memset

branches: 1.4.2;
Use new common bus.h framework.

branches: 1.3.2;
Add missing printf args.

Rework bus_space to conform the PReP I/O & MEM limits. Add a few debugging
printfs concerning interrupts.

branches: 1.1.6;
Initial import prep port.

Added MSI/MSI-X and interrupt_distribute(9) support for powerpc.

branches: 1.9.2;
PCI Extended Configuration stuff written by nonaka@:
- Add PCI Extended Configuration Space support into x86.
- Check register offset of pci_conf_read() in MD part. It returns (pcireg_t)-1
if it isn't accessible.
- Decode Extended Capability in PCI Extended Configuration Space.
Currently the following extended capabilities are decoded:
- Advanced Error Reporting
- Virtual Channel
- Device Serial Number
- Power Budgeting
- Root Complex Link Declaration
- Root Complex Event Collector Association
- Access Control Services
- Alternative Routing-ID Interpretation
- Address Translation Services
- Single Root IO Virtualization
- Page Request
- TPH Requester
- Latency Tolerance Reporting
- Secondary PCI Express
- Process Address Space ID
- LN Requester
- L1 PM Substates
The following extended capabilities are not decoded yet:
- Root Complex Internal Link Control
- Multi-Function Virtual Channel
- RCRB Header
- Vendor Unique
- Configuration Access Correction
- Multiple Root IO Virtualization
- Multicast
- Resizable BAR
- Dynamic Power Allocation
- Protocol Multiplexing
- Downstream Port Containment
- Precision Time Management
- M-PCIe
- Function Reading Status Queueing
- Readiness Time Reporting
- Designated Vendor-Specific

branches: 1.8.12; 1.8.30;
#include <sys/bus.h> instead of <machine/bus.h>.

struct device * -> device_t
struct cfdata * -> cfdata_t
use device accessors, use device_private.
some softc/device_t splits (macppc needs a bunch more)
aprint*_dev used considerably more

branches: 1.6.52;
Merge the ppcoea-renovation branch to HEAD.

This branch was a major cleanup and rototill of many of the various OEA
cpu based PPC ports that focused on sharing as much code as possible
between the various ports to eliminate near-identical copies of files in
every tree. Additionally there is a new PIC system that unifies the
interface to interrupt code for all different OEA ppc arches. The work
for this branch was done by a variety of people, too long to list here.

TODO:
bebox still needs work to complete the transition to -renovation.
ofppc still needs a bunch of work, which I will be looking at.
ev64260 still needs to be renovated
amigappc was not attempted.

NOTES:
pmppc was removed as an arch, and moved to a evbppc target.

branches: 1.5.16; 1.5.24; 1.5.34; 1.5.36; 1.5.38; 1.5.40;
Completely rework how we look up PCI interrupts on prep:

1) Rather than build an array of the pci->intr mappings, build a proplib
tree.
2) add a SIMPLEQ of device properties to the pci_chipset_tag to hold the
proplib trees of each bus.
3) Move the interrupt routing code from pci_conf_interrupt to pci_map_intr()
4) Deal properly with non-native PCI bridge chips that are not recognized
by the prep firmware, and therefore are not noted in the residual data.

The major win of this restructure is #4. Hopefully I haven't broken
anything. Tested on a 7248-100, 7043-140 and 7024-E20.

branches: 1.4.4; 1.4.8; 1.4.14;
merge ktrace-lwp.

branches: 1.3.16;
__KERNEL_RCSID()

branches: 1.2.2;
Switch/adapt to new bus space infrastructure.

branches: 1.1.2; 1.1.8;
In order to support both indirect PCI configuration space access as well
as direct-mapped PCI configuration space access (such as implemented on
the IBM 27-82650 PCI Host Bridge), switch to a function vector based
PCI configuration space access implementation. The appropriate PCI
chipset tag is provided by platform-specific code.

Merge the ppcoea-renovation branch to HEAD.

This branch was a major cleanup and rototill of many of the various OEA
cpu based PPC ports that focused on sharing as much code as possible
between the various ports to eliminate near-identical copies of files in
every tree. Additionally there is a new PIC system that unifies the
interface to interrupt code for all different OEA ppc arches. The work
for this branch was done by a variety of people, too long to list here.

TODO:
bebox still needs work to complete the transition to -renovation.
ofppc still needs a bunch of work, which I will be looking at.
ev64260 still needs to be renovated
amigappc was not attempted.

NOTES:
pmppc was removed as an arch, and moved to a evbppc target.

branches: 1.8.12; 1.8.20; 1.8.30; 1.8.32; 1.8.34; 1.8.36;
Add preliminary support for the 7025-F40. The MPIC must not be wired up
by the initial PCI_NETBSD_CONFIGURE, nor should it be manually wired by
the indirect stuff. This is all taken care of by the prep_init() function.
7025-F40 support supports the primary pci bus only. The second PCI bus
on the machine is still unsupported, but the machine runs and can access
everything except for the two slots the other bus covers.

branches: 1.7.4;
Completely rework how we look up PCI interrupts on prep:

1) Rather than build an array of the pci->intr mappings, build a proplib
tree.
2) add a SIMPLEQ of device properties to the pci_chipset_tag to hold the
proplib trees of each bus.
3) Move the interrupt routing code from pci_conf_interrupt to pci_map_intr()
4) Deal properly with non-native PCI bridge chips that are not recognized
by the prep firmware, and therefore are not noted in the residual data.

The major win of this restructure is #4. Hopefully I haven't broken
anything. Tested on a 7248-100, 7043-140 and 7024-E20.

Implement partial support for the RS6K PCI Bridge found on 7025-F40
models. This code was made possible by assistance from Cory Bajus.

Add code that asks the PCI bridge what it's config base address is, and
use that when wiring up an indirect bridge type.
Move prep's user segment register to 10, because the 7025's PCI config
address is at 11, where the user segment used to be.
Add a battable entry for 0xbf800000 for machines with RS6K bridges.

There is still probably work left to be done before a 7025-F40 is fully
supported.

branches: 1.5.4; 1.5.6; 1.5.8; 1.5.14;
merge ktrace-lwp.

branches: 1.4.16;
__KERNEL_RCSID()

branches: 1.3.2;
Include <machine/pio.h> for in32rb() and out32rb().

Support IBM RS/6000 43P 7043-140.

branches: 1.1.2; 1.1.8; 1.1.12;
In order to support both indirect PCI configuration space access as well
as direct-mapped PCI configuration space access (such as implemented on
the IBM 27-82650 PCI Host Bridge), switch to a function vector based
PCI configuration space access implementation. The appropriate PCI
chipset tag is provided by platform-specific code.