RISC-V support that works on QEMU with a single hart.

Thanks for Simon Burge for plic(4).

Adjust _all_ cinclude of *.local files

- Ensure always at end
- Use tab rather than spaces
- Add consistent comment
"Pull in optional local configuration - always at end"

The only functional change is that a local file which tried to
override an existing setting (eg with "no foo") would have failed
in some cases before, but now will work

Ensure GENERIC.local is always at the end of GENERIC

Where a GENERIC config had an existing inclusion of GENERIC.local,
ensure it is always at the end of the file, with a consistent
comment:

# Pull in optional local configuration
cinclude "arch/landisk/conf/GENERIC.local"

This allows GENERIC.local to correctly override all options

(This pass does not affect any GENERIC which did not already have
an include of GENERIC.local)

Add driver for SiFive FU540 PRCI clock controller.

Some comments

Include GENERIC.local if it exists.

Add NFS_BOOT_DHCP option.

"options<space><tab>"

swwdog(4): Add to GENERIC kernels.

Plus a handful of others that I'm familiar with. Lots of special-
purpose kernels should probably have this too but I'm not going
through all the arm, mips, and ppc evaluation board kernels to see
which ones are relevant.

Omitted from systems I know to be very small:
- sun2/GENERIC
- dreamcast/GENERIC
Feel free to remove it from others that need to be kept smaller.

Compile-tested a few of these just in case:
- alpha/GENERIC
- amd64/GENERIC
- evbmips/OCTEON
- i386/GENERIC
- riscv/GENERIC

PR kern/29702

Basic ddb and backtrace support.

[ 1.0000000] panic: kernel diagnostic assertion "msgbufaddr != 0" failed: file "/home/nick/netbsd/nbcvs/src/sys/arch/riscv/riscv/riscv_machdep.c", line 564
[ 1.0000000] cpu0: Begin traceback...
[ 1.0000000] trace fp ffffffc000801dd0
[ 1.0000000] fp ffffffc000801e10 ?() at ffffffc0001eee98
[ 1.0000000] fp ffffffc000801e30 ?() at ffffffc0002ad984
[ 1.0000000] fp ffffffc000801ee0 ?() at ffffffc000005430
[ 1.0000000] cpu0: End traceback...
[ 1.0000000] Trapframe @ 0xffffffc000801cb0 (cause=3 (breakpoint), status=0x100, pc=0xffffffc0000007e4, va=0):
[ 1.0000000] ra =0xffffffc0001eee9c, sp =0xffffffc000801dd0, gp =0xffffffc0006a8f40, tp = 0
[ 1.0000000] s0 =0xffffffc000600ac0, s1 = 0x1000, s2 =0xffffffc000438df0, s3 =0xffffffc000801d80
[ 1.0000000] s4 =0xffffffc0001eed78, s5 =0xffffffc0006d55f8, s6 =0xffffffc000801d88, s7 =0xffffffc0006dfdb8
[ 1.0000000] s8 =0xffffffc000428c18, s9 =0xffffffc000801dd0, s10=0xffffffc0000a3822, s11=0xffffffc0006d55f8
[ 1.0000000] a0 = 0x17, a1 = 0xa, a2 = 0, a3 =0xffffffc00041f658
[ 1.0000000] a4 = 0, a5 = 0x1, a5 = 0, a7 = 0x1
[ 1.0000000] t0 =0xffffffc0006dfe30, t1 =0xffffffc000801bb8, t2 =0xffffffc000803000, t3 = 0x75
[ 1.0000000] t4 = 0, t5 = 0x63, t6 = 0x1
[ 1.0000000] kernel: breakpoint
Stopped in pid 0.0 (system) at ffffffc0000007e4: c.ebreak
db>

Add some bus_space(9), bus_dma(9) and FDT infrastructure. Baby steps.

Remove the RISC-V Host Target Interface (HTIF) Emulation code.

UFS/LFS dirhash:
- Enable UFS_DIRHASH if the architecture or kernel model specific config
file can use 128MB of RAM or more.
- Remove experimental tag from UFS_DIRHASH; it's been with RUMP kernel
and by a number of NetBSD developers for years.
- Add LFS_DIRHASH if LFS was enabled.
- Be somewhat consistent with FS options order.

do not enable kernel OSS compat in configs without compat_linux

perhaps kernel OSS compat can be merged into compat_linux to avoid
further confusion

Miscellaneous updates to reflect riscv-privileged-20190608.pdf

Some from zmcgrew@

branches: 1.10.10;
Misc changes in RISC-V. Start changing the memory layout, too.

Unreference IPF/PF from all the config files, and enable NPF instead when
wanted. This also fixes some inconsistencies I saw in several files (eg
IPF options while IPF was not compiled, IPF+PF enabled by default, etc).

branches: 1.8.2; 1.8.4; 1.8.6;
Revive commented out DISKLABEL_EI option to kernel configuration files
that contain FFS_EI option.

clean up COMPAT_* options for native netbsd code:
- new series of files that are useful for saying "i want everything
since netbsd 1.4", etc.
- use the fact COMPAT_* options have future dependancies to remove
many redundant options.

removes about 3000 lines total across kernel configuration files.
tested about 30 random kernels in the changed list.

Remove commented DISKLABEL_EI for strictly little endian architectures

It will never be useful.

Add DKWEDGE_METHOD_RDB option, which is enabled for x86, commented out for
other platforms by default.

PR kern/51208
Add DISKLABEL_EI option (and also FFS_EI if missing), commented out except for
ALL on amd64 and i386.

branches: 1.3.2;
rename ifmpls to mpls, so we don't have if_ifmpls...

branches: 1.2.2;
Remove KMEMSTATS.

branches: 1.1.2;
Beginnings of RISCV kernel support. Note that the pmap support is not yet
committed and probably won't be for awhile. This is mostly preliminary
waiting for the supervisor specification to come out. Lots of missing pieces
but it mostly builds.

riscv: Enable audio support for QEMU

virtio(4): Consolidate kernel configs.

No functional change intended.

Leave `# XXX ?' comments where I don't know why the driver in
question is excluded. (Typical reason is that PAGE_SIZE is not 4096
but I didn't investigate -- if you do investigate, please either
update the comment if you determine a reason, or enable the driver if
you don't.)

PR kern/59211: vio9p(4): missing from various GENERICs and MAKEDEVs

riscv: Add pseudo-device openfirm

Missed in previous commit

risc-v: disable X-Powers AXP Power Management IC for now as it causes problems

Add X-Powers AXP Power Management IC and registers attachments

risc-v: Add the Designware I2C controller

risc-v: add support for PCI and the PCIe controller in the JH7110 SoC.

Testing as working with xhci and nvme on VisionFive2.

Uses legacy PCI interrupts currently. MSIs to be added later.

pcihost_fdt code is 99% the same as the Arm version and should be shared.

viocon(4): Add to various kernel configs.

branches: 1.14.2;
Re-enable HEARTBEAT

Attach qemufwcfg

Mention DKWEDGE_METHOD_TOS in several kernel config files

Turn off HEARTBEAT

PR/57889: Ricardo Branco: ext2fs does not have user immutable and append
file flags, only system ones. Restrict those to the superuser. Before
the behavior was controlled by EXT2FS_SYSTEM_FLAGS. Make that behavior the
default.

Attach generic system controllers

Group pass 1 attachments

Fix and enable MULTIPROCESSOR

Include compat config for NetBSD-10.

riscv: Enable HEARTBEAT option in GENERIC.common

follow the steps of Andrew Doran (ad) commit and fix more s/loose/lose/ typos.
also s/beyound/beyond/ and few others along the way, mainly in comments.

fix various typos in comments.

RISC-V: Add the Google Goldfish RTC to the GENERIC.common

RISC-V support that works on QEMU with a single hart.

Thanks for Simon Burge for plic(4).

risc-v: add a JH7110 TRNG driver

risc-v: add a StarFive JH71[01]0 temperature sensor driver

risc-v: add support for PCI and the PCIe controller in the JH7110 SoC.

Testing as working with xhci and nvme on VisionFive2.

Uses legacy PCI interrupts currently. MSIs to be added later.

pcihost_fdt code is 99% the same as the Arm version and should be shared.

Remove the USB stuff that is already in GENERIC.common

risc-v: add a specific driver for the JH7110 STG system controller

risc-v: add a JH7110 PCIe PHY driver

whitespace

Attach GPIO controllers in pass 2

risc-v: Add initial JH7110 pin controller driver

risc-v: add ethernet support on JH71[01]0 support

At present only the JH7110 EQOS support is enabled as it work.

The JH7100 has cache coherency issues that need handling before the
gmac can be enabled.

Add a clock driver for the JH7110 SoC found in the StarFive VisionFive 2
SBC.

It's not fully functional as something is wrong for the
Image-Signal-Process controller which is why it's #if 0'd out.

risc-v: Allwinner D1 support

Add the Allwinnder D1 support provided by Rui-Xiang Guo and updated
but me.

https://mail-index.netbsd.org/port-riscv/2024/08/04/msg000127.html

Only driver listed as attaching in

https://github.com/picohive/netbsd-mangopi-mq-pro/blob/main/boot.log

have been added.

There is no need for the platform stuff as the board's u-boot is able
to load bootriscv64.efi and boot a generic kernel.

branches: 1.9.2;
Attach ld at sdmmc

The SD card on my Beagle-V now works. Thanks jmcneill!

risc-v: add a driver the JH7100 pin controller

Use <space><tab> consistently

Add bwfm* at sdmmc? for the Broadcom BCM43xxx WiFi Interface

Add DesignWare SD/MMC attachment.

risc-v: attach the Cadence XHCI usb controller on the JH7100 SoC

risc-v: add a StarTech JH7100 SoC clock driver

The JH7100 is seen in the Beagle-V board.

risc-v: add a SiFive FU[57]40/ L2 Cache controller driver

RISC-V support that works on QEMU with a single hart.

Thanks for Simon Burge for plic(4).

INSTALL: add a basic comment and missing RCS ID

(This isn't actually in use at present, but make it look like other
examples.)

branches: 1.1.2; 1.1.18;
Beginnings of RISCV kernel support. Note that the pmap support is not yet
committed and probably won't be for awhile. This is mostly preliminary
waiting for the supervisor specification to come out. Lots of missing pieces
but it mostly builds.

branches: 1.1.2; 1.1.18;
Beginnings of RISCV kernel support. Note that the pmap support is not yet
committed and probably won't be for awhile. This is mostly preliminary
waiting for the supervisor specification to come out. Lots of missing pieces
but it mostly builds.

Warn about building a kernel with the wrong toolchain.

Idea from mrg@

Use OBJCOPY_STRIPFLAGS instead of STRIPFLAGS.

RISC-V support that works on QEMU with a single hart.

Thanks for Simon Burge for plic(4).

branches: 1.8.4;
Fix RV32 so it gets to the same point as RV64

Fixup kernel linking and provide a linker script with standard sections
and symbols

branches: 1.6.8;
Trailing whitespace

Misc changes in RISC-V.

Misc changes in RISC-V. Start changing the memory layout, too.

- Determine KERN_AS automatically depending on whether OPT_MODULAR is
set or not, in the same way as libcompat.

- Specify OPT_MODULAR in the port Makefile instead of KERN_AS.

Now, KERN_AS=library is used for kernels without module(7) for all ports.

OK christos

branches: 1.2.2; 1.2.18; 1.2.20; 1.2.22;
Use -mcmodel=medany to get PICish code.

Beginnings of RISCV kernel support. Note that the pmap support is not yet
committed and probably won't be for awhile. This is mostly preliminary
waiting for the supervisor specification to come out. Lots of missing pieces
but it mostly builds.

RISC-V support that works on QEMU with a single hart.

Thanks for Simon Burge for plic(4).

risc-v: Allwinner D1 support

Add the Allwinnder D1 support provided by Rui-Xiang Guo and updated
but me.

https://mail-index.netbsd.org/port-riscv/2024/08/04/msg000127.html

Only driver listed as attaching in

https://github.com/picohive/netbsd-mangopi-mq-pro/blob/main/boot.log

have been added.

There is no need for the platform stuff as the board's u-boot is able
to load bootriscv64.efi and boot a generic kernel.

branches: 1.2.2;
risc-v: add a StarTech JH7100 SoC clock driver

The JH7100 is seen in the Beagle-V board.

RISC-V support that works on QEMU with a single hart.

Thanks for Simon Burge for plic(4).

risc-v: add support for PCI and the PCIe controller in the JH7110 SoC.

Testing as working with xhci and nvme on VisionFive2.

Uses legacy PCI interrupts currently. MSIs to be added later.

pcihost_fdt code is 99% the same as the Arm version and should be shared.

risc-v: split db_{read,write}_bytes from db_machdep.c

Another step towards crash(8) support

branches: 1.15.2;
Provide and use _ucas_{32,64} implementations

Fix and enable MULTIPROCESSOR

risc-v: MULTIPROCESSOR support

Add MULTIPROCESSOR support for RISC-V, but leave disabled for the moment
as it's not 100% stable.

Some other improvements to spl and cpu identification / reporting.

RISC-V support that works on QEMU with a single hart.

Thanks for Simon Burge for plic(4).

Split out a bunch of functions from locore.S into cpu_switch.S

NFC

Basic ddb and backtrace support.

[ 1.0000000] panic: kernel diagnostic assertion "msgbufaddr != 0" failed: file "/home/nick/netbsd/nbcvs/src/sys/arch/riscv/riscv/riscv_machdep.c", line 564
[ 1.0000000] cpu0: Begin traceback...
[ 1.0000000] trace fp ffffffc000801dd0
[ 1.0000000] fp ffffffc000801e10 ?() at ffffffc0001eee98
[ 1.0000000] fp ffffffc000801e30 ?() at ffffffc0002ad984
[ 1.0000000] fp ffffffc000801ee0 ?() at ffffffc000005430
[ 1.0000000] cpu0: End traceback...
[ 1.0000000] Trapframe @ 0xffffffc000801cb0 (cause=3 (breakpoint), status=0x100, pc=0xffffffc0000007e4, va=0):
[ 1.0000000] ra =0xffffffc0001eee9c, sp =0xffffffc000801dd0, gp =0xffffffc0006a8f40, tp = 0
[ 1.0000000] s0 =0xffffffc000600ac0, s1 = 0x1000, s2 =0xffffffc000438df0, s3 =0xffffffc000801d80
[ 1.0000000] s4 =0xffffffc0001eed78, s5 =0xffffffc0006d55f8, s6 =0xffffffc000801d88, s7 =0xffffffc0006dfdb8
[ 1.0000000] s8 =0xffffffc000428c18, s9 =0xffffffc000801dd0, s10=0xffffffc0000a3822, s11=0xffffffc0006d55f8
[ 1.0000000] a0 = 0x17, a1 = 0xa, a2 = 0, a3 =0xffffffc00041f658
[ 1.0000000] a4 = 0, a5 = 0x1, a5 = 0, a7 = 0x1
[ 1.0000000] t0 =0xffffffc0006dfe30, t1 =0xffffffc000801bb8, t2 =0xffffffc000803000, t3 = 0x75
[ 1.0000000] t4 = 0, t5 = 0x63, t6 = 0x1
[ 1.0000000] kernel: breakpoint
Stopped in pid 0.0 (system) at ffffffc0000007e4: c.ebreak
db>

Sort. NFC.

Add some bus_space(9), bus_dma(9) and FDT infrastructure. Baby steps.

Remove the RISC-V Host Target Interface (HTIF) Emulation code.

Miscellaneous updates to reflect riscv-privileged-20190608.pdf

Some from zmcgrew@

branches: 1.6.2;
make process_machdep.c included always since it provides register i/o used by
sys_process_getlwpstatus.c which is always included.

harmonize process_machdep.c inclusion.

Move all non-emulation-specific coredump code into the coredump module,
and remove all #ifdef COREDUMP conditional compilation. Now, the
coredump module is completely separated from the emulation modules, and
they can all be independently loaded and unloaded.

Welcome to 9.99.18 !

Misc changes in RISC-V.

Misc changes in RISC-V. Start changing the memory layout, too.

branches: 1.1.2; 1.1.18; 1.1.22;
Beginnings of RISCV kernel support. Note that the pmap support is not yet
committed and probably won't be for awhile. This is mostly preliminary
waiting for the supervisor specification to come out. Lots of missing pieces
but it mostly builds.

Fixup kernel linking and provide a linker script with standard sections
and symbols

branches: 1.7.4;
RCSID and whitespace police...

branches: 1.6.10;
Misc changes in RISC-V.

branches: 1.5.16; 1.5.20;
Don't mention stab and DWARF sections, because these (poorly mtaintained)
lists only help to make them harder to read.

If those sections are found in inputs, they simply appear in outputs as
orphaned sections, sorted by section types and attributes.

.rel/.rela should not be generated in kernels.

I bet setting search-directory for ld.so is useless in any kernel.

Indent with 2 spaces.

branches: 1.1.2;
Beginnings of RISCV kernel support. Note that the pmap support is not yet
committed and probably won't be for awhile. This is mostly preliminary
waiting for the supervisor specification to come out. Lots of missing pieces
but it mostly builds.

risc-v: add ofctl(8) and /dev/openfirm support

branches: 1.9.6;
RISC-V support that works on QEMU with a single hart.

Thanks for Simon Burge for plic(4).

Trailing whitespace

Systematize handling of removed drivers.

- Every driver that was removed and whose number hasn't already been
reused is now listed with a commented-out "obsolete" line.
- The format of these has been systematized. Future format changes can
probably be safely done with a script.
- This does not include a few cases of assignments that only lasted a
couple days, or stuff from before major reorgs. Some of these may
be included nonetheless, because there was a lot of ground to cover
and therefore not a lot of time to dig into history in detail.

Note that the obsolete listings do not mean the major numbers can
never be reused; that's up to portmasters and/or core. It does mean
that they won't be reused by accident, however, which in some cases
(depending on the driver, how widely used it was, its family of device
nodes, their default permissions, etc.) can be quite dangerous.

Note that some of the things now explicitly listed as obsolete are
really ancient history. My scan went back as far as when the majors
files were added. (But not before that.)

This may have been cutpasted from evbmips, but we don't need to say so.

Restore satlink's majors entries commented out and marked obsolete.
Otherwise they might accidentally get reused later and cause a
security problem.

Remove the satlink driver. It was disabled everywhere, had no man page and
no use either. Spotted by thorpej in PR/21345, ok christos.

Remove ISDN from the kernel. It has remained unmaintained for a long time,
is of poor quality, and is now an obstacle to MP-ification. It was removed
ten years ago from FreeBSD for the same reason.

This retires a big user of the mbuf API, and will ease maintenance of the
kernel.

branches: 1.2.14; 1.2.16; 1.2.18;
Add a synthesized pc beeper and keyboard bell for platforms with an audio
device.

branches: 1.1.2; 1.1.4;
New files for Userland support of UCB RISC-V (both 32-bit and 64-bit)

risc-v: add support for PCI and the PCIe controller in the JH7110 SoC.

Testing as working with xhci and nvme on VisionFive2.

Uses legacy PCI interrupts currently. MSIs to be added later.

pcihost_fdt code is 99% the same as the Arm version and should be shared.

risc-v: Allwinner D1 support

Add the Allwinnder D1 support provided by Rui-Xiang Guo and updated
but me.

https://mail-index.netbsd.org/port-riscv/2024/08/04/msg000127.html

Only driver listed as attaching in

https://github.com/picohive/netbsd-mangopi-mq-pro/blob/main/boot.log

have been added.

There is no need for the platform stuff as the board's u-boot is able
to load bootriscv64.efi and boot a generic kernel.

branches: 1.1.2; 1.1.18; 1.1.58;
Beginnings of RISCV kernel support. Note that the pmap support is not yet
committed and probably won't be for awhile. This is mostly preliminary
waiting for the supervisor specification to come out. Lots of missing pieces
but it mostly builds.

risc-v: add support for PCI and the PCIe controller in the JH7110 SoC.

Testing as working with xhci and nvme on VisionFive2.

Uses legacy PCI interrupts currently. MSIs to be added later.

pcihost_fdt code is 99% the same as the Arm version and should be shared.

risc-v: Allwinner D1 support

Add the Allwinnder D1 support provided by Rui-Xiang Guo and updated
but me.

https://mail-index.netbsd.org/port-riscv/2024/08/04/msg000127.html

Only driver listed as attaching in

https://github.com/picohive/netbsd-mangopi-mq-pro/blob/main/boot.log

have been added.

There is no need for the platform stuff as the board's u-boot is able
to load bootriscv64.efi and boot a generic kernel.

branches: 1.3.6;
RISC-V support that works on QEMU with a single hart.

Thanks for Simon Burge for plic(4).

Fix CVS Id usage

branches: 1.1.2; 1.1.18; 1.1.22;
Beginnings of RISCV kernel support. Note that the pmap support is not yet
committed and probably won't be for awhile. This is mostly preliminary
waiting for the supervisor specification to come out. Lots of missing pieces
but it mostly builds.