Create a new header lwp_private.h to contain _lwp_getprivate_fast,
_lwp_gettcb_fast, _lwp_settcb and remove them from mcontext.h, so that:
1. we don't need special hacks to hide them
2. we can include <lwp.h> where needed to get the necessary prototypes
without redefining them locally.

branches: 1.33.36;
Remove compat_svr4 and compat_svr4_32, as discussed on tech-kern@ recently,
but also as discussed several times in the past.

Remove the kernel PMC code. Sent yesterday on tech-kern@.

This change:

* Removes "options PERFCTRS", the associated includes, and the associated
ifdefs. In doing so, it removes several XXXSMPs in the MI code, which is
good.

* Removes the PMC code of ARM XSCALE.

* Removes all the pmc.h files. They were all empty, except for ARM XSCALE.

* Reorders the x86 PMC code not to rely on the legacy pmc.h file. The
definitions are put in sysarch.h.

* Removes the kern/sys_pmc.c file, and along with it, the sys_pmc_control
and sys_pmc_get_info syscalls. They are marked as OBSOL in kern,
netbsd32 and rump.

* Removes the pmc_evid_t and pmc_ctr_t types.

* Removes all the associated man pages. The sets are marked as obsolete.

branches: 1.31.2;
Move the complex logic for dynamically writing branches from ld.elf_so
into a header for reuse in crt0.o for static ifunc support. Change the
existing logic for sparc64 to use the Bicc variant of ba,a as it allows
+-8MB displacement compared to the BPcc variant's +-1MB. Teach the sparc
variant the same trick for using ba,a and not sethi+jmp when possible.

branches: 1.30.26;
Rename sljitarch.h to sljit_machdep.h.

branches: 1.29.2;
Make sljit usable on sparc64 32-bit kernels.

branches: 1.28.2; 1.28.12; 1.28.16;
Retire varargs.h support. Move machine/stdarg.h logic into MI
sys/stdarg.h and expect compiler to provide proper builtins, defaulting
to the GCC interface. lint still has a special fallback.
Reduce abuse of _BSD_VA_LIST_ by defining __va_list by default and
derive va_list as required by standards.

Don't install sparc64/bus.h any more.

install <machine/intr.h> for crash(8).

(we could avoid this, but it would require a lot of contortions that
make the header files ugly. maybe someone else can figure out a less
ugly way of doing this later.)

fenv support for sparc64 from Stathis Kamperis

branches: 1.24.70; 1.24.76; 1.24.78;
Merge newlock2 to head.

branches: 1.23.4;
don't install <machine/db_machdep.h>, this is kernel only

branches: 1.22.4; 1.22.8;
merge ktrace-lwp.

branches: 1.21.12;
also add <machine/joystick.h> to alpha and amd64, to allow compilation
of certain multimedia applications

Factor out W{CHAR,INT}_{MAX,MIN} into their own header file.

Drop fbvar.h from INCS now that it's been cvs rm'ed here.

branches: 1.18.2;
Merge the nathanw_sa branch.

Remove KDIR=, since SYS_INCLUDE=symlinks and KDIR are not supported any more.

Merge the gehenna-devsw branch into the trunk.

This merge changes the device switch tables from static array to
dynamically generated by config(8).

- All device switches is defined as a constant structure in device drivers.

- The new grammer ``device-major'' is introduced to ``files''.

device-major <prefix> char <num> [block <num>] [<rules>]

- All device major numbers must be listed up in port dependent majors.<arch>
by using this grammer.

- Added the new naming convention.
The name of the device switch must be <prefix>_[bc]devsw for auto-generation
of device switch tables.

- The backward compatibility of loading block/character device
switch by LKM framework is broken. This is necessary to convert
from block/character device major to device name in runtime and vice versa.

- The restriction to assign device major by LKM is completely removed.
We don't need to reserve LKM entries for dynamic loading of device switch.

- In compile time, device major numbers list is packed into the kernel and
the LKM framework will refer it to assign device major number dynamically.

Implement pmc(9) -- An interface to hardware performance monitoring
counters. These counters do not exist on all CPUs, but where they
do exist, can be used for counting events such as dcache misses that
would otherwise be difficult or impossible to instrument by code
inspection or hardware simulation.

pmc(9) is meant to be a general interface. Initially, the Intel XScale
counters are the only ones supported.

branches: 1.14.4; 1.14.8; 1.14.12;
Use <dev/sun/fbio.h>, not our own copy.

branches: 1.13.2; 1.13.4;
Add definitions of C99 integer format conversion macros.
XXX Fastest minimum-width integer types haven't been decided upon yet.

Add definitions of C99 specified-width integer type limits.
XXX Fastest minimum-width integer types haven't been decided upon yet.

Add definitions of C99 integer constant macros.
Tidy Makefiles up a little.

Add definitions of C99 minimum-width and greatest-width integer types.
XXX Fastest minimum-width integer types haven't been decided upon yet.

branches: 1.9.2;
backout previous; unintentional.

include the sparc loadfile_machdep.h as-is; we can blow this header away
completely later.

Add <machine/int_types.h>, which provides namespace-pure definitions
of exact-width integer types.

Oops, install <machine/lock.h> on these systems, too.

Install "machineendian_machdep.h".

C99: Define a NAN macro in <math.h> which evaulates to a constant expression of
a single-precision quiet NaN; only to be defined on platforms that do support
this value.

these files were removed years ago (exec.h was not even installed).

branches: 1.2.8; 1.2.14;
Move the bswap functions from libutil to libc (this bups the
minor of libc and the major of libutil). For little-endian architectures
merge the bnswap() assembly versions with nto* and hton* using symbols
aliasing. Use symbol renaming for the bswap function in this case to avoid
namespace pollution.
Declare bswap* in machine/bswap.h, not machine/endian.h. For little-endian
machines, common code for inline macros go in machine/byte_swap.h
Sync libkern with libc.
Adjust #include in kernel sources for machine/bswap.h.

Add a makefile.

Switch all users (except ia64) of custom machine/ansi.h to common_ansi.h

Deduplicate the code among ports and poll definitions of types
directly from a compiler.

This fixes miscompilation of certain programs that instruct compilers
to generate code for different types. This bug has been detected with
-fshort-wchar in EFI firmware.

Proposed and discussed on a mailing list (twice).

Itanium uses custom !ELF fallback switch, temporarily leave it as it is.

branches: 1.18.18;
Make clock_t unsigned

branches: 1.17.12; 1.17.28; 1.17.30;
Retire varargs.h support. Move machine/stdarg.h logic into MI
sys/stdarg.h and expect compiler to provide proper builtins, defaulting
to the GCC interface. lint still has a special fallback.
Reduce abuse of _BSD_VA_LIST_ by defining __va_list by default and
derive va_list as required by standards.

1. {wctype,wctrans,mbstate}_t: switch MD to MI like other
libc implementation (such as *BSD and glibc2).

2. don't typedef void * wc{type,trans}_t, suggested by soda@-san.
it may pass through compiler type check, it's harmful.
so i introduce dummy struct __tag_wc{type,trans}_t(iconv_t already does).

no ABI change was made.

branches: 1.15.4; 1.15.6;
merge christos-time_t

branches: 1.14.16; 1.14.18; 1.14.22; 1.14.30;
Merge the ppcoea-renovation branch to HEAD.

This branch was a major cleanup and rototill of many of the various OEA
cpu based PPC ports that focused on sharing as much code as possible
between the various ports to eliminate near-identical copies of files in
every tree. Additionally there is a new PIC system that unifies the
interface to interrupt code for all different OEA ppc arches. The work
for this branch was done by a variety of people, too long to list here.

TODO:
bebox still needs work to complete the transition to -renovation.
ofppc still needs a bunch of work, which I will be looking at.
ev64260 still needs to be renovated
amigappc was not attempted.

NOTES:
pmppc was removed as an arch, and moved to a evbppc target.

clean up some definitions around rune_t which are not needed anymore

branches: 1.12.8; 1.12.16; 1.12.22; 1.12.26; 1.12.28;
fix gcc -Werror -Wmissing-braces problem
mbstate_t(this is opaque object)'s initializer should be ``{ 0 }'',
so changed 1st field of union from character array to integer.

branches: 1.11.20; 1.11.22;
merge ktrace-lwp.

branches: 1.10.2;
For GCC3 and later, use the __builtin_va* constructs.

branches: 1.9.8; 1.9.14; 1.9.18;
Move UCB-licensed code from 4-clause to 3-clause licence.

Patches provided by Joel Baker in PR 22364, verified by myself.

branches: 1.8.2;
add some ISO C 1995 I18N functions and types:
btowc, wctrans, towctrans, wcscoll, wcsxfrm, wctype_t and wctrans_t.

replace 'long long' with int64_t to compile stand alone program with
compiler other than GCC.

make mbstate_t bigger (32 -> 128 bytes).
XXX if you have libc after citrus locale import, please recompile libc,
and your applications that use mbstate_t (rather rare). really sorry
for the mess.

populate _BSD_MBSTATE_T_. add warning regarding to rune_t.

G/c _BSD_INTPTR_T_ and _BSD_UINTPTR_T_.

branches: 1.3.12; 1.3.20;
Following discussions with eeh and mrg, change most of these types so
that they should make an ILP32 setup with an ILP32 compiler and an LP64
setup if run through an LP64 compiler. None of the data sizes actually
change right now, and any type errors that show up would have to be fixed
eventually anyway.

branches: 1.2.2;
General update:

Added genassym.cf
Removed lderr which should never have gotten in
Removed lots of dead code from locore.s
Added some softint stuff to intr.c
Added support for halt -p
esp and le both use bus_dmamap_*() functions now
instead of kdvma_mapin()
groundwork for PCI (but we still have no drivers for
any sun4u PCI devices)

branches: 1.1.1;
Initial revision

use <sparc/foo.h> where appropriate. now these files become very
very difficult to get out of sync. add bootinfo.h and promlib.h
(using the same method) so that sparc64 headers can build sparc
stand (not yet finished.)

branches: 1.1.1;
Initial revision

Move LP64 and ILP32 conversion macros COMBINE, SPLIT from locore.h
to asm.h, and provide SPLIT_RETL for the case SPLIT and then retl
immediately.

branches: 1.21.12;
Use macros in machine/asm.h instead of locally defined, and
introduce CASPTRA for casxa/casa.

move the useful macros somewhere where they can be used in userland.

branches: 1.19.146; 1.19.156;
use <sparc/foo.h> where appropriate. now these files become very
very difficult to get out of sync. add bootinfo.h and promlib.h
(using the same method) so that sparc64 headers can build sparc
stand (not yet finished.)

Add ENTRY_NOPROFILE().

branches: 1.17.8;
Use a more efficient PIC_PROLOG().

branches: 1.16.2;
Changes from Martin Husemann and myself:
- Make the 32-bit SPARC profile support work with the GCC 2.95.3
SPARC ELF compiler, which uses a different name for mcount.
- Make the 64-bit SPARC profile support header look more like the 32-bit
SPARC header (no functional change -- 64-bit SPARC already used the
correct mcount name).

branches: 1.15.4; 1.15.6;
Get kernel profiling to work. Now if only gprof worked....

Pull in <machine/frame.h> to define BIAS and CC64FSZ.

Include <machine/frame.h> to get the definition of BIAS and CC64FSZ.

Fix PIC bugs.

Add support for 64-bit PIC and dynamic linking.

Add a WEAK_ALIAS() macro.

branches: 1.9.2; 1.9.12;
Add RODATA() macro.

retire _LP64; use compiler provided __arch64__, but still defined _LP64 where we used to anyway.

Argh, fix the ANSI CPP version of the a.out WARN_REFERENCES().

Implement WARN_REFERENCES().

Fix PIC code initialization.

Fixup signal changes (hopefully). However SUN_COMPAT is likely broken by
this and I don't know how to fix it.

We can now exec a 64-bit init through a really ugly hack (don't ask.)

Merge paddr_t changes into the main branch.

branches: 1.2.2;
General update:

Added genassym.cf
Removed lderr which should never have gotten in
Removed lots of dead code from locore.s
Added some softint stuff to intr.c
Added support for halt -p
esp and le both use bus_dmamap_*() functions now
instead of kdvma_mapin()
groundwork for PCI (but we still have no drivers for
any sun4u PCI devices)

branches: 1.1.1;
Initial revision

sun4v: Update code to retrieve CPU clock frequency so it can handle (future?) CPU clock frequencies above the 32-bit limit. ok mrg@

Allow machine_banner and machine_model to be used outside autoconf.c, for
example, by drivers that need to match on model name. Suggested by mrg@.

branches: 1.31.2;
split device_t/softc for all remaining drivers.
replace "struct device *" with "device_t".
use device_xname(), device_unit(), etc.

branches: 1.30.2; 1.30.12;
#include <sys/bus.h> instead of <machine/bus.h>.

Remove implicit include <dev/sbus/sbusvar.h> from autoconf.h, and
add it explicitly in files depending on it.

branches: 1.28.22; 1.28.28;
Remove clause 3 and 4 from TNF licenses

branches: 1.27.6; 1.27.8; 1.27.10;
Introduce device_find_by_xname and device_find_by_driver_unit to replace
alldevs iterations all over src.

Patch discussed with and improved on suggestioned from cube@.

branches: 1.26.28; 1.26.34;
Rework boot device matching to get rid of lots of special case code
and tables to map fimware names to driver names. Based on a suggestion
from Eduardo (quite some time ago).
Each device (on busses we can handle and care about) gets a device property
storing the devices OpenFirmware package handle. To match the boot device,
the phandle of the chosen bootpath is compared against this property,
plus some additional string matching for disk/cd devices (where OF only
provides a node for the device class, not each instance).

branches: 1.25.14; 1.25.16;
Use ANSI-style function definitions and declarations.

branches: 1.24.2; 1.24.4;
Alter sparc64 bootstrap, catch up to ofwboot v1.9:

- Accept bootinfo structure passed down from ofwboot v1.9
- Drop kernel re-mapping code
- Use permanent 4MB mappings provided by the loader instead
- Change kernel entry address to point directly at the code instead of pointing
at the trap table's first slot. This allows the bootloader to detect
those kernels which are aware of the new boot scheme
- Due to the changes in kernel mapping code, alter secondary CPU bootstrap
code to use trampoline just like FreeBSD does (some FreeBSD code is used
here as well)

branches: 1.23.2;
merge ktrace-lwp.

branches: 1.22.2;
sprinkle const.

Switch to the sparc prom library.

Drop optionsnode, fbnode and stdinnnode.

Rename PROM_getprop*() => prom_getprop*().

Pass the buffer size to PROM_getpropstringA(), as in sparc.

For now, implement prom_getoption() in autoconf.c.

For now, implement prom_getidprom() and prom_getether() in autoconf.c

change PROM_getprop() from taking a "void **" for the storage, to a
"void *", and do the extra de-reference directly in the function. this
avoids having to cast dozens of different types to "void **", which sets
of GCC3's strict-aliasing. testing by martin@

Move UCB-licensed code from 4-clause to 3-clause licence.

Patches provided by Joel Baker in PR 22364, verified by myself.

branches: 1.13.6;
We are not going to get a "upa at mainbus" autoconfig entity, since
UPA is just a physical incarnation of our mainbus0.

Evidence:

- There can only be one!
- The firmware node coresponding to it is the root of the OF tree

So: remove the unused (and uncompilable) upa.c, remove upavar.h after
moving the only declaration used from it to autoconf.h.

branches: 1.12.4;
prototype rominterpret()

getprop* -> PROM_getprop*

branches: 1.10.2;
Garbage collect.

branches: 1.9.8;
Remove old-style boot device recognition.

Fix boot device detection code.

branches: 1.7.8; 1.7.10; 1.7.14;
Some devices don't have a `device-type' property we can use to allocate
an IPL. Check for those by name. Give the rest a default IPL of 2.
(Added `SUNW,CS4231' to the list.)

configure() prototype is in <sys/device.h>

It slices. It dices. It does everything except exec a sparc32_compat init.

Nuke temporary `getpropA()'.

Periodic update: now starts probing devices.

Merge paddr_t changes into the main branch.

branches: 1.1.1;
Initial revision

remove explicit <machine/param.h> include, code including this already includes
<sys/param.h>

branches: 1.8.2; 1.8.4;
Add more details about the boot device as a new bootinfo record type.
From within the bootloader, when we have readily accessible instance
handles of the boot device, it is easy to query more details like SCSI
LUN, target, and FC-AL wwn from the firmware.
The kernel later would have a hard time getting theses, but can make good
use to match the boot device.

branches: 1.7.2;
Ooops, remove definitions duplicated in <sparc/bootinfo.h>

Pass the "boothowto" from the bootloader to the kernel.
If (an old) bootloader did not pass the flags, check explicitly if we
missed RB_USERCONF and invoke userconf_prompt() in MD code, as MI code
already missed it.
This fixes PR 46466.

Add a bootinfo node to allow the loader to override the boot device

branches: 1.4.20; 1.4.22;
Remove clause 3 and 4 from TNF licenses

branches: 1.3.68; 1.3.70; 1.3.72;
ANSIfication: u_intN_t -> uintN_t, use ANSI function declarations/definitions
instead of K&R ones.

branches: 1.2.2; 1.2.4;
Alter sparc64 bootstrap, catch up to ofwboot v1.9:

- Accept bootinfo structure passed down from ofwboot v1.9
- Drop kernel re-mapping code
- Use permanent 4MB mappings provided by the loader instead
- Change kernel entry address to point directly at the code instead of pointing
at the trap table's first slot. This allows the bootloader to detect
those kernels which are aware of the new boot scheme
- Due to the changes in kernel mapping code, alter secondary CPU bootstrap
code to use trampoline just like FreeBSD does (some FreeBSD code is used
here as well)

branches: 1.1.2; 1.1.4; 1.1.6; 1.1.28; 1.1.40;
use <sparc/foo.h> where appropriate. now these files become very
very difficult to get out of sync. add bootinfo.h and promlib.h
(using the same method) so that sparc64 headers can build sparc
stand (not yet finished.)

these files were removed years ago (exec.h was not even installed).

branches: 1.1.1;
Initial revision

merge ktrace-lwp.

Reach over to the sparc versions.

Move UCB-licensed code from 4-clause to 3-clause licence.

Patches provided by Joel Baker in PR 22364, verified by myself.

branches: 1.5.6;
Protect against multiple inclusion.

* Refine the comment describing openprom_addr.
* Add openprom_range and openprom_intr structures.

branches: 1.3.8; 1.3.10;
defopt "options SUN4*", put #define for each of SUN4, SUN4C, SUN4M and SUN4U
into opt_arch_sparc.h and include this wherever they are used.

branches: 1.2.8; 1.2.12;
Fix doubled 'the's in comments.

branches: 1.1.1;
Initial revision

We can use __builtin_bswapX on sparc when using clang, so do so.

PR port-sparc64/59789 bswap is slow

sparc: Avoid using GCC builtins for byte-swapping and endian encoding.

gcc on most netbsd architectures (mostly excluding sparc and vax) can
generate fast MD byte-swapping code. On sparc it generates a function
call, which is very slow. We have existing inline macros for byte
swapping, so use those instead.

bswap on sparc with gcc is still non-ideal, so also reactivate the
portable endian encoding functions we apparently haven't been using
since the gcc2 days, rather than using bswap for that.

These changes improve the speed of disk encryption on ultrasparc ii
by almost 40% (the endian.h change being more significant in making
that number go high).

clang does the right thing on sparc (or at least introduces different
bottlenecks...), so avoid this there.

Thanks joerg for analysis of the problem, uwe for reviewing the patch.

PR port-sparc64/59789 bswap is slow
PR kern/59774 bearssl 32-bit AES is too slow

branches: 1.2.264;
Include <sys/bswap.h> for function prototypes. i386, pc532 and vax
still include <machine/byte_swap.h> and define macros for some of
the bswap*() functions.

Move the bswap functions from libutil to libc (this bups the
minor of libc and the major of libutil). For little-endian architectures
merge the bnswap() assembly versions with nto* and hton* using symbols
aliasing. Use symbol renaming for the bswap function in this case to avoid
namespace pollution.
Declare bswap* in machine/bswap.h, not machine/endian.h. For little-endian
machines, common code for inline macros go in machine/byte_swap.h
Sync libkern with libc.
Adjust #include in kernel sources for machine/bswap.h.

Switch sparc and sparc64 to new-style <sys/bus.h>.

s/u_intN_t/uintN_t/ and whitespace nit. no functional change.

bus_space_handle_t:
- make _asi and _sasi unsigned to reduce superfluous codes by sign extension.
- remove unused member _virtual.

#define BUS_SPACE_MAP_LARGE 0 so SBus framebuffer drivers compile again

branches: 1.58.10; 1.58.18;
Remove clause 3 and 4 from TNF licenses

branches: 1.57.40; 1.57.42; 1.57.44;
Kill caddr_t; there will be some MI fallout, but it will be fixed shortly.

add a pair of new bus_dma(9) functions:
int _bus_dmatag_subregion(bus_dma_tag_t tag,
bus_addr_t min_addr,
bus_addr_t max_addr,
bus_dma_tag_t *newtag,
int flags)
void _bus_dmatag_destroy(bus_dma_tag_t tag)

that allow a (normally broken/limited) device to restrict the bus address
range it can talk to. this is used by bce(4) to limit DMA addresses to
1GB range, the maximum the chip can address.

all this is from Yorick Hardy <yhardy@uj.ac.za> with input from several
people on tech-kern.

XXX: bus_dma(9) needs an update still.

branches: 1.55.4;
__unused removal on arguments; approved by core.

__unused policy

branches: 1.53.14; 1.53.16;
Use ANSI-style function definitions and declarations.

Change "inline" back to "__inline" in .h files -- C99 is still too
new, and some apps compile things in C89 mode. C89 keywords stay.

As per core@.

branches: 1.51.2; 1.51.4; 1.51.6;
Remove leading __ from __(const|inline|signed|volatile) -- it is obsolete.

merge ktrace-lwp.

branches: 1.49.4;
Add a dm_maxsegsz public member to bus_dmamap_t. This allows a user of the API
to select the maximum segment size for each bus_dmamap_load (up to the maxsegsz
supplied to bus_dmamap_create). dm_maxsegsz is reset to the value supplied to
bus_dmamap_create when the dmamap is unloaded.

branches: 1.48.4; 1.48.6;
Introduce bus_space_tag_alloc() for the common parts of bus tag allocation.

Provide bus_space_translate_address_generic(), a helper function to
translate a local bus address to an address on the parent bus.

Add openprom range property to the bus space tag.

branches: 1.45.2;
Handle 64bit DMA addresses on PCI for platforms that can (currently only
enabled on amd64). Add a dmat64 field to various PCI attach structures,
and pass it down where needed. Implement a simple new function called
pci_dma64_available(pa) to test if 64bit DMA addresses may be used.
This returns 1 iff _PCI_HAVE_DMA64 is defined in <machine/pci_machdep.h>,
and there is more than 4G of memory.

Make all non-trivial bus space functions "static __inline" (consistently)
and turn all macros with local blocks and declarations into functions.
This fixes PR 19975.

Sparc64 already had a BUS_DMA_NOCACHE - remove one of the two definitions.
Fortunately the old (local) one had the same semantics as the new one.

Introduce BUS_DMA_NOCACHE, and bus_dmamem_map() of i386 supports it.

Remove the `flags' argument from bus_intr_establish().

bus_intr_establish() signature change.
The additional `fast trap' argument is ignored in these drivers.
BUS_INTR_ESTABLISH_FASTTRAP and BUS_INTR_ESTABLISH_SOFTINTR are no longer used.

Parenthesise macro arguments.

Overhaul bus space.

bus_space_handle_t now holds an address and two ASIs, one for normal accesses
and one for streaming accesses. This allows to map individual handles
different ways, so some can use MMU bypass accesses and others use virtual
addresses. bus_space_map() will now create handles that use bypass accesses
unles BUS_SPACE_MAP_LINEAR is passed in. So only pass in BUS_SPACE_MAP_LINEAR
if you absolutely *need* to use bus_space_vaddr(). This removes at least one
extra level of indirection and should reduce TLB misses.

32-bit kernels have problems accessing 64-bit addresses, so they always use
virtual addresses.

Get PCI working with the new bus_space*.

Get rid of bus_space_map2().

For aesthetical reasons use bus_addr_t instead of paddr_t in the BUS_ADDR
makro. Requested by uwe.

Cast the "io" parameter of BUS_ADDR to paddr_t before it gets shifted.
This makes this makro work with smaller values passed for io. No functional
change.

Make bus_space_barrier() an inline instead of a function vector.

branches: 1.32.4;
Change bus_space_mmap() signature to the official one.

Update copyright, fix typo and remove too many '/'.
Ok'd by eeh.

Handle DMA boundaries a bit better.

Change some debug printfs to make gcc happy.

branches: 1.28.2;
Add BUS_DMA_READ and BUS_DMA_WRITE flags, that hint the back-end
at dmamap load time that the mapping will be used for a unidirectional
transfer of the specified direction.

branches: 1.27.2;
Add the BUS_DMA_STREAMING flag.

branches: 1.26.2;
Add some extra fields to a dmamap to track what's being mapped.

Define __BUS_SPACE_HAS_STREAM_METHODS now we have them.

Add bus_space*stream*() methods. I hope they work.

Make all the inline functions static.

remove old (bogus) comment.

Add a `device class' interrupt level argument (from machine/intr.h)
to bus_interrupt_establish().

It's currently only used in sparc64/dev/psycho.c to assign a CPU interrupt
level to devices in PCI slots.

Handle bus_dma aligment properly.

Fix bus_space_read_region_{2,4,8}().

Change the kernel mmap interface so that the offset to map is an
"off_t" and the return value is a "paddr_t" to allow mappings
at offsets past 2^31 bytes. Somewhat inspired by FreeBSD, which
only changed the offset to a "vm_offset_t".

Includes updates for the i386, pc532 and sh3 mmmmap from Jason Thorpe.

branches: 1.17.2;
More debugging support.

Use all 64 address bits in ld*a()/st*a() macros so physical device addresses
work. (Also add some bus_space_*() debug hooks).

branches: 1.15.2;
whole bunch of changes:
- merge IOMMU DVMA code from sbus/psycho into iommu.c. this code was
identical and a few minor inconsistencies had crept in. this way
keeps them all in sync.
- with this code gone from psycho, merge the psycho.c and psycho_bus.c
files. same with ebus/ebus_bus.c. delete the _bus.c files.
- add a _ds_boundary member to the dma segment structure, so that later
dma mappings can find this value.
- set _ds_boundary in machdep.c:_bus_dmamem_alloc().
- kill much dead code.

define a "BUS_SPACE_MAP_PREFETCHABLE" flag which basically means that
device accesses are idempotent (but should not be cached by the CPU)

branches: 1.13.2;
Another general cleanup:

Remove the entire idea of fasttrap interrupts since V9 traps are really cheap,
the CPUs are really fast, and the completely different trap frames would make
these handlers really difficult to implement.

pmap_changeprot() was only used by the clock and one other place; deprecate it.

probeget() and probeset() now take 64-bit addresses even in 32-bit mode so we
can probe IO locations by physical addresses.

Some pmap cleanup.

Some more copyright cleanup.

Fix things up so they compile again.

Fix bus_type_t properly and enable ASI accesses for bus_space_{read,write}*()

branches: 1.10.4;
Add a macro to check for sufficient pointer alignment in bus.h context,
"BUS_SPACE_ALIGNED_POINTER()".
Equal to the param.h "ALIGNED_POINTER()" normally, but obeys additional
requirements of the bus_space_xxx_n() macros. (BUS_SPACE_DEBUG)

make the last fix work as intended

Fix problems with bus_space*() macros (thanks M.Drochner).

32-bit fixup.

It slices. It dices. It does everything except exec a sparc32_compat init.

Periodic update: now starts probing devices.

Some more 64-bit cleanup. Now everything compiles.

Merge paddr_t changes into the main branch.

branches: 1.2.2;
General update:

Added genassym.cf
Removed lderr which should never have gotten in
Removed lots of dead code from locore.s
Added some softint stuff to intr.c
Added support for halt -p
esp and le both use bus_dmamap_*() functions now
instead of kdvma_mapin()
groundwork for PCI (but we still have no drivers for
any sun4u PCI devices)

branches: 1.1.1;
Initial revision

Provide PRIxBUSADDR, PRIxBUSSIZE, PRIuBUSSIZE, and PRIxBSH for all arches
to follow arm and (generic) mips.

Reviewed by christos.

branches: 1.4.16;
add plumbing to support bus_space_mmap() with:
- write combining allowed via BUS_SPACE_MAP_PREFETCHABLE
- byte order translation via BUS_SPACE_MAP_LITTLE

branches: 1.3.2;
KNF. Remove extra spaces. No functional change.

branches: 1.2.12; 1.2.30;
Switch sparc and sparc64 to new-style <sys/bus.h>.

Per discussion at
<http://mail-index.netbsd.org/tech-kern/2010/04/02/msg007941.html>,
divide each machine's bus.h into bus_defs.h (constants & data types)
and bus_funcs.h (macro implementations of bus_space(9) routines and MD
prototypes).

Note that some bus_space(9) routines' implementation will move to .c
files from inline subroutines or macros in .h files.

I've only made the split for machine architectures where there is PCI.
All of the non-PCI-having architectures will require a similar split.

These #include files are not referenced by any (committed) Makefiles or
header files, yet. Changes to Makefiles, to <sys/bus.h>, and to some
more machine-dependent files will dribble in before I throw the switch.

Expand to __nothing, not to empty.

Include some needful header files and forward declarations.

branches: 1.3.26; 1.3.28;
Make bus_space_barrier inline to avoid unnecessary argument handling.

branches: 1.2.12; 1.2.26;
Switch sparc and sparc64 to new-style <sys/bus.h>.

Per discussion at
<http://mail-index.netbsd.org/tech-kern/2010/04/02/msg007941.html>,
divide each machine's bus.h into bus_defs.h (constants & data types)
and bus_funcs.h (macro implementations of bus_space(9) routines and MD
prototypes).

Note that some bus_space(9) routines' implementation will move to .c
files from inline subroutines or macros in .h files.

I've only made the split for machine architectures where there is PCI.
All of the non-PCI-having architectures will require a similar split.

These #include files are not referenced by any (committed) Makefiles or
header files, yet. Changes to Makefiles, to <sys/bus.h>, and to some
more machine-dependent files will dribble in before I throw the switch.

use <sparc/foo.h> where appropriate. now these files become very
very difficult to get out of sync. add bootinfo.h and promlib.h
(using the same method) so that sparc64 headers can build sparc
stand (not yet finished.)

branches: 1.3.22; 1.3.26; 1.3.34;
Garbage-collect.

General update:

Added genassym.cf
Removed lderr which should never have gotten in
Removed lots of dead code from locore.s
Added some softint stuff to intr.c
Added support for halt -p
esp and le both use bus_dmamap_*() functions now
instead of kdvma_mapin()
groundwork for PCI (but we still have no drivers for
any sun4u PCI devices)

branches: 1.1.1;
Initial revision

use <sparc/foo.h> where appropriate. now these files become very
very difficult to get out of sync. add bootinfo.h and promlib.h
(using the same method) so that sparc64 headers can build sparc
stand (not yet finished.)

branches: 1.1.1;
Initial revision

Merge the gehenna-devsw branch into the trunk.

This merge changes the device switch tables from static array to
dynamically generated by config(8).

- All device switches is defined as a constant structure in device drivers.

- The new grammer ``device-major'' is introduced to ``files''.

device-major <prefix> char <num> [block <num>] [<rules>]

- All device major numbers must be listed up in port dependent majors.<arch>
by using this grammer.

- Added the new naming convention.
The name of the device switch must be <prefix>_[bc]devsw for auto-generation
of device switch tables.

- The backward compatibility of loading block/character device
switch by LKM framework is broken. This is necessary to convert
from block/character device major to device name in runtime and vice versa.

- The restriction to assign device major by LKM is completely removed.
We don't need to reserve LKM entries for dynamic loading of device switch.

- In compile time, device major numbers list is packed into the kernel and
the LKM framework will refer it to assign device major number dynamically.

Add sab.

branches: 1.10.8;
- define other DEV_ constants that the local port uses.
- delete cdev_decl(mm) since <sys/conf.h> does it.

branches: 1.9.2; 1.9.8;
- add dev_noimpl(xxx,yyy) macro to replace "(dev_type_xxx((*))) yyy",
and use appropriately

- create more helper macros:
. cdev__xyz_init(c,n), such as cdev__ocri_init() for
/* open, close, read, ioctl */, etc.
. cdev__xRy_init(c,n), where nullop is used instead of enodev to dummy out
method `R' and the comments now read /* xxx (read) yyy */ instead
. cdev__xyz_t_init(c,n,t) - as per cdev__xyz_init, but sets d_type = t
as well

- use seltrue instead of dev_noimpl(poll,*), as (IIRC) cdevsw.d_poll should
always DTRT WRT returning a valid result. (a few devices previously
incorrectly returned ENODEV)

- use dev_noimpl(stop,enodev) instead of dev_noimpl(stop,nullop) if tty
== 0, because it doesn't matter if dev_type_stop isn't implemented in that
case, and it allows the use of the cdev__xyz_init macros. certain ports
(sparc,sparc64,x68k) used the nullop method for dev_type_stop in a few
drivers, whereas everything else uses enodev

- ensure that the comments are accurate WRT the behaviour of a given entry

branches: 1.8.2;
Remove some unsupported devices and add support for the `com' device.

Fix the sparc64 console.

Unlike the other Sun machines, UltraSPARCs can have consoles run on different
chips than zs, so we need to support them. So, here we go:

Add a new PROM console driver with a major number and everything.
This is the default driver if nothing else attaches. It does not
use the keyboard driver since the PROM translates keystrokes itself.
(Unfortunately it also swallows L1-A).

Have the keyboard driver take over the console when it attaches on a
serial port. When a serial port detects a keyboard and attaches the
keyboard driver, it needs to provide a set of consdev vectors. They
keyboard driver will use those to send I/O to the keyboard and mouse.

add bpt and lpt. fixes final gcc warnings for GENERIC.

branches: 1.5.2;
Fix things up so they compile again.

branches: 1.4.6;
Updating of bdev's and cdev's to support RAIDframe.

Add scsibus entry points to the cdevsw[].

Assign copyright to TNF.

branches: 1.1.1;
Initial revision

spelling and grammar fixes, mainly in comments.

branches: 1.134.6;
Break cycle by using `struct kmutex *' instead of `kmutex_t *'.

sys/sched.h included sys/mutex.h
which includes sys/intr.h
which includes machine/intr.h
which on cats includes arm/footbridge/footbridge_intr.h
which includes arm/cpu.h
which includes sys/cpu_data.h
which includes sys/sched.h

But there was never any real need for sys/mutex.h in sys/sched.h,
because it only uses pointers to the opaque struct kmutex. Cycle
broken by using `struct kmutex *' instead of pulling in sys/mutex.h
for the definition of kmutex_t.

Side effect: This revealed that sys/cpu_data.h needed sys/intr.h
(which was pulled in accidentally by sys/mutex.h via sys/sched.h) for
SOFTINT_COUNT. Also revealed some other machine/cpu.h header files
were missing includes of sys/mutex.h for kmutex_t.

branches: 1.133.4;
Improved the performance of kernel profiling on MULTIPROCESSOR, and possible to get profiling data for each CPU.

In the current implementation, locks are acquired at the entrance of the mcount
internal function, so the higher the number of cores, the more lock conflict
occurs, making profiling performance in a MULTIPROCESSOR environment unusable
and slow. Profiling buffers has been changed to be reserved for each CPU,
improving profiling performance in MP by several to several dozen times.

- Eliminated cpu_simple_lock in mcount internal function, using per-CPU buffers.
- Add ci_gmon member to struct cpu_info of each MP arch.
- Add kern.profiling.percpu node in sysctl tree.
- Add new -c <cpuid> option to kgmon(8) to specify the cpuid, like openbsd.
For compatibility, if the -c option is not specified, the entire system can be
operated as before, and the -p option will get the total profiling data for
all CPUs.

Fix build w/o options SUN4V.

Improve cpu_idle() by allowing a platform specific implementaion (same logic as the sparc implementation) - currently only used by sun4v

branches: 1.130.4; 1.130.6;
kill extra curproc/curlwp definitions that have no chance of working.

Simplify some macros: if we only ever use them on the local cpu,
there is no need to do another pointer derefernence to go via the global
address of our cpu info.
Pointed out by ad.

Fix false sharing problems with cpu_info. Identified with tprof(8).
This was a very nice win in my tests on a 48 CPU box.

- Reorganise cpu_data slightly according to usage.
- Put cpu_onproc into struct cpu_info alongside ci_curlwp (now is ci_onproc).
- On x86, put some items in their own cache lines according to usage, like
the IPI bitmask and ci_want_resched.

cpu_need_resched():

- Remove all code that should be MI, leaving the bare minimum under arch/.
- Make the required actions very explicit.
- Pass in LWP pointer for convenience.
- When a trap is required on another CPU, have the IPI set it locally.
- Expunge cpu_did_resched().

sun4v: initialize %stickcmpr properly when establishing interrupt - fixes issue seen on newer sun4v/SPARC-T5 system where the interrupt never fires.

- Cleanup for dynamic sysctl:
- Remove unused *_NAMES macros for sysctl.
- Remove unused *_MAXID for sysctls.
- Move CTL_MACHDEP sysctl definitions for m68k into m68k/include/cpu.h and
use them on all m68k machines.

branches: 1.124.2; 1.124.4;
implement cpuctl identify for sparc and sparc64.

sparc:
- move enum vactype and struct cacheinfo into cpu.h
- move the cache flags from cpuinfo.flags into CACHEINFO.c_flags
(this allows the new cache_printf_backend() to see them.)
remove unused CPUFLG_CACHEIOMMUTABLES and CPUFLG_CACHEDVMA.
- align xmpsg to 64 bytes
- move cache_print() into cache_print.h so it can be shared with
cpuctl. it only depends upon a working printf().
- if found, store the CPU node's "name" into cpu_longname. this
changes the default output to show the local CPU not the
generic CPU family. eg:
cpu0 at mainbus0: mid 8: Ross,RT625 @ 90 MHz, on-chip FPU
vs the generic "RT620/625" previously shown.
- for each CPU export these things:
- name
- fpuname
- mid
- cloc
- freq
- psr impl and version
- mmu impl, version, and number of contexts
- cacheinfo structure (which changed for the first time ever
with this commit.)

sparc64:
- add a minimal "cacheinfo" structure to export the i/d/e-cache
size and linesize.
- store %ver, cpu node "name" and cacheinfo in cpu_info.
- set cpu_info ver, name and cacheinfo in cpu_attach(), and
export them via sysctl, as well as CPU ID and clock freq

cpuctl:
- add identifycpu_bind() that returns false on !x86 as their
identify routines do not need to run on a particular CPU to
obtain its information, and use it to avoid trying to set
affinity when not needed.
- add sparc and sparc64 cpu identify support using the newly
exported values.

sun4v: Added handling of trap type 0x034 (address alignment error) + fixed typo mmfsa -> mmufsa. Verified for both sun4u and sun4v using qemu.

branches: 1.122.2; 1.122.4;
sun4v: fix previous fix - no need to protect "struct inthand" with "#if defined(_KERNEL)" + use proper include file name - sparc64/bus_defs.h -> machine/bus_defs.h

sun4v: Fix build issue introduced in previous commit - bus stuff is kernel only, so protect this with _KERNEL

sun4v: add cbus driver - from OpenBSD

sun4v: make device interrupts work. Introduce a new intrhand_alloc() function for allocation of interrupt handlers and adapt to this. Parts from OpenBSD. ok martin@

Move function prototypes for cpu_ecache_associativity() and cpu_ecache_size() outside the MULTIPROCESSOR block so a GENERIC.UP kernel will build again

Use <machine/*.h> instead of <sparc64/*.h> for consistency.

On SUN4V make the mdesc data available early in pmap_bootstrap, so we
can set up the uvm page colors correctly.
Based on code from palle@.

Slightly optimize the ITLB usage on secondary processors

smp_tlb_flush_pte(): Avoid run-time check for cpu type/implementation by installing correct function pointer in sparc64_ip_init(). sparc64_send_ipi() is changed to a function pointer as well to avoid run-time checks.

branches: 1.113.2;
sun4v: add code to enable startup of secondary cpus on both sun4u and sun4v systems - ok martin@

sun4v: All cpus must be setup with a TSB descriptor, so pmap_setup_tsb_sun4v() must take a pointer to the TSB descriptor

branches: 1.111.2;
sun4v: make tlb_flush_pte() work on sun4v - parts from OpenBSD - ok martin@

branches: 1.110.2;
sun4v: Rename TLB_ defines to SUN4U_TLB_ so entries created using TSB_DATA() are properly setup for sun4u and sun4v. Relocate the cputyp variable from autoconf.c to locore.s and make it const in param.h so optimized code can be generated. Parts from OpenBSD. Optimization suggested by nakayama@. OK martin@, mrg@, nakayama@

sun4v: Update description of the ci_mmfsa field in the cpu_info structure

allow non-SUN4V kernels to build

sun4v: trap table setup - currently populated with dummy entries which will be properly implemented later - parts from OpenBSD - OK martin@

Updates to pmap_bootstrap() for sun4v - parts from OpenBSD - OK martin@

use __unused instead of __USE and void cast to mark iterator variable unused
where needed (from phone)

Make CPU_INFO_FOREACH more gcc 4.8.1 friendly

support UltraSPARC-IIe STICK counter as time base

branches: 1.102.2;
Avoid data_access_error trap panic when reading unused PCI
configuration space.

This method is described in UltraSPARC IIi User's Manual "16.2.1
Probing PCI during boot using deferred errors", and refer to the
implementation of OpenBSD.

add a sysctl.vis node that indicated which version of the VIS instruction set
is supported. Currently this will be 1 for UltraSPARC I and II, 2 for
UltraSPARC-III and up

Make setstick() and getstick() to inline functions.

use system tick timer instead of %tick on UltraSPARC-III-ish CPUs
review & fixes by Takeshi Nakayama

branches: 1.98.2; 1.98.8; 1.98.12;
Get rid of #ifdef __sparc__ in uvm code - as noted by cgd back 1996,
now that we have __HAVE_CPU_VMSPACE_EXEC/cpu_vmspace_exec().

add per ivec event counters

re-include sparc64/sparc64/intreg.h in kernel mode. it's necessary.

export a bunch of things to _KMEMUSER as well.

XXX: should consolidate the curcpu/curlwp definitions.

Provide LWP_PC

branches: 1.93.2; 1.93.4;
Move ci_data first in struct cpu_info

Add a generic ipi to call arbitrary C functions on another (or all other)
cpu(s). Will be used in the near future by some code Mindaugas is working on.

Make C declarations match assembler reality: ipi functions get two arguments
(which most of them (partly) ignore, but anyway).

- add a kmutex_t ci_ctx_lock to struct cpu_info, and initialise it in
cpu_pmap_init() and replace pmap_ctx_lock usage with this new ci_ctx_lock

- replace smp_dcache_flush_page_all() with smp_dcache_flush_page_cpuset(),
that flushes only on the set of CPUs not, everyone. add new
dcache_flush_page_cpuset() to flush this page from the D$ only
on the specified set of CPUs.

- add a cpuset to pmap_free_page() and use it when freeing PTE pages
when a pmap is destroyed

- introduce pmap_free_page_noflush(), and use it when we allocated a
page for PTEs but didn't use it and don't need to flush it

- don't bother with pmap_lock in pmap_extract(), the only potential
issue is pseg_get() which is already safe


tested on sb2000, sb2500 and ultra80 with a bunch of various heavy
workloads, and seems to give a clear 1-2% speed up for high-forking /
short lived processes, such as ./configure.

branches: 1.89.2;
clean up a bunch of MULTIPROCESSOR:

- always include ci_ipi_evcnt[] in cpuinfo
- #define sparc_ncpus 1 for !MULTIPROCESSOR
- make struct pmap::pm_list an pm_ctx always be an array, and simplify
several functions and lookups to always be the same

tested on U60 and SB2500 before and after with one and two cpus in an
MP kernel, and UP kernels, and i can't find anything besides noise for
benchmark issues. (infact, i can't really tell the difference between
GENERIC and GENERIC.MP on these systems...)

branches: 1.88.2;
- split sp_tlb_flush_pte() and switchtoctx() into sp_tlb_flush_pte_us()/
sp_tlb_flush_pte_usiii() and switchtoctx_us()/switchtoctx_usiii() and
implement the latter while i'm here. it works ... sometimes i think,
but also sometimes panics/hangs.
- fix a comment in sparc64_ipi_flush_pte_usiii()

Remove uarea swap-out functionality:

- Addresses the issue described in PR/38828.
- Some simplification in threading and sleepq subsystems.
- Eliminates pmap_collect() and, as a side note, allows pmap optimisations.
- Eliminates XS_CTL_DATA_ONSTACK in scsipi code.
- Avoids few scans on LWP list and thus potentially long holds of proc_lock.
- Cuts ~1.5k lines of code. Reduces amd64 kernel size by ~4k.
- Removes __SWAP_BROKEN cases.

Tested on x86, mips, acorn32 (thanks <mpumford>) and partly tested on
acorn26 (thanks to <bjh21>).

Discussed on <tech-kern>, reviewed by <ad>.

cpu_setfunc() can not use lwp_trampoline, as that has additional lwp startup
semantics. Use a simpler setfunc_trampoline instead.

- move definition of tick() from ctlreg.h to psl.h and rename to gettick()
for consistency with other functions for reading/writing ASRs.
- move definition of tl() from trap.c to psl.h as same as above.
- define settick() in psl.h and use it in clock.c.
- cosmetic chages in psl.h.

branches: 1.84.4; 1.84.10;
struct cpu_info: reorder member to avoid a padding.

Switch fpstate buffer allocation from malloc to pool_cache.

Ok by martin@.

branches: 1.82.2;
Remove declarations of unexist variables and functions.

branches: 1.81.2;
Explicitly pass a "mpsafe" arg down to intr_establish, as at that point
we do not have the original ipl passed in around to check for mpsafeness.
Fixes PR port-sparc64/38673. Thanks to Andrew for pointing at the problem.

branches: 1.80.2;
Mirror sparc and provide sparc_softintr stuff. There is no functional
change, beyond renaming a function and putting back disestablish/schedule.
PR kern/37540.

branches: 1.79.2; 1.79.4;
Reorganize clock assignments on SMP kernel:
- don't use separate statintr on primary CPU.
- invoke clockintr instead of statintr on secondary CPUs.

This change fixes the problem setitimer(2) didn't work on secodary CPUs.

Revise cpu_need_resched and cpu_signotify, then make them like x86's ones.
This can avoid sending IPI to myself.

Make schedintr interrupt handler per-CPU.
While there rename tickintr interrupt handler and share initialization
code with schedintr.

Improve IPI handling:
- make IPI takes two arguments.
- add IPI event counters per-CPU.
- implement IPI functions which were missing or broken.
- insert DELAY while halting primary CPU in IPI handler.

- make interrupt pending list per-CPU.
- make tickintr() MP-safe.
- remove unused port-sparc derived interrupt code.

Ok by martin@.

Make TSBs and MMU contexts per-cpu.

Remove CTL_MACHDEP_NAMES, it's not used anywhere.

Ok by martin@.

Get rid of the IPI simple_lock.

branches: 1.71.2; 1.71.6;
remove unused extern declarations

For non-mpsafe interrupt handlers, grab the kernel lock via a biglock
wrapper. Fixes PR port-sparc64/37468.

Rename cpuset_t for now to sparc64_cpuset_t, to avoid a name clash with
<sys/pset.h>. Mid-term we should probably convert to the MI cpuset_t.

branches: 1.68.2;
Provide cpu_intr_p(), at least for non-MULTIPROCESSOR kernels.
Based on suggestions by Andrew Doran.

branches: 1.67.2; 1.67.4; 1.67.6;
Merge the ppcoea-renovation branch to HEAD.

This branch was a major cleanup and rototill of many of the various OEA
cpu based PPC ports that focused on sharing as much code as possible
between the various ports to eliminate near-identical copies of files in
every tree. Additionally there is a new PIC system that unifies the
interface to interrupt code for all different OEA ppc arches. The work
for this branch was done by a variety of people, too long to list here.

TODO:
bebox still needs work to complete the transition to -renovation.
ofppc still needs a bunch of work, which I will be looking at.
ev64260 still needs to be renovated
amigappc was not attempted.

NOTES:
pmppc was removed as an arch, and moved to a evbppc target.

Cleanup cpu_info: get rid of ci_number and ci_upaid, use ci_index
and ci_cpuid instead.

Make cpufrequency and friends per cpu values.
Prepare a hz tick interrupt on secondary CPUs via %tick, but do not
enable it yet, as it breaks ddb.

branches: 1.64.2;
Remove INITSTACK completely - at the time we used to switch to it, we
already have access to all of lwp0 and it's uarea - so we can switch
to the correct lwp0 stack easily before calling main.

branches: 1.63.4; 1.63.8;
merge yamt-idlelwp branch. asked by core@. some ports still needs work.

from doc/BRANCHES:

idle lwp, and some changes depending on it.

1. separate context switching and thread scheduling.
(cf. gmcgarry_ctxsw)
2. implement idle lwp.
3. clean up related MD/MI interfaces.
4. make scheduler(s) modular.

branches: 1.62.2; 1.62.4; 1.62.10;
Kill caddr_t; there will be some MI fallout, but it will be fixed shortly.

branches: 1.61.2;
Remove spllowersoftclock() and CLKF_BASEPRI(), and always dispatch callouts
via a soft interrupt. In the near future, softclock will be run from process
context.

Merge newlock2 to head.

Remove obsolet kgdb parts

remove some sparc v8 only definitions.

branches: 1.57.2;
Lazy FPU handling for the MULTIPROCESSOR case

Do not bother to save fpu state when we are about to get rid of it.

SMP cleanup. provide support for multiple CPUs in DDB. (SMP itself
is still not working.)

cpu.h:
- add a pointer for DDB regs in SMP environment to struct cpu_info
- remove the #defines for mp_pause_cpus() and mp_resume_cpus()
cpuset.h:
- remove CPUSET_ALL() and rename CPUSET_ALL_BUT() to CPUSET_EXCEPT()
from petrov.
db_machdep.h:
- rename the members of db_regs_t to be the same as sparc
- change "db_regs_t ddb_regs" to "db_regs_t *ddb_regp" and change
all references to suit
- redo DDB_REGS to no longer be a pointer to a fixed data structure
but to one allocated per-cpu when ddb is entered
- move a bunch of prototypes in here
intr.h:
- remove SPARC64_IPI_* macros, no longer used
db_interface.c:
- change "db_regs_t ddb_regs" to "db_regs_t *ddb_regp" and change
all references to suit
- make "nil" a 64 bit entity
- change the ddb register access methods to work in multiprocessor
environment, it is now very much like sparc does it
- in kdb_trap() avoid accessing ddb_regp when it is NULL
- update several messages to include the cpu number
- unpause other cpus much later when resuming from ddb
- rename db_lock() to db_lock_cmd(), as the sparc-like code has
db_lock as a simple lock
- remove "mach cpus" command, and replace it with "mach cpu" (which
does the same) and also implement "mach cpu N" to switch to
another cpus saved trapframe
db_trace.c:
- update for the ddb_regs -> ddb_regp change
genassym.cf:
- add TF_KSTACK as offsetof(struct trapframe64, tf_kstack)
ipifuncs.c:
- overhaul extensively
- remove all normal interrupt handlers as IPI's, we now handle
them all specially in locore.s:interrupt_vector
- add a simplelock around all ipi functions - it's not safe for
multiple cpus to be sending IPI's to each other right now
- rename sparc64_ipi_pause() to sparc64_ipi_pause_thiscpu() and,
if DDB is configured, enable it to save the passed-in trapframe
to a db_regs_t for this cpu's saved DDB registers.
- remove the "ipimask" system (SPARC64_IPI_* macros) and instead
pass functions directly
- in sparc64_send_ipi() always set the interrupt arguments to 0,
the address and argument of the to be called function. (the
argument right now is the address of ipi_tlb_args variable, and
part of the reason why only one CPU can send IPI's at a time.)
don't wait forever for an IPI to complete. some of this is
from petrov.
- rename sparc64_ipi_{halt,pause,resume}_cpus() to
mp_{halt,pause,resume}_cpus()
- new function mp_cpu_is_paused() used to avoid access missing
saved DDB registers
- actually broadcast the flush in smp_tlb_flush_pte(),
smp_tlb_flush_ctx() and smp_tlb_flush_all(). the other end may
not do anything yet in the pte/ctx cases yet...
kgdb_machdep.c:
- rework for changed member names in db_regs_t.
locore.s:
- shave an instruction from syscall_setup() (set + ld -> sethi + ld)
- remove some old dead debug code
- add new sparc64_ipi_halt IPI entry point, it just calls the C
vector to shutdown.
- add new sparc64_ipi_pause IPI entry point, which just traps into
the debugger using the normal breakpoint trap. these cpus usually
lose the race in db_interface.c:db_suspend_others() and end up
calling the C vector sparc64_ipi_pause_thiscpu().
- add #if 0'ed code to sparc64_ipi_flush_{pte,ctx}() IPI entry
points to call the sp_ version of these functions.
- in rft_kernel (return from trap, kernel), check to see if the
%tpc is at the sparc64_ipi_pause_trap_point and if so, call
"done" not "retry"
- rework cpu_switch slightly: save the passed-in lwp instead of
using the one in curlwp
- in cpu_loadproc(), save the new lwp not the old lwp, to curlwp
- in cpu_initialize(), set %tl to zero as well. from petrov.
- in cpu_exit(), fix a load register confusion. from petrov.
- change some "set" in delay branch to "mov".
machdep.c:
- deal with function renames
pmap.c:
- remove a spurious space
trap.c:
- remove unused "trapstats" variable
- add cpu number to a couple of messages

branches: 1.54.6;
convert to timecounters (from branch simonb-timecounters)

branches: 1.53.2; 1.53.8;
Use ANSI-style function definitions and declarations.

ANSIfication: u_intN_t -> uintN_t, use ANSI function declarations/definitions
instead of K&R ones.

branches: 1.51.2; 1.51.4;
Alter sparc64 bootstrap, catch up to ofwboot v1.9:

- Accept bootinfo structure passed down from ofwboot v1.9
- Drop kernel re-mapping code
- Use permanent 4MB mappings provided by the loader instead
- Change kernel entry address to point directly at the code instead of pointing
at the trap table's first slot. This allows the bootloader to detect
those kernels which are aware of the new boot scheme
- Due to the changes in kernel mapping code, alter secondary CPU bootstrap
code to use trampoline just like FreeBSD does (some FreeBSD code is used
here as well)

branches: 1.50.2;
Remove leading __ from __(const|inline|signed|volatile) -- it is obsolete.

merge ktrace-lwp.

Follow the lead of the sparc port:
- move md_flags back to mdproc, because we only have per-proc flags
currently
- implement cpu_proc_fork() to init p_md.md_flags on fork

branches: 1.47.2; 1.47.4;
Rename 'ncpus' to 'sparc_ncpus' to avoid shadow warnings in m.i. code.
Also sprinkle an __UNVOLATILE() for sparc.
n.b. sparc64 'cpus' should probably be renamed to 'cpu_info_list' to
match i386 et al.

move some per-cpu data definitions to MI place so that they can be modified
without touching all ports. discussed on tech-kern@.

Fix small glitches to make SMP kernels compile again.

Define mp_pause(resume)_cpus needed for callprom.

checkpoint of MP work from dennis and myself. includes cross-processor
interrupt framework, a sledgehammer TLB invalidation and misc MP fixes.
doesn't work at all yet.

Spinup secondary cpus. Based on codes sent to me by Dennis Chernoivanov
and Chuck Silvers.

Rearrange process exit path to avoid need to free resources from different
process context ('reaper').

From within the exiting process context:
* deactivate pmap and free vmspace while we can still block
* introduce MD cpu_lwp_free() - this cleans all MD-specific context (such
as FPU state), and is the last potentially blocking operation;
all of cpu_wait(), and most of cpu_exit(), is now folded into cpu_lwp_free()
* process is now immediatelly marked as zombie and made available for pickup
by parent; the remaining last lwp continues the exit as fully detached
* MI (rather than MD) code bumps uvmexp.swtch, cpu_exit() is now same
for both 'process' and 'lwp' exit

uvm_lwp_exit() is modified to never block; the u-area memory is now
always just linked to the list of available u-areas. Introduce (blocking)
uvm_uarea_drain(), which is called to release the excessive u-area memory;
this is called by parent within wait4(), or by pagedaemon on memory shortage.
uvm_uarea_free() is now private function within uvm_glue.c.

MD process/lwp exit code now always calls lwp_exit2() immediatelly after
switching away from the exiting lwp.

g/c now unneeded routines and variables, including the reaper kernel thread

Use per-cpu pcb, curlwp and fplwp rather than global ones. This brings
GENERIC.MP configuration to a usable state.

Approved by petrov@.

Set curcpu() for SMP.

Compile GENERIC.MP.

Use #if defined(_KERNEL_OPT) to protect #include "opt_xxx.h"
from building LKM etc. Suggested by mrg.

Move UCB-licensed code from 4-clause to 3-clause licence.

Patches provided by Joel Baker in PR 22364, verified by myself.

branches: 1.35.2;
Switch to use cycle counter (%tick) based microtime().

This is derived from alpha/microtime.c and i386/tsc_microtime.c,
and will share with both ports.

This should fix PR port-sparc64/18452.
(approved by martin)

Merge the nathanw_sa branch.

Sync machdep sysctls with sparc.

remove some vestigial FPU and cache code that's not need on ultrasparcs.
misc tidiness.

branches: 1.31.4;
Have CLKF_BASEPRI() always return false for now to prevent hardclock
from being blocked by softclock.

Correctly take into account the satck bias in CLKF_INTR().

branches: 1.29.6;
don't explicitly size the intrhand[] array; fixes PR#13859 from <martti.kuparinen@iki.fi>

branches: 1.28.2;
Don't need to prototype child_return() here, it's in <sys/proc.h>.

branches: 1.27.2;
Make softclock a generic soft interrupt of the API is available,
adding the requisite void * argument to softclock().

This seems to fix the interrupt lossage of non-debug kernels.

probeget() actually handles 64-bit values so fix the prototype.

Make need_resched() take a "struct cpu_info *" argument. This
causes gives a primitive form of processor affinity. Its use in
roundrobin() still needs some work.

Prevent interrupts from being posted if they are active and deprecate polled
interrupts. This seems to eliminate the spurious interrupts.

Clean up interrupt handling some more.

Fix interrupt delivery on UltraSPARC IIi machines.

branches: 1.20.2;
Have separate data and text segments, make text read-only.

Start reorganizing the kernel for MULTIPROCESSOR support.

ih_map & ih_clr are volatile.

branches: 1.17.2;
First sweep at scheduler state cleanup. Collect MI scheduler
state into global and per-CPU scheduler state:

- Global state: sched_qs (run queues), sched_whichqs (bitmap
of non-empty run queues), sched_slpque (sleep queues).
NOTE: These may collectively move into a struct schedstate
at some point in the future.

- Per-CPU state, struct schedstate_percpu: spc_runtime
(time process on this CPU started running), spc_flags
(replaces struct proc's p_schedflags), and
spc_curpriority (usrpri of processes on this CPU).

- Every platform must now supply a struct cpu_info and
a curcpu() macro. Simplify existing cpu_info declarations
where appropriate.

- All references to per-CPU scheduler state now made through
curcpu(). NOTE: this will likely be adjusted in the future
after further changes to struct proc are made.

Tested on i386 and Alpha. Changes are mostly mechanical, but apologies
in advance if it doesn't compile on a particular platform.

Revamp interrupts again:

Fix a bug causing interrmittent panics in interrupt dispatch.
Use interrupt vectors for softints.
Add a new send_softint interface.
Improved D$ flushing.
Improve traptrace and other debugging enhancements.

Make CLKF_INTR() more intelligent.

Provide explicit 64-bit and 32-bit types for compatibility with sparc
userland.

branches: 1.13.2; 1.13.4;
Update to post 1.4.

branches: 1.12.2;
Define cpu_number() as discussed on tech-smp.

Move the DVMA mapin/mapout functions from the SBus driver to the iommu driver.

Another general cleanup:

Remove the entire idea of fasttrap interrupts since V9 traps are really cheap,
the CPUs are really fast, and the completely different trap frames would make
these handlers really difficult to implement.

pmap_changeprot() was only used by the clock and one other place; deprecate it.

probeget() and probeset() now take 64-bit addresses even in 32-bit mode so we
can probe IO locations by physical addresses.

Some pmap cleanup.

Some more copyright cleanup.

Make pbrobeget() and probeset() work for 64-bit values as well. To do this
the arguments are changed so the address is first and the ASI second so we
can have the address in %o0:%o1 and not worry about unused registers.

Also a bit of copyright cleanup.

Fix things up so they compile again.

Add code to support using %tick as the system clock if no "counter-timer" node
is found.

clone intr.h from the SPARC.

branches: 1.5.6;
add protos for switchtoctx, fixalign and emulinstr. XXX should all these be here?

Changes to support fork_kthread():
- cpu_set_kpc() now takes void *arg third argument, passed to the
entry point.
- cpu_fork() allows parent to be non-curproc iff parent is proc0.
When forking non-curproc, assume its state has already been saved.
- Adjust various pieces of machine-dependent code to account of all of this.

cpu_set_kpc() prototype is already in <sys/systm.h>.

It slices. It dices. It does everything except exec a sparc32_compat init.

branches: 1.1.1;
Initial revision

- move definition of tick() from ctlreg.h to psl.h and rename to gettick()
for consistency with other functions for reading/writing ASRs.
- move definition of tl() from trap.c to psl.h as same as above.
- define settick() in psl.h and use it in clock.c.
- cosmetic chages in psl.h.

Remove clause 3 and 4 from TNF licenses

branches: 1.6.2; 1.6.4;
Use the passed cpu info for returning the frequency, not the current
cpu

branches: 1.5.16;
Merge the ppcoea-renovation branch to HEAD.

This branch was a major cleanup and rototill of many of the various OEA
cpu based PPC ports that focused on sharing as much code as possible
between the various ports to eliminate near-identical copies of files in
every tree. Additionally there is a new PIC system that unifies the
interface to interrupt code for all different OEA ppc arches. The work
for this branch was done by a variety of people, too long to list here.

TODO:
bebox still needs work to complete the transition to -renovation.
ofppc still needs a bunch of work, which I will be looking at.
ev64260 still needs to be renovated
amigappc was not attempted.

NOTES:
pmppc was removed as an arch, and moved to a evbppc target.

Make cpufrequency and friends per cpu values.
Prepare a hz tick interrupt on secondary CPUs via %tick, but do not
enable it yet, as it breaks ddb.

branches: 1.3.24; 1.3.32; 1.3.38; 1.3.42; 1.3.44;
Change "inline" back to "__inline" in .h files -- C99 is still too
new, and some apps compile things in C89 mode. C89 keywords stay.

As per core@.

branches: 1.2.2; 1.2.4; 1.2.6;
Remove leading __ from __(const|inline|signed|volatile) -- it is obsolete.

branches: 1.1.2; 1.1.20;
Switch to use cycle counter (%tick) based microtime().

This is derived from alpha/microtime.c and i386/tsc_microtime.c,
and will share with both ports.

This should fix PR port-sparc64/18452.
(approved by martin)

Remove clause 3 and 4 from TNF licenses

branches: 1.7.2; 1.7.4;
Make TSBs and MMU contexts per-cpu.

branches: 1.6.2; 1.6.6;
Rename cpuset_t for now to sparc64_cpuset_t, to avoid a name clash with
<sys/pset.h>. Mid-term we should probably convert to the MI cpuset_t.

branches: 1.5.30; 1.5.36; 1.5.44;
SMP cleanup. provide support for multiple CPUs in DDB. (SMP itself
is still not working.)

cpu.h:
- add a pointer for DDB regs in SMP environment to struct cpu_info
- remove the #defines for mp_pause_cpus() and mp_resume_cpus()
cpuset.h:
- remove CPUSET_ALL() and rename CPUSET_ALL_BUT() to CPUSET_EXCEPT()
from petrov.
db_machdep.h:
- rename the members of db_regs_t to be the same as sparc
- change "db_regs_t ddb_regs" to "db_regs_t *ddb_regp" and change
all references to suit
- redo DDB_REGS to no longer be a pointer to a fixed data structure
but to one allocated per-cpu when ddb is entered
- move a bunch of prototypes in here
intr.h:
- remove SPARC64_IPI_* macros, no longer used
db_interface.c:
- change "db_regs_t ddb_regs" to "db_regs_t *ddb_regp" and change
all references to suit
- make "nil" a 64 bit entity
- change the ddb register access methods to work in multiprocessor
environment, it is now very much like sparc does it
- in kdb_trap() avoid accessing ddb_regp when it is NULL
- update several messages to include the cpu number
- unpause other cpus much later when resuming from ddb
- rename db_lock() to db_lock_cmd(), as the sparc-like code has
db_lock as a simple lock
- remove "mach cpus" command, and replace it with "mach cpu" (which
does the same) and also implement "mach cpu N" to switch to
another cpus saved trapframe
db_trace.c:
- update for the ddb_regs -> ddb_regp change
genassym.cf:
- add TF_KSTACK as offsetof(struct trapframe64, tf_kstack)
ipifuncs.c:
- overhaul extensively
- remove all normal interrupt handlers as IPI's, we now handle
them all specially in locore.s:interrupt_vector
- add a simplelock around all ipi functions - it's not safe for
multiple cpus to be sending IPI's to each other right now
- rename sparc64_ipi_pause() to sparc64_ipi_pause_thiscpu() and,
if DDB is configured, enable it to save the passed-in trapframe
to a db_regs_t for this cpu's saved DDB registers.
- remove the "ipimask" system (SPARC64_IPI_* macros) and instead
pass functions directly
- in sparc64_send_ipi() always set the interrupt arguments to 0,
the address and argument of the to be called function. (the
argument right now is the address of ipi_tlb_args variable, and
part of the reason why only one CPU can send IPI's at a time.)
don't wait forever for an IPI to complete. some of this is
from petrov.
- rename sparc64_ipi_{halt,pause,resume}_cpus() to
mp_{halt,pause,resume}_cpus()
- new function mp_cpu_is_paused() used to avoid access missing
saved DDB registers
- actually broadcast the flush in smp_tlb_flush_pte(),
smp_tlb_flush_ctx() and smp_tlb_flush_all(). the other end may
not do anything yet in the pte/ctx cases yet...
kgdb_machdep.c:
- rework for changed member names in db_regs_t.
locore.s:
- shave an instruction from syscall_setup() (set + ld -> sethi + ld)
- remove some old dead debug code
- add new sparc64_ipi_halt IPI entry point, it just calls the C
vector to shutdown.
- add new sparc64_ipi_pause IPI entry point, which just traps into
the debugger using the normal breakpoint trap. these cpus usually
lose the race in db_interface.c:db_suspend_others() and end up
calling the C vector sparc64_ipi_pause_thiscpu().
- add #if 0'ed code to sparc64_ipi_flush_{pte,ctx}() IPI entry
points to call the sp_ version of these functions.
- in rft_kernel (return from trap, kernel), check to see if the
%tpc is at the sparc64_ipi_pause_trap_point and if so, call
"done" not "retry"
- rework cpu_switch slightly: save the passed-in lwp instead of
using the one in curlwp
- in cpu_loadproc(), save the new lwp not the old lwp, to curlwp
- in cpu_initialize(), set %tl to zero as well. from petrov.
- in cpu_exit(), fix a load register confusion. from petrov.
- change some "set" in delay branch to "mov".
machdep.c:
- deal with function renames
pmap.c:
- remove a spurious space
trap.c:
- remove unused "trapstats" variable
- add cpu number to a couple of messages

branches: 1.4.8; 1.4.20;
Remove leading __ from __(const|inline|signed|volatile) -- it is obsolete.

merge ktrace-lwp.

branches: 1.2.4; 1.2.18;
Use "#define<tab>" consistently.

checkpoint of MP work from dennis and myself. includes cross-processor
interrupt framework, a sledgehammer TLB invalidation and misc MP fixes.
doesn't work at all yet.

sparc: fix snprintb formats for SFSR_BITS

fix typos, mainly s/unsupport/unsupported/ in log messages.

fix typos in comments.

few more typos in the word "register", mainly s/resister/register/.
In one comment I assume that it was meant to be pull-up resistor.

Revert workarounds for clang.
In-tree clang can now handle the "r" asm constraint for 64-bit values properly.

Redo previous.
In the case of store variant, put dummy constraint in output
instead of input.

Suggested by joerg@ in source-changes-d@

Add dummy constraints to avoid excessive optimization in clang.
GENERIC kernel compiled with clang now boot at least on my Fire V100.

branches: 1.64.16;
Rename the "flush" macro to "sparc_flush_icache", the former is way too
generic for a macro name.

branches: 1.63.2;
sun4v: extend dmmu_set_secondary_context() to handle both sun4u and sun4v. ok martin@

sun4v: Implement handling of cpu_mondo trap - from OpenBSD - tested using the Legion simulator

branches: 1.61.4;
sun4v: Introduce SET_MMU_CONTEXTID macro for setting the mmu context id on both sun4u and sun4v

branches: 1.60.2;
Updates to pmap_bootstrap() for sun4v - parts from OpenBSD - OK martin@

branches: 1.59.2;
Rename ASR_IDSR to ASI_IDSR, which is ASI (Address Space Identifier),
not ASR (Ancillary State Register).

Move ASRs macro to more appropriate header.
While there remove useless macro.

use system tick timer instead of %tick on UltraSPARC-III-ish CPUs
review & fixes by Takeshi Nakayama

branches: 1.56.2; 1.56.8; 1.56.12;
Fix namespace confilicts membar_ops(3) vs. macros for SPARC V9
membar instructions.

add some control registers found on the Fire and Jupiter busses.
from openbsd.

branches: 1.54.2;
add a bit for MCCR_RAW_EN -- enable read-after-write.

Clear the upper word explicitly before combining two 32-bit values to 64-bit
on 32-bit kernels.

branches: 1.52.2;
add some bits to set to access all the cheetah dtlb/itlb's.

s/D-cache/I-cache/ in some comments.

add some defines for the sizes of TLBs in various CPUs.

branches: 1.49.2;
for USIII, use the new "tlb demap all" operation in sp_tlb_flush_all()

Garbage collect unused or incomplete definitions.

Bring together similar inline asm codes of ld*a and st*a definitions
using macro, also remove unnecessary membar #Sync and %asi restore in
the case of 32-bit kernel.

While there, introduce an optimization case that asi is constant if
we are using gcc.

add some ultrasparcIII defines, from openbsd.

- move definition of tick() from ctlreg.h to psl.h and rename to gettick()
for consistency with other functions for reading/writing ASRs.
- move definition of tl() from trap.c to psl.h as same as above.
- define settick() in psl.h and use it in clock.c.
- cosmetic chages in psl.h.

branches: 1.44.38;
Cleanup last by using a "n"umeric address space identifier.

Ok: Martin Husemann <martin@netbsd.org>

When invalidating a context, make sure to flush user windows upfront.
Do not set the DMMU secondary context to 0 (that would be kernel), and
add a few required membars after switching the secondary dmmu context.

This avoids SIRs caused by double kernel_data_faults, caused by spills
of obsolete user windows after the context for that user pmap is gone.

branches: 1.42.18; 1.42.20; 1.42.24; 1.42.26;
Use ANSI-style function definitions and declarations.

Change "inline" back to "__inline" in .h files -- C99 is still too
new, and some apps compile things in C89 mode. C89 keywords stay.

As per core@.

ANSIfication: u_intN_t -> uintN_t, use ANSI function declarations/definitions
instead of K&R ones.

branches: 1.39.2; 1.39.4; 1.39.6;
__asm__ -> __asm
__const__ -> const
__inline__ -> inline
__volatile__ -> volatile

Remove leading __ from __(const|inline|signed|volatile) -- it is obsolete.

merge ktrace-lwp.

branches: 1.36.12;
Added UPA_MID definitions and macros(similar to FreeBSD).
Added membar_store, membar_load macros.
No need to set %asi _after_ alternate space use in corresponding functions.
Enable(unifdef) casa functions for __arch64__.

typo in define name, littie -> little

Add missing ; in inline assembler for 32bit kernels

clean-up, reformat __asm statements.

Eliminate cast 64-bit address to u_long.

checkpoint of MP work from dennis and myself. includes cross-processor
interrupt framework, a sledgehammer TLB invalidation and misc MP fixes.
doesn't work at all yet.

branches: 1.30.10;
Don't need to flush the d$ for MMU bypass accesses.

Make PHYS_ASI() also recognize little-endian ASIs.

branches: 1.28.6;
Add some alternate spellings for ASIs.
Make sure ASI_PRIMARY_NOFAULT is always restored.
Garbage collect some old code.

Don't bother flushing cache lines for un-cached accesses.

branches: 1.26.2;
Add the shorter version of block ASIs used by Sun.

Fix some 32-bit assembly code.

Comment out caxsa, it's not used. Avoids 32 bit compile errors.

Fix register sheduling bug in st?a() routines and add casxa().

Tell gcc that stores clobber "memory". Probably makes no difference since
they should not be used to access normal memory anyway.

With these changes the kernel seems almost stable again.

More VM cleanup:

Move the cpu_info structure above the interrupt stack so it won't
get corrupted if the stack overflows.

Flush the D$ before and after all MMU bypass accesses since the
D$ latches all of those.

lda is unsigned, ldswa is signed. Fixes a 32-bit sign extension bug.

branches: 1.18.2;
Have separate data and text segments, make text read-only.

Only use 32-bit addresses for all accesses that don't bypass the MMU.
Makes SBus work again.

Fixup signed/unsigned issues so 32-bit addresses are not sign extended.

Add a couple of missing semi-colons.

Use all 64 address bits in ld*a()/st*a() macros so physical device addresses
work. (Also add some bus_space_*() debug hooks).

branches: 1.13.2;
- IRSR_BUSY is bit 5 not bit 4.
- IRSR_MID(x) is &'d with 0x1f (5 bits) not 0xf.

branches: 1.12.2;
mmm, missing return types make gcc unhappy.

Make pbrobeget() and probeset() work for 64-bit values as well. To do this
the arguments are changed so the address is first and the ASI second so we
can have the address in %o0:%o1 and not worry about unused registers.

Also a bit of copyright cleanup.

Fix some bugs in some more of those asm macros.

Re-write ASI load/stores to use full 64-bit addresses so we can use device
register addresses with MMU bypass ASIs.

Fixup argument confusion to __asm() statements. long long is two registers
wide in 32-bit mode. Doh!.

Don't clobber any input regs in __asm statements.

branches: 1.6.4;
Flush D$ on bypass accesses.

retire _LP64; use compiler provided __arch64__, but still defined _LP64 where we used to anyway.

Fix 32-bit gcc scheduling problems.

It slices. It dices. It does everything except exec a sparc32_compat init.

Periodic update: now starts probing devices.

branches: 1.1.1;
Initial revision

Don't provide things that don't make sense in userland. We don't provide
access to registers crash(8)...

branches: 1.35.4;
Cleanup and clarify the ELFSIZE mess:

We now have 2 variables automatically set in elf_machdep.h:

ARCH_ELFSIZE: the size for userland binaries
KERN_ELFSIZE: the size for the kernel binaries

DB_ELFSIZE has been deleted and KERN_ELFSIZE should have always the
same values DB_ELFSIZE used to have.

In sys/exec_elf.h, if ELFSIZE is not set, it is set to KERN_ELFSIZE
for the kernel and ARCH_ELFSIZE for userland. These defaults should
eliminate the need for most manual ELFSIZE setting.

Remove #define SUN4U since machine/frame.h doesn't check SUN4U anymore.

branches: 1.33.12; 1.33.30;
rename sparc64 BLOCK_SIZE and BLOCK_ALIGN to have SPARC64_ prefixes.
for the assembler files, define the old names to the new names
since using the new names cause ugliness due to longer identifer
names, and reduces churn.

fixes build issues in dtv and vaguely makes <machine/psl.h> slightly
less name-space invasive.

Remove frame32 hack with using the same trick in netbsd32_machdep.c.

branches: 1.31.2;
Fix 32-bit kernel build.

Introduce DDB_EXPR_FMT and replace the logic around DB_EXPR_T_IS_QUAD.

this needs sys/types.h in userspace.

remove DB_AOUT_SYMBOLS.

branches: 1.27.2;
Retire struct user, remove sys/user.h inclusions. Note sys/user.h header
as obsolete. Remove USER_TO_UAREA/UAREA_TO_USER macros.

Various #include fixes and review by matt@.

branches: 1.26.8;
Make DDB shows right register values on 32-bit sparc64 kernels.
- define db_expr_t as int64_t.
- %gsr is 32-bit, so use db_sparc_intop.
- sync arguments with function prototype.
- ansify.

branches: 1.25.2; 1.25.4;
sparc64_ipi_save_fpstate:
- use primary MMU context for consistency with other trap/interrupt handlers.

sparc64_ipi_save_fpstate, savefpstate:
- avoid storing fp registers as we can.

sparc64_ipi_save_fpstate, savefpstate, loadfpstate:
- remove unaligned case since buffers allocated with pool_cache are ensured
64-byte aligned.

Ok by martin@.

branches: 1.24.4; 1.24.6; 1.24.8; 1.24.10;
Rearange ddb saved register values slightly.
While there fix completely bogus register access ops for < 64 bit values.

branches: 1.23.22; 1.23.38; 1.23.42;
More boolean_t -> bool

Replace the Mach-derived boolean_t type with the C99 bool type. A
future commit will replace use of TRUE and FALSE with true and false.

branches: 1.21.4;
Allow kernel to build with KGDB enabled.

branches: 1.20.2;
SMP cleanup. provide support for multiple CPUs in DDB. (SMP itself
is still not working.)

cpu.h:
- add a pointer for DDB regs in SMP environment to struct cpu_info
- remove the #defines for mp_pause_cpus() and mp_resume_cpus()
cpuset.h:
- remove CPUSET_ALL() and rename CPUSET_ALL_BUT() to CPUSET_EXCEPT()
from petrov.
db_machdep.h:
- rename the members of db_regs_t to be the same as sparc
- change "db_regs_t ddb_regs" to "db_regs_t *ddb_regp" and change
all references to suit
- redo DDB_REGS to no longer be a pointer to a fixed data structure
but to one allocated per-cpu when ddb is entered
- move a bunch of prototypes in here
intr.h:
- remove SPARC64_IPI_* macros, no longer used
db_interface.c:
- change "db_regs_t ddb_regs" to "db_regs_t *ddb_regp" and change
all references to suit
- make "nil" a 64 bit entity
- change the ddb register access methods to work in multiprocessor
environment, it is now very much like sparc does it
- in kdb_trap() avoid accessing ddb_regp when it is NULL
- update several messages to include the cpu number
- unpause other cpus much later when resuming from ddb
- rename db_lock() to db_lock_cmd(), as the sparc-like code has
db_lock as a simple lock
- remove "mach cpus" command, and replace it with "mach cpu" (which
does the same) and also implement "mach cpu N" to switch to
another cpus saved trapframe
db_trace.c:
- update for the ddb_regs -> ddb_regp change
genassym.cf:
- add TF_KSTACK as offsetof(struct trapframe64, tf_kstack)
ipifuncs.c:
- overhaul extensively
- remove all normal interrupt handlers as IPI's, we now handle
them all specially in locore.s:interrupt_vector
- add a simplelock around all ipi functions - it's not safe for
multiple cpus to be sending IPI's to each other right now
- rename sparc64_ipi_pause() to sparc64_ipi_pause_thiscpu() and,
if DDB is configured, enable it to save the passed-in trapframe
to a db_regs_t for this cpu's saved DDB registers.
- remove the "ipimask" system (SPARC64_IPI_* macros) and instead
pass functions directly
- in sparc64_send_ipi() always set the interrupt arguments to 0,
the address and argument of the to be called function. (the
argument right now is the address of ipi_tlb_args variable, and
part of the reason why only one CPU can send IPI's at a time.)
don't wait forever for an IPI to complete. some of this is
from petrov.
- rename sparc64_ipi_{halt,pause,resume}_cpus() to
mp_{halt,pause,resume}_cpus()
- new function mp_cpu_is_paused() used to avoid access missing
saved DDB registers
- actually broadcast the flush in smp_tlb_flush_pte(),
smp_tlb_flush_ctx() and smp_tlb_flush_all(). the other end may
not do anything yet in the pte/ctx cases yet...
kgdb_machdep.c:
- rework for changed member names in db_regs_t.
locore.s:
- shave an instruction from syscall_setup() (set + ld -> sethi + ld)
- remove some old dead debug code
- add new sparc64_ipi_halt IPI entry point, it just calls the C
vector to shutdown.
- add new sparc64_ipi_pause IPI entry point, which just traps into
the debugger using the normal breakpoint trap. these cpus usually
lose the race in db_interface.c:db_suspend_others() and end up
calling the C vector sparc64_ipi_pause_thiscpu().
- add #if 0'ed code to sparc64_ipi_flush_{pte,ctx}() IPI entry
points to call the sp_ version of these functions.
- in rft_kernel (return from trap, kernel), check to see if the
%tpc is at the sparc64_ipi_pause_trap_point and if so, call
"done" not "retry"
- rework cpu_switch slightly: save the passed-in lwp instead of
using the one in curlwp
- in cpu_loadproc(), save the new lwp not the old lwp, to curlwp
- in cpu_initialize(), set %tl to zero as well. from petrov.
- in cpu_exit(), fix a load register confusion. from petrov.
- change some "set" in delay branch to "mov".
machdep.c:
- deal with function renames
pmap.c:
- remove a spurious space
trap.c:
- remove unused "trapstats" variable
- add cpu number to a couple of messages

branches: 1.19.8;
closes: PR kern/32359

modifies machine/db_machdep.h: BKPT_SET(inst) to BKPT_SET(inst, addr) for all archs ie; passess the
breakpoint address as well.

Patch from cherry@mahiti.org

branches: 1.18.2; 1.18.4; 1.18.6;
Use ANSI-style function definitions and declarations.

branches: 1.17.2; 1.17.4; 1.17.6;
merge ktrace-lwp.

branches: 1.16.16;
Some cleanup and move ddb_regs declaration to db_interface.c

branches: 1.15.2;
My reading of the gdb code seems to indicate it expects 125 registers
from sparc64, not 72 (sparc value). Bump kgdb buffer size a bit too.

Add a BKPT_ADDR() macro which gives MD code a chance to munge a
breakpoint address before it's used. Currently a no-op on all but sh5.

This is useful on sh5, for example, to mask off the instruction
type encoding in the bottom two address bits, and makes it possible
to do "db> break $rXX" instead of manually munging the address.

branches: 1.13.2;
Remove unneeded declarations of the db_machine_init() function. The
ARM ports are the only ones that actually have one, and it is about
to change.

branches: 1.12.2; 1.12.6;
Also handle FPU registers.

remove include of <vm/vm.h>. <vm/vm.h> -> <uvm/uvm_extern.h>

Revamp interrupts again:

Fix a bug causing interrmittent panics in interrupt dispatch.
Use interrupt vectors for softints.
Add a new send_softint interface.
Improved D$ flushing.
Improve traptrace and other debugging enhancements.

Add debugger single-stepping and fix interrupt dispatch bugs.

Provide explicit 64-bit and 32-bit types for compatibility with sparc
userland.

branches: 1.7.8; 1.7.10; 1.7.14;
retire _LP64; use compiler provided __arch64__, but still defined _LP64 where we used to anyway.

Fix more syscall32 and signal breakage.

It slices. It dices. It does everything except exec a sparc32_compat init.

Periodic update: now starts probing devices.

Some more 64-bit cleanup. Now everything compiles.

Merge paddr_t changes into the main branch.

branches: 1.1.1;
Initial revision

merge ktrace-lwp.

Make disklabel(8) and fdisk(8) into "host tools " last step: build
and install ${TOOLDIR}/bin/${MACHINE_GNU_PLATFORM}-disklabel,
${TOOLDIR}/bin/${MACHINE_GNU_PLATFORM}-fdisk by "reaching over" to
the sources in ${NETBSDSRCDIR}/sbin/{disklabel fdisk}/.

To avoid clashes with a build-host's header files, especially on
*BSD, the host-tools versions of fdisk and disklabel search for
#includes such as disklabel.h, disklabel_acorn.h, disklabel_gpt.h,
and bootinfo.h in a new #includes namespace, nbinclude/. That is,
they #include <nbinclude/sys/disklabel.h>, <nbinclude/machine/disklabel.h>,
<nbinclude/sparc64/disklabel.h>, instead of <sys/disklabel.h> and
such. I have also updated the system headers to #include from
nbinclude/-space when HAVE_NBTOOL_CONFIG_H is #defined.

branches: 1.2.6;
use <sparc/foo.h> where appropriate. now these files become very
very difficult to get out of sync. add bootinfo.h and promlib.h
(using the same method) so that sparc64 headers can build sparc
stand (not yet finished.)

branches: 1.1.1;
Initial revision

use <sparc/foo.h> where appropriate. now these files become very
very difficult to get out of sync. add bootinfo.h and promlib.h
(using the same method) so that sparc64 headers can build sparc
stand (not yet finished.)

branches: 1.2.8; 1.2.12; 1.2.20;
Use absolute size structures for H/W registers.

branches: 1.1.1;
Initial revision

sparc64/elf_machdep.h: organize symbols into psABI & local groups.

Allow this file to be used with <sys/elfdefinitions.h>.

PR lib/59564

Cleanup and clarify the ELFSIZE mess:

We now have 2 variables automatically set in elf_machdep.h:

ARCH_ELFSIZE: the size for userland binaries
KERN_ELFSIZE: the size for the kernel binaries

DB_ELFSIZE has been deleted and KERN_ELFSIZE should have always the
same values DB_ELFSIZE used to have.

In sys/exec_elf.h, if ELFSIZE is not set, it is set to KERN_ELFSIZE
for the kernel and ARCH_ELFSIZE for userland. These defaults should
eliminate the need for most manual ELFSIZE setting.

Add sparc/sparc64 support for irelative relocations.

PR port-sparc64/51925: remove EM_SPARC32PLUS from the 64 bit ELF machine
ids we accept for our executables - that combination makes no sense
at all (probably copy&pasto).

branches: 1.11.6; 1.11.10; 1.11.14;
Allow TOPDOWN-VM only for binaries compiled with appropriate code model.
No change yet, as __HAVE_TOPDOWN is not yet defined.

branches: 1.10.12; 1.10.22; 1.10.26;
Add TLS relocation definitions.

branches: 1.9.68;
We really have EM_SPARC binaries in 32-bits mode, not EM_SPARC32PLUS.
And yes, we do have EM_SPARCV9 binaries in 64-bits mode.

branches: 1.8.32; 1.8.46; 1.8.48; 1.8.50; 1.8.52;
Add support for dumping ELF-cormat core files.

branches: 1.7.4; 1.7.8;
Add some new gunk Sun uses.

Add support for 64-bit PIC and dynamic linking.

branches: 1.5.4;
Move dl* function definitions to libc on ELF.
Based on the patch supplied by Takuya Shiozaki <tshiozak@astec.co.jp>.
See http://mail-index.netbsd.org/tech-userlevel/2000/02/23/0000.html.

Update to match new SVR4-style definition names in <sys/exec_elf.h>.

branches: 1.3.12; 1.3.14; 1.3.16;
Periodic update: now starts probing devices.

General update:

Added genassym.cf
Removed lderr which should never have gotten in
Removed lots of dead code from locore.s
Added some softint stuff to intr.c
Added support for halt -p
esp and le both use bus_dmamap_*() functions now
instead of kdvma_mapin()
groundwork for PCI (but we still have no drivers for
any sun4u PCI devices)

branches: 1.1.1;
Initial revision

branches: 1.1.2;
Move the complex logic for dynamically writing branches from ld.elf_so
into a header for reuse in crt0.o for static ifunc support. Change the
existing logic for sparc64 to use the Bicc variant of ba,a as it allows
+-8MB displacement compared to the BPcc variant's +-1MB. Teach the sparc
variant the same trick for using ba,a and not sethi+jmp when possible.

In the `MY THAT'S GROSS' department...
Eliminate the recursive include of machine/endian.h from sys/endian.h.

Foolish consistency. Mainly, always use underscores and sys/endian.h.

branches: 1.5.2;
Include <sys/endian.h> after defining whether where are little- or
big-endian. i386, pc532 and vax still include <machine/byte_swap.h>
and define macros for the {n,h}to{h,n}*() functions. mips also
defines some endian-independent assembly-code aliases for unaligned
memory accesses.

Mark [hn]to[nh][ls]() with __const__, so they are subject to CSE.

Move the bswap functions from libutil to libc (this bups the
minor of libc and the major of libutil). For little-endian architectures
merge the bnswap() assembly versions with nto* and hton* using symbols
aliasing. Use symbol renaming for the bswap function in this case to avoid
namespace pollution.
Declare bswap* in machine/bswap.h, not machine/endian.h. For little-endian
machines, common code for inline macros go in machine/byte_swap.h
Sync libkern with libc.
Adjust #include in kernel sources for machine/bswap.h.

(Always) (practice) (safe) (macro expansion).

branches: 1.1.1;
Initial revision

branches: 1.1.6;
In the `MY THAT'S GROSS' department...
Eliminate the recursive include of machine/endian.h from sys/endian.h.

these files were removed years ago (exec.h was not even installed).

branches: 1.1.1;
Initial revision

Use <dev/sun/fbio.h>, not our own copy.

branches: 1.1.1;
Initial revision

Framebuffer code common to sparc and sparc64 was merged and moved to
dev/sun 3 years ago. Remove these redundant and out-of-date copies.
All code now uses dev/sun/fbvar.h

Move UCB-licensed code from 4-clause to 3-clause licence.

Patches provided by Joel Baker in PR 22364, verified by myself.

branches: 1.5.24;
Change the kernel mmap interface so that the offset to map is an
"off_t" and the return value is a "paddr_t" to allow mappings
at offsets past 2^31 bytes. Somewhat inspired by FreeBSD, which
only changed the offset to a "vm_offset_t".

Includes updates for the i386, pc532 and sh3 mmmmap from Jason Thorpe.