aprintify.

branches: 1.7.8;
Fix syntax. *sigh*

Finish device/softc split.

- device/softc split

branches: 1.4.74; 1.4.78; 1.4.80; 1.4.82; 1.4.84;
merge ktrace-lwp.

If there are no ioapics, don't bother to put things in ioapic mode.
However, always do this otherwise, regardless of the revision.
Remove incorrect comment.

branches: 1.2.2;
pass string length (= boundary info) to pci_devinfo so that we do not run over
the end of memory region

Moved here from arch/amd64/pci

#include <sys/bus.h> instead of <machine/bus.h>.

branches: 1.1.2; 1.1.4; 1.1.6; 1.1.68;
Moved from i386/pci/agp_machdep.c; from Blair Sadewitz

merge ktrace-lwp.

branches: 1.1.2;
Moved here from arch/amd64/pci

Merge thorpej-cfargs2.

branches: 1.4.8;
Merge thorpej-cfargs branch:

Simplify and make extensible the config_search() / config_found() /
config_attach() interfaces: rather than having different variants for
which arguments you want pass along, just have a single call that
takes a variadic list of tag-value arguments.

Adjust all call sites:
- Simplify wherever possible; don't pass along arguments that aren't
actually needed.
- Don't be explicit about what interface attribute is attaching if
the device only has one. (More simplification.)
- Add a config_probe() function to be used in indirect configuiration
situations, making is visibly easier to see when indirect config is
in play, and allowing for future change in semantics. (As of now,
this is just a wrapper around config_match(), but that is an
implementation detail.)

Remove unnecessary or redundant interface attributes where they're not
needed.

There are currently 5 "cfargs" defined:
- CFARG_SUBMATCH (submatch function for direct config)
- CFARG_SEARCH (search function for indirect config)
- CFARG_IATTR (interface attribte)
- CFARG_LOCATORS (locators array)
- CFARG_DEVHANDLE (devhandle_t - wraps OFW, ACPI, etc. handles)

...and a sentinel value CFARG_EOL.

Add some extra sanity checking to ensure that interface attributes
aren't ambiguous.

Use CFARG_DEVHANDLE in MI FDT, OFW, and ACPI code, and macppc and shark
ports to associate those device handles with device_t instance. This
will trickle trough to more places over time (need back-end for pre-OFW
Sun OBP; any others?).

branches: 1.3.14;
Added support for AMD family 16h cpu sensors - (just like 10h-14h).
(Tested on netbsd-8.0 release.)

branches: 1.2.2; 1.2.4; 1.2.36; 1.2.42; 1.2.44;
Add rescan support. Re-fixes PR 45268.

Replace amdtempbus with amdnb_miscbus.
This allows us to have independent drivers on the same device (northbridge f3)
each coming with a certain functionality/feature.
This way we do not need to mess with amdtemp(4) to utilize other features.

Merge thorpej-cfargs2.

branches: 1.4.8;
Merge thorpej-cfargs branch:

Simplify and make extensible the config_search() / config_found() /
config_attach() interfaces: rather than having different variants for
which arguments you want pass along, just have a single call that
takes a variadic list of tag-value arguments.

Adjust all call sites:
- Simplify wherever possible; don't pass along arguments that aren't
actually needed.
- Don't be explicit about what interface attribute is attaching if
the device only has one. (More simplification.)
- Add a config_probe() function to be used in indirect configuiration
situations, making is visibly easier to see when indirect config is
in play, and allowing for future change in semantics. (As of now,
this is just a wrapper around config_match(), but that is an
implementation detail.)

Remove unnecessary or redundant interface attributes where they're not
needed.

There are currently 5 "cfargs" defined:
- CFARG_SUBMATCH (submatch function for direct config)
- CFARG_SEARCH (search function for indirect config)
- CFARG_IATTR (interface attribte)
- CFARG_LOCATORS (locators array)
- CFARG_DEVHANDLE (devhandle_t - wraps OFW, ACPI, etc. handles)

...and a sentinel value CFARG_EOL.

Add some extra sanity checking to ensure that interface attributes
aren't ambiguous.

Use CFARG_DEVHANDLE in MI FDT, OFW, and ACPI code, and macppc and shark
ports to associate those device handles with device_t instance. This
will trickle trough to more places over time (need back-end for pre-OFW
Sun OBP; any others?).

branches: 1.3.96;
Make struct pcib_softc explicit in our softc.

branches: 1.2.4; 1.2.6; 1.2.8; 1.2.10;
Split device_t/softc for amdpcib and the hpet attachment, plus other
related cosmetic changes.

branches: 1.1.2; 1.1.4; 1.1.8; 1.1.10; 1.1.12; 1.1.26;
Share pcib(4) and amdpcib(4) between i386 and amd64; one copy is enough.

#include <sys/bus.h> instead of <machine/bus.h>.

Modularize hpet(4). Works nicely with the multiple bus locations.

Use defined constants.

Add detach function for hpet(4) at amdpcib(4).

branches: 1.4.18; 1.4.36;
Split device_t/softc for ichlpcib(4) and all hpet consumers, plus
other related cosmetic changes.

Split device_t/softc for amdpcib and the hpet attachment, plus other
related cosmetic changes.

branches: 1.2.6;
x86 always has timecounter support.

branches: 1.1.2; 1.1.4; 1.1.6; 1.1.8; 1.1.10; 1.1.12; 1.1.18;
Share pcib(4) and amdpcib(4) between i386 and amd64; one copy is enough.

amdsmn(4): Add support AMD family F1Ah model 0xh "Turin".

branches: 1.17.6;
Add Zen4 Phoenix support.

amdsmn(4),amdzentemp(4): Add Zen3+ Rembrandt(19h/4xh) & Zen4 Genoa(19h/1xh).

Add amdsmn(4) and amdccp(4) power management stubs.

branches: 1.14.4;
amdsmn(4),amdzentemp(4): Add support for 17h/6xh and 19h/6xh.

Rename for AMD F15/6X device. No functional change.

Merge thorpej-cfargs2.

branches: 1.11.8;
Merge thorpej-cfargs branch:

Simplify and make extensible the config_search() / config_found() /
config_attach() interfaces: rather than having different variants for
which arguments you want pass along, just have a single call that
takes a variadic list of tag-value arguments.

Adjust all call sites:
- Simplify wherever possible; don't pass along arguments that aren't
actually needed.
- Don't be explicit about what interface attribute is attaching if
the device only has one. (More simplification.)
- Add a config_probe() function to be used in indirect configuiration
situations, making is visibly easier to see when indirect config is
in play, and allowing for future change in semantics. (As of now,
this is just a wrapper around config_match(), but that is an
implementation detail.)

Remove unnecessary or redundant interface attributes where they're not
needed.

There are currently 5 "cfargs" defined:
- CFARG_SUBMATCH (submatch function for direct config)
- CFARG_SEARCH (search function for indirect config)
- CFARG_IATTR (interface attribte)
- CFARG_LOCATORS (locators array)
- CFARG_DEVHANDLE (devhandle_t - wraps OFW, ACPI, etc. handles)

...and a sentinel value CFARG_EOL.

Add some extra sanity checking to ensure that interface attributes
aren't ambiguous.

Use CFARG_DEVHANDLE in MI FDT, OFW, and ACPI code, and macppc and shark
ports to associate those device handles with device_t instance. This
will trickle trough to more places over time (need back-end for pre-OFW
Sun OBP; any others?).

branches: 1.10.4;
Merge the bouyer-xenpvh branch, bringing in Xen PV drivers support under HVM
guests in GENERIC.
Xen support can be disabled at runtime with
boot -c
disable hypervisor

Apply previous change ("Don't mix sign and unsigned operands. Just use
size_t for the loop.") to another loop variable.

Don't mix sign and unsigned operands. Just use size_t for the loop.

Update to support Family 15h Model 60 temperature sensors.

Changes based on FreeBSD amdtemp driver changes by Conrad Meyer.

XXX: Some code duplication between this driver and amdtemp as
parts of the 15h refresh code share more in common with
older CPUs while accessing the device more like 17h.

branches: 1.6.6;
Whitespace fix.

branches: 1.5.2;
Use unsigned to fix compile error on i386.

Add support for Ryzen 2xxx and 3xxx.

branches: 1.3.2; 1.3.6;
rescan amdsmnbus instead of amdsmn (fixes panic)

Modularize the amdsmn(4) driver, and update dependency for amdzentemp(4)

Add amdzentemp from FreeBSD via Ian Clark

branches: 1.1.2;
Add amdzentemp from FreeBSD via Ian Clark

Document bobcat/puma family nicknames.

Added support for AMD family 16h cpu sensors - (just like 10h-14h).
(Tested on netbsd-8.0 release.)

Improve a bit, no real functional change.

branches: 1.20.2; 1.20.8; 1.20.10;
remove checks for failure after memory allocation calls that cannot fail:

kmem_alloc() with KM_SLEEP
kmem_zalloc() with KM_SLEEP
percpu_alloc()
pserialize_create()
psref_class_create()

all of these paths include an assertion that the allocation has not failed,
so callers should not assert that again.

Update module dependencies for all the existing modules that depend on sysmon components.

branches: 1.18.6;
Modify some macros and add some new macros for CPU family and model
to reduce code duplication and to avoid bug.

CPUID_TO_STEPPING(cpuid) (not changed)

CPUID_TO_FAMILY(cpuid) (new)
CPUID_TO_MODEL(cpuid) (new)

Return the display family and the display model.
The macro names are the same as FreeBSD.

CPUID_TO_BASEFAMILY(cpuid) (The old name was CPUID2FAMILY)
CPUID_TO_BASEMODEL(cpuid) (The old name was CPUID2MODEL)

Only for the base field.

CPUID_TO_EXTFAMILY(cpuid) (The old name was CPUID2EXTFAMILY)
CPUID_TO_EXTMODEL(cpuid) (The old name was CPUID2EXTMODEL)

Only for the extended field.

See http://mail-index.netbsd.org/port-amd64/2013/11/12/msg001978.html

Calcurate the processor family correctly. The extended family bits
should be added only when the base family is 0xf.

branches: 1.16.2; 1.16.4;
Enable entropy gathering

Replace amdtempbus with amdnb_miscbus.
This allows us to have independent drivers on the same device (northbridge f3)
each coming with a certain functionality/feature.
This way we do not need to mess with amdtemp(4) to utilize other features.

- support AMD Family15h
- deregister pmf on detach

Added Family 12h support.

branches: 1.12.2; 1.12.6; 1.12.8;
add Family14h (AMD Fusion) support

Small cleanup; use KM_SLEEP, wrap long lines, etc. No functional change.

Modularize amdtemp(4).

branches: 1.9.10;
Family 10h Errata #319: Attach on Family10h cpu series which have it fixed.

- use <sys/bus.h> and <sys/cpu.h>
- add reference to family11h documentation
- add reference to AMD K8 Errata #141

- beautify dmesg
- print family id if not supported
spotted by jmcneill@

branches: 1.6.4;
Fix the fix: Only AMD K8 Rev-G on AM2 sockets are impacted.

On AMD K8 CPUs with Socket AM2, sensor normalization is off by 21C degree.
Adjust temperature calculation. This should fix strange temperatures on AMD K8
CPUs reported by many people.

branches: 1.4.2; 1.4.6; 1.4.8; 1.4.10;
correct comment copied from aiboost(4): envsys(4) wants uK

envsys(4) expects values in mK and not the top of the range of possible temperature values.
Needed some time to figure this out after I saw negative temperature values on Griffin.

branches: 1.2.2; 1.2.4;
Convert to new 2 clause license

branches: 1.1.2;
amdtemp(4): Driver for AMD CPU Temperature Sensors. Adopted from OpenBSD's kate(4).
Changes beyond OpenBSD's driver:
- Improved support for AMD K8
- Added support for AMD Barcelona, AMD Phenom and AMD Griffin
Tested on various single and multi-socket machines.
Review and OK xtreame

insert a space in attach message

amdzentemp(4): Add some CPU support.

- Zen4 "Siena" (family 1fh mode 0xa0...0xaf)
- Zen5 "Turin Classic" (family 1ah mode 0x00...0x0f)
- Zen5 "Turin Dense" (family 1ah mode 0x10...0x1f)
- Zen5 "Strix Point" (family 1ah mode 0x20...0x2f)

amdzentemp(4): Add support for CPU family 0x1a model 0x40...0x4f (Zen 5)

branches: 1.20.6;
Add Zen2 Mendocino APU support.

Add Zen4 Ryzen "Phoenix" support.

amdsmn(4),amdzentemp(4): Add Zen3+ Rembrandt(19h/4xh) & Zen4 Genoa(19h/1xh).

Reduce diff against DragonFly. No functional change.

branches: 1.16.2;
match zen3 "cezanne" (ryzen 5000-series APU.)

amdsmn(4),amdzentemp(4): Add support for 17h/6xh and 19h/6xh.

Fix build failure on i386.

amdzentemp(4): Add support for per CCD temperature sensor from FreeBSD.

amdzentemp(4): Add Zen 3 support.

branches: 1.11.6; 1.11.10;
Merge the bouyer-xenpvh branch, bringing in Xen PV drivers support under HVM
guests in GENERIC.
Xen support can be disabled at runtime with
boot -c
disable hypervisor

Update to support Family 15h Model 60 temperature sensors.

Changes based on FreeBSD amdtemp driver changes by Conrad Meyer.

XXX: Some code duplication between this driver and amdtemp as
parts of the 15h refresh code share more in common with
older CPUs while accessing the device more like 17h.

branches: 1.9.2; 1.9.8;
correct for known temperature bias values.

adjust for possible 49K offset

presence of this offset is indicated by a set 19th bit which is shifted away
this brings the temperature to "normal" levels on my ryzen 2700
(I assumed the same 49K offset as the k10temp project)

branches: 1.7.2; 1.7.4; 1.7.6;
sc->sc_sensor cannot be NULL since it was just allocated with KM_SLEEP
(which cannot fail). So remove the NULL-check. CID/1428644

Modularize the amdsmn(4) driver, and update dependency for amdzentemp(4)

Correct placement of __diagused attribute

Put back the variable declaration, too, and mark it __diagused

Otherwise a DIAGNOSTIC kernel will complain about the variable being
undeclared.

KNF: Put back the blank line following the empty variable declarations

Unused variable build fix. (now void *aux is unused)

Add amdzentemp from FreeBSD via Ian Clark

No longer need to include acpi_i2c.h here.

Do the ACPI-specific get-child-devices dance in iic_attach(). This
obviously isn't ideal, but it funnels the issue into a central location
and provides for easier improvement later.

Add missing include of "acpica.h", pointed out by Jared.

branches: 1.10.2;
Make dwiic_pci compile without ACPI option.

dwiic(4): Don't try to attach children if dwiic_attach failed.

PR kern/57063

Add more Jasper Lake and Elkhart Lake devices.

Add many Intel I2C devices.

branches: 1.6.2;
Merge thorpej-cfargs2.

branches: 1.5.4;
dwiic(4): Attribute output correctly and relegate to debug-level.

Tidy up a little while here.

branches: 1.4.2; 1.4.4;
Merge thorpej-cfargs branch:

Simplify and make extensible the config_search() / config_found() /
config_attach() interfaces: rather than having different variants for
which arguments you want pass along, just have a single call that
takes a variadic list of tag-value arguments.

Adjust all call sites:
- Simplify wherever possible; don't pass along arguments that aren't
actually needed.
- Don't be explicit about what interface attribute is attaching if
the device only has one. (More simplification.)
- Add a config_probe() function to be used in indirect configuiration
situations, making is visibly easier to see when indirect config is
in play, and allowing for future change in semantics. (As of now,
this is just a wrapper around config_match(), but that is an
implementation detail.)

Remove unnecessary or redundant interface attributes where they're not
needed.

There are currently 5 "cfargs" defined:
- CFARG_SUBMATCH (submatch function for direct config)
- CFARG_SEARCH (search function for indirect config)
- CFARG_IATTR (interface attribte)
- CFARG_LOCATORS (locators array)
- CFARG_DEVHANDLE (devhandle_t - wraps OFW, ACPI, etc. handles)

...and a sentinel value CFARG_EOL.

Add some extra sanity checking to ensure that interface attributes
aren't ambiguous.

Use CFARG_DEVHANDLE in MI FDT, OFW, and ACPI code, and macppc and shark
ports to associate those device handles with device_t instance. This
will trickle trough to more places over time (need back-end for pre-OFW
Sun OBP; any others?).

branches: 1.3.2;
Add a device_t parameter to acpi_enter_i2c_devs. If non-NULL, all child
acpi_devnodes will be claimed by that device so we don't later try to
attach a duplicate device to that node at acpinodebus.

branches: 1.2.4; 1.2.12;
Add dwiic_fdt attachment for "snps,designware-i2c".

branches: 1.1.2; 1.1.4;
Add support for I2C designware controllers (as found in Intel PCH devices),
with a pci front-end.
The pci front-end is tied to ACPI and Intel-specific, so it's in arch/x86/pci
and not dev/pci.
Core driver from OpenBSD, PCI front-end by me.

ichsmb(4), tco(4): Add support for TCO on newer Intel chipsets.

TCO (`Total Cost of Ownership', Intel's bizarre name for a watchdog
timer) used to hang off the Intel I/O platform controller hub's (ICH)
low-pin-count interface bridge (LPC IB), or ichlpcib(4). On newer
devices, it hangs off the ICH SMBus instead.

Tested on INTEL 100SERIES_SMB (works) and INTEL 100SERIES_LP_SMB
(doesn't work, still not sure why).

XXX kernel revbump: This breaks the module ABI -- tco(4) modules
older than the change to make ta_has_rcba into ta_version will
incorrectly attach at buses they do not understand. (However, the
tco(4) driver is statically built into GENERIC, so maybe it's safe
for pullup since the module wouldn't have worked anyway.)

branches: 1.26.16;
Merge thorpej-cfargs branch:

Simplify and make extensible the config_search() / config_found() /
config_attach() interfaces: rather than having different variants for
which arguments you want pass along, just have a single call that
takes a variadic list of tag-value arguments.

Adjust all call sites:
- Simplify wherever possible; don't pass along arguments that aren't
actually needed.
- Don't be explicit about what interface attribute is attaching if
the device only has one. (More simplification.)
- Add a config_probe() function to be used in indirect configuiration
situations, making is visibly easier to see when indirect config is
in play, and allowing for future change in semantics. (As of now,
this is just a wrapper around config_match(), but that is an
implementation detail.)

Remove unnecessary or redundant interface attributes where they're not
needed.

There are currently 5 "cfargs" defined:
- CFARG_SUBMATCH (submatch function for direct config)
- CFARG_SEARCH (search function for indirect config)
- CFARG_IATTR (interface attribte)
- CFARG_LOCATORS (locators array)
- CFARG_DEVHANDLE (devhandle_t - wraps OFW, ACPI, etc. handles)

...and a sentinel value CFARG_EOL.

Add some extra sanity checking to ensure that interface attributes
aren't ambiguous.

Use CFARG_DEVHANDLE in MI FDT, OFW, and ACPI code, and macppc and shark
ports to associate those device handles with device_t instance. This
will trickle trough to more places over time (need back-end for pre-OFW
Sun OBP; any others?).

branches: 1.25.4;
vmx(4) should be MI. moved to sys/dev/pci from sys/arch/x86/pci

move the imc code into x86/pci/files.pci so that pci is defined in time.

provide an intermediate "bus" for the module and to be the same structure
like amdtemp

Add amdzentemp from FreeBSD via Ian Clark

Add support for I2C designware controllers (as found in Intel PCH devices),
with a pci front-end.
The pci front-end is tied to ACPI and Intel-specific, so it's in arch/x86/pci
and not dev/pci.
Core driver from OpenBSD, PCI front-end by me.

branches: 1.20.10;
Separate the watchdog code from the pcib code, and make the watchdog
a loadable module.

branches: 1.19.2;
add an agp dependency so that the agp drivers get loaded.

Install agp_* drivers where pchb(4) is installed except INSTALL_FLOPPY.

XXX
Config around agp(4) is done in quite wrong direction.
"pchb <- (agpbus) <- agp <- agp_*"
should be:
"pchb <- (pcibus) <- agp_* <- (agpbus) <- agp"

Fix another indirect circular dependency (agp_* -> (agpbus) -> pchb -> abp_*).
Fixes "no agp*" build. Reported & build-tested by Kurt Schreiner.

Add VMware VMXNET3 ethernet driver from OpenBSD, vmx(4).

branches: 1.15.10;
Intel Atom E600 PCI-LPC bridge, adds a watchdog + HPET support. Tested
on a Soekris net6501. (jmcneill)

branches: 1.14.2;
Replace amdtempbus with amdnb_miscbus.
This allows us to have independent drivers on the same device (northbridge f3)
each coming with a certain functionality/feature.
This way we do not need to mess with amdtemp(4) to utilize other features.

branches: 1.13.2; 1.13.6;
Attach amdtemp(4) at pchb(4) instead of in place of pchb(4).

Should fix PR#45268.

Factor out hpet(4) from ichlpcib(4).

branches: 1.11.2;
Add a driver for RDC's vortex86/PMX-1000 SoC PCI/ISA bridge, with support
for the integrated watchdog timer.

branches: 1.10.2;
Almost entirely rework Intel Firmware Hub random number generator support.

This introduces fwhrng(4) which attaches via ichlpcib(4), replacing
the rnd(4) support in pchb(4).

gcscpcib depends on functions from x86/pci/pcib.c

branches: 1.8.2; 1.8.4;
gpio(4) support for Intel ICH southbridges.

Tested on Intel SS4200-E (ICH7), and Acorp 6A815EPD (ICH2) motherboards,
on amd64 and i386 ports respectively.

It should be noted that the majority of boards with ICH chips do not
expose the GPIO pins for off-board use. For instance, aside from the
three exposed-on-a-header pins on the 6A815EPD, another pin is also
used to control write protect on the FWH. The SS4200 exposes the GPIO
on a header that connects to the 10 LEDs on the front panel, as well
as a tact switch on the back panel.

branches: 1.7.8;
Move some MD declarations from x86/pci/files.pci to x86/conf/files.x86,
so that Xen can use the former.

Drop Xen's pcib.c in favor of the x86 code and thereby unbreak ichlpcib.

branches: 1.6.4;
Add support for PCI_BUS_FIXUP and PCI_ADDR_FIXUP on amd64.

branches: 1.5.2; 1.5.4;
amdtemp(4): Driver for AMD CPU Temperature Sensors. Adopted from OpenBSD's kate(4).
Changes beyond OpenBSD's driver:
- Improved support for AMD K8
- Added support for AMD Barcelona, AMD Phenom and AMD Griffin
Tested on various single and multi-socket machines.
Review and OK xtreame

branches: 1.4.10; 1.4.12;
Merge jmcneill-pm branch.

branches: 1.3.2; 1.3.6; 1.3.8; 1.3.10; 1.3.12;
Share pcib(4) and amdpcib(4) between i386 and amd64; one copy is enough.

- Share pchb(4) between i386 and amd64; one copy is enough for both.
- Move some of the x86 PCI devices into x86/pci/files.pci.
- Add more x86 stuff into x86/conf/files.x86.

ok joerg.

branches: 1.1.2; 1.1.6;
file files.pci was initially added on branch jmcneill-pm.

Convert arch/x86 to use <sys/rnd*.h>. Omit needless includes.

branches: 1.8.2;
Replace callout_stop with callout_halt

In order to call callout_destroy for a callout safely, we have to ensure
the function of the callout is not running and pending. To do so, we should
use callout_halt, not callout_stop.

Discussed with martin@ and riastradh@.

branches: 1.7.2;
Merge tls-earlyentropy branch into HEAD.

branches: 1.6.2;
remove set but unused variables

branches: 1.5.2; 1.5.6; 1.5.10;
Entropy-pool implementation move and cleanup.

1) Move core entropy-pool code and source/sink/sample management code
to sys/kern from sys/dev.

2) Remove use of NRND as test for presence of entropy-pool code throughout
source tree.

3) Remove use of RND_ENABLED in device drivers as microoptimization to
avoid expensive operations on disabled entropy sources; make the
rnd_add calls do this directly so all callers benefit.

4) Fix bug in recent rnd_add_data()/rnd_add_uint32() changes that might
have lead to slight entropy overestimation for some sources.

5) Add new source types for environmental sensors, power sensors, VM
system events, and skew between clocks, with a sample implementation
for each.

ok releng to go in before the branch due to the difficulty of later
pullup (widespread #ifdef removal and moved files). Tested with release
builds on amd64 and evbarm and live testing on amd64.

branches: 1.4.2;
First step of random number subsystem rework described in
<20111022023242.BA26F14A158@mail.netbsd.org>. This change includes
the following:

An initial cleanup and minor reorganization of the entropy pool
code in sys/dev/rnd.c and sys/dev/rndpool.c. Several bugs are
fixed. Some effort is made to accumulate entropy more quickly at
boot time.

A generic interface, "rndsink", is added, for stream generators to
request that they be re-keyed with good quality entropy from the pool
as soon as it is available.

The arc4random()/arc4randbytes() implementation in libkern is
adjusted to use the rndsink interface for rekeying, which helps
address the problem of low-quality keys at boot time.

An implementation of the FIPS 140-2 statistical tests for random
number generator quality is provided (libkern/rngtest.c). This
is based on Greg Rose's implementation from Qualcomm.

A new random stream generator, nist_ctr_drbg, is provided. It is
based on an implementation of the NIST SP800-90 CTR_DRBG by
Henric Jungheim. This generator users AES in a modified counter
mode to generate a backtracking-resistant random stream.

An abstraction layer, "cprng", is provided for in-kernel consumers
of randomness. The arc4random/arc4randbytes API is deprecated for
in-kernel use. It is replaced by "cprng_strong". The current
cprng_fast implementation wraps the existing arc4random
implementation. The current cprng_strong implementation wraps the
new CTR_DRBG implementation. Both interfaces are rekeyed from
the entropy pool automatically at intervals justifiable from best
current cryptographic practice.

In some quick tests, cprng_fast() is about the same speed as
the old arc4randbytes(), and cprng_strong() is about 20% faster
than rnd_extract_data(). Performance is expected to improve.

The AES code in src/crypto/rijndael is no longer an optional
kernel component, as it is required by cprng_strong, which is
not an optional kernel component.

The entropy pool output is subjected to the rngtest tests at
startup time; if it fails, the system will reboot. There is
approximately a 3/10000 chance of a false positive from these
tests. Entropy pool _input_ from hardware random numbers is
subjected to the rngtest tests at attach time, as well as the
FIPS continuous-output test, to detect bad or stuck hardware
RNGs; if any are detected, they are detached, but the system
continues to run.

A problem with rndctl(8) is fixed -- datastructures with
pointers in arrays are no longer passed to userspace (this
was not a security problem, but rather a major issue for
compat32). A new kernel will require a new rndctl.

The sysctl kern.arandom() and kern.urandom() nodes are hooked
up to the new generators, but the /dev/*random pseudodevices
are not, yet.

Manual pages for the new kernel interfaces are forthcoming.

branches: 1.3.2;
#include <sys/bus.h> instead of <machine/bus.h>.

branches: 1.2.2; 1.2.8;
Move FWH chip detection area entirely within the mapping for
the smaller i82802AB. This is needed as not all BIOSes set a
larger-than-necessary decode range.

branches: 1.1.2; 1.1.4;
Almost entirely rework Intel Firmware Hub random number generator support.

This introduces fwhrng(4) which attaches via ichlpcib(4), replacing
the rnd(4) support in pchb(4).

Move FWH chip detection area entirely within the mapping for
the smaller i82802AB. This is needed as not all BIOSes set a
larger-than-necessary decode range.

Almost entirely rework Intel Firmware Hub random number generator support.

This introduces fwhrng(4) which attaches via ichlpcib(4), replacing
the rnd(4) support in pchb(4).

branches: 1.2.2; 1.2.4;
Drop 3rd and 4th clauses, as the copyright holder (Michael Shalayeff) did
in OpenBSD revision 1.2.

branches: 1.1.2; 1.1.10; 1.1.16; 1.1.22; 1.1.80; 1.1.94;
Share Intel hardware random number generator support between amd64 and
i386 port. This will benefit EM64T systems using Intel i9xx chipsets.

Add support for the Braswell PCU LPC to ichlpcib.

branches: 1.61.6;
ichlpcib(4): Use config_detach_children.

Delete a lot of unnecessary code with broken error branches involving
config_detach which have probably seldom if ever been exercised.

No substantive functional change intended. Low risk because
ichlpcib(4) is not a removable device, so you have to go out of your
way to exercise detach.

ichlpcib(4): KNF. No functional change intended.

ichsmb(4), tco(4): Add support for TCO on newer Intel chipsets.

TCO (`Total Cost of Ownership', Intel's bizarre name for a watchdog
timer) used to hang off the Intel I/O platform controller hub's (ICH)
low-pin-count interface bridge (LPC IB), or ichlpcib(4). On newer
devices, it hangs off the ICH SMBus instead.

Tested on INTEL 100SERIES_SMB (works) and INTEL 100SERIES_LP_SMB
(doesn't work, still not sure why).

XXX kernel revbump: This breaks the module ABI -- tco(4) modules
older than the change to make ta_has_rcba into ta_version will
incorrectly attach at buses they do not understand. (However, the
tco(4) driver is statically built into GENERIC, so maybe it's safe
for pullup since the module wouldn't have worked anyway.)

branches: 1.58.4;
ichlpcib(4), tco(4): Rename iot -> pmt, ioh -> pmh.

Makes it clearer that this is specifically about the power management
controller (PMC) registers relative to PMBASE.

ichlpcib(4), tco(4): Take `lpcib_' off various names.

For PMC-specific ones, change `lpcib_' to `pmc_'. These are in a
separate PCI device in newer chipsets.

For TCO-specific ones, which may live in different places, whether at
their own base address or as an offset from PMBASE, just leave it as
`tco_' or `tcotimer'.

No functional change intended.

tco(4): Rename lpcib_tco_attach_args -> tco_attach_args.

No longer hangs off LPC bus, newer devices hang it off SMBus.

tco(4): Change has_rcba bit into version number.

Will be useful for newer Intel platform controller hubs.

No functional change intended. Module ABI is unchanged, although older
modules will do something nonseneical when confronted with versions
above 1 -- that will require a revbump (but with any luck, it will make
life easier for versions above 2 easier once we do that).

Merge thorpej-cfargs2.

branches: 1.53.8;
Merge thorpej-cfargs branch:

Simplify and make extensible the config_search() / config_found() /
config_attach() interfaces: rather than having different variants for
which arguments you want pass along, just have a single call that
takes a variadic list of tag-value arguments.

Adjust all call sites:
- Simplify wherever possible; don't pass along arguments that aren't
actually needed.
- Don't be explicit about what interface attribute is attaching if
the device only has one. (More simplification.)
- Add a config_probe() function to be used in indirect configuiration
situations, making is visibly easier to see when indirect config is
in play, and allowing for future change in semantics. (As of now,
this is just a wrapper around config_match(), but that is an
implementation detail.)

Remove unnecessary or redundant interface attributes where they're not
needed.

There are currently 5 "cfargs" defined:
- CFARG_SUBMATCH (submatch function for direct config)
- CFARG_SEARCH (search function for indirect config)
- CFARG_IATTR (interface attribte)
- CFARG_LOCATORS (locators array)
- CFARG_DEVHANDLE (devhandle_t - wraps OFW, ACPI, etc. handles)

...and a sentinel value CFARG_EOL.

Add some extra sanity checking to ensure that interface attributes
aren't ambiguous.

Use CFARG_DEVHANDLE in MI FDT, OFW, and ACPI code, and macppc and shark
ports to associate those device handles with device_t instance. This
will trickle trough to more places over time (need back-end for pre-OFW
Sun OBP; any others?).

branches: 1.52.16;
Constify lpcib_devices[] so that it lands in .rodata (1584 bytes).

branches: 1.51.14;
Disable gpio(4) attachment to ichlpcib(4) by default.

The GPIO lines on an ICH are usually connected to opaque platform-
defined functionality, and may be manipulated by the ACPI DSDT or other
mechanisms behind our backs. In one instance, it was found this
in combiation with gpio_resume() sabotaged repeated suspend/resume cycles.

GPIO functionality can be enabled by setting ichlpcib_gpio_disable to 0,
for instance with `gdb -write`.

Add Core 5G (mobile) LPC support.

Separate the watchdog code from the pcib code, and make the watchdog
a loadable module.

Add Intel C61x and X99 devices.

Add 9 Series support.

As I wrote in the last commit, The PMBASE and GPIOBASE registers are not
compltible with the PCI spec and the map sizes are fixed to 128bytes. The
pci_mapreg_submap() function has a code to check the range of the BAR. The
PCI_MAPREG_IO_SIZE() macro returns lower than 128bytes on some machines.
It makes impossible to use pci_mapreg_submap(). Use pci_conf_read() and
bus_space_map() directly. Observed and tested with my Thinkpad X61.

Fix a bug that ichlpcib(4) maps I/O area incorrectly and then fails to attach
gpio. It might also fix ACPI related problem described in PR#48960:
- The LPCIB_PCI_PMBASE and LPCIB_PCI_GPIO register are alike PCI BAR but not
completely compatible with it. It's ok because the registers' addresses are
out of BAR0-BAR5(0x10-0x24) and are located in the device-dependent header.
The PMBASE and GPIO registers define the base address and the type but not
describe the size. The size is fixed to 128bytes. So use
pci_mapreg_submap().
- Make pci_mapreg_submap() extern again.
- Fix the calculation of the map size in pci_mapreg_submap().

Add DH89xxC[CL] LPC devices.

branches: 1.43.4; 1.43.6;
Add Z68 LPC.

Temporary disable C2000 PCU because the behavior of the wdog is little strange.

Add C2000 Platform Controller Unit(PCU).

Use '\n' at the end of all aprint_error_dev() format strings.

branches: 1.39.2;
Add Intel 8 Series / C220 Series LPC devices.

Match the C600's ichlpcib.

Add Intel 7 series' LPC devices.

Add support 3400 series, 5 series, C216, 82801GH, 82801E and 6300ESB.

No functional change:
- Remove trailing white space.
- Sort entries.
- Remove duplicated entries.

branches: 1.34.6; 1.34.10;
Also match ICH8, ICH9 and ICH10 devices. Tested on ICH10.

branches: 1.33.2;
Add some LPC entries for Intel 6 series and C20x.

#include <sys/bus.h> instead of <machine/bus.h>.

Factor out hpet(4) from ichlpcib(4).

Rename to use PCI_PRODUCT_INTEL_82801DBM_LPC

branches: 1.29.2;
Neither pci_dma64_available(), pci_probe_device(), pci_mapreg_map(9),
pci_find_rom(), pci_intr_map(9), pci_enumerate_bus(), nor the match
predicate passed to pciide_compat_intr_establish() should ever modify
their pci_attach_args argument, so make their pci_attach_args arguments
const and deal with the fallout throughout the kernel.

For the most part, these changes add a 'const' where there was no
'const' before, however, some drivers and MD code used to modify
pci_attach_args. Now those drivers either copy their pci_attach_args
and modify the copy, or refrain from modifying pci_attach_args:

Xen: according to Manuel Bouyer, writing to pci_attach_args in
pci_intr_map() was a leftover from Xen 2. Probably a bug. I
stopped writing it. I have not tested this change.

siside(4): sis_hostbr_match() needlessly wrote to pci_attach_args.
Probably a bug. I use a temporary variable. I have not tested this
change.

slide(4): sl82c105_chip_map() overwrote the caller's pci_attach_args.
Probably a bug. Use a local pci_attach_args. I have not tested
this change.

viaide(4): via_sata_chip_map() and via_sata_chip_map_new() overwrote the
caller's pci_attach_args. Probably a bug. Make a local copy of the
caller's pci_attach_args and modify the copy. I have not tested
this change.

While I'm here, make pci_mapreg_submap() static.

With these changes in place, I have tested the compilation of these
kernels:

alpha GENERIC
amd64 GENERIC XEN3_DOM0
arc GENERIC
atari HADES MILAN-PCIIDE
bebox GENERIC
cats GENERIC
cobalt GENERIC
evbarm-eb NSLU2
evbarm-el ADI_BRH ARMADILLO9 CP3100 GEMINI GEMINI_MASTER GEMINI_SLAVE GUMSTIX
HDL_G IMX31LITE INTEGRATOR IQ31244 IQ80310 IQ80321 IXDP425 IXM1200
KUROBOX_PRO LUBBOCK MARVELL_NAS NAPPI SHEEVAPLUG SMDK2800 TEAMASA_NPWR
TEAMASA_NPWR_FC TS7200 TWINTAIL ZAO425
evbmips-el AP30 DBAU1500 DBAU1550 MALTA MERAKI MTX-1 OMSAL400 RB153 WGT624V3
evbmips64-el XLSATX
evbppc EV64260 MPC8536DS MPC8548CDS OPENBLOCKS200 OPENBLOCKS266
OPENBLOCKS266_OPT P2020RDB PMPPC RB800 WALNUT
hp700 GENERIC
i386 ALL XEN3_DOM0 XEN3_DOMU
ibmnws GENERIC
macppc GENERIC
mvmeppc GENERIC
netwinder GENERIC
ofppc GENERIC
prep GENERIC
sandpoint GENERIC
sgimips GENERIC32_IP2x
sparc GENERIC_SUN4U KRUPS
sparc64 GENERIC

As of Sun Apr 3 15:26:26 CDT 2011, I could not compile these kernels
with or without my patches in place:

### evbmips-el GDIUM

nbmake: nbmake: don't know how to make /home/dyoung/pristine-nbsd/src/sys/arch/mips/mips/softintr.c. Stop

### evbarm-el MPCSA_GENERIC
src/sys/arch/evbarm/conf/MPCSA_GENERIC:318: ds1672rtc*: unknown device `ds1672rtc'

### ia64 GENERIC

/tmp/genassym.28085/assym.c: In function 'f111':
/tmp/genassym.28085/assym.c:67: error: invalid application of 'sizeof' to incomplete type 'struct pcb'
/tmp/genassym.28085/assym.c:76: error: dereferencing pointer to incomplete type

### sgimips GENERIC32_IP3x

crmfb.o: In function `crmfb_attach':
crmfb.c:(.text+0x2304): undefined reference to `ddc_read_edid'
crmfb.c:(.text+0x2304): relocation truncated to fit: R_MIPS_26 against `ddc_read_edid'
crmfb.c:(.text+0x234c): undefined reference to `edid_parse'
crmfb.c:(.text+0x234c): relocation truncated to fit: R_MIPS_26 against `edid_parse'
crmfb.c:(.text+0x2354): undefined reference to `edid_print'
crmfb.c:(.text+0x2354): relocation truncated to fit: R_MIPS_26 against `edid_print'

branches: 1.28.2;
make it compile.

Match ichlpcib(4) on ICH0 (82801AB_LPC).

Finish cleaning up pchb from recent change.
Use fewer magic numbers in ichlpcib.
Slightly improve style conformance.
Update paths in cpp re-inclusion guards.

Almost entirely rework Intel Firmware Hub random number generator support.

This introduces fwhrng(4) which attaches via ichlpcib(4), replacing
the rnd(4) support in pchb(4).

branches: 1.24.2;
A pointer typedef entails trading too much flexibility to declare const
and non-const types, and the kernel uses both const and non-const
PMF qualifiers and device suspensors, so change the pmf_qual_t and
device_suspensor_t typedefs from "pointers to const" to non-pointer,
non-const types.

branches: 1.23.2;
Expand PMF_FN_* macros.

Move all copies of ifattr_match() to sys/kern/subr_autoconf.c.

Make this build without gpio(4).

gpio(4) support for Intel ICH southbridges.

Tested on Intel SS4200-E (ICH7), and Acorp 6A815EPD (ICH2) motherboards,
on amd64 and i386 ports respectively.

It should be noted that the majority of boards with ICH chips do not
expose the GPIO pins for off-board use. For instance, aside from the
three exposed-on-a-header pins on the 6A815EPD, another pin is also
used to control write protect on the FWH. The SS4200 exposes the GPIO
on a header that connects to the 10 LEDs on the front panel, as well
as a tact switch on the back panel.

Let us detach ichlpcib(4) and its children.

XXX More testing is needed. I've tested this on a Dell Dimension 3000,
XXX but that system does not attach every possible device that I try to
XXX detach with this code:

ichlpcib0 at pci0 dev 31 function 0
ichlpcib0: vendor 0x8086 product 0x24d0 (rev. 0x02)
timecounter: Timecounter "ichlpcib0" frequency 3579545 Hz quality 1000
ichlpcib0: 24-bit timer
ichlpcib0: TCO (watchdog) timer configured.
isa0 at ichlpcib0

Fix watchdog code:
- the timer bound constants are in tick, so convert period to tick before
checking it against the bounds
- for ICH5 or older, fix code that would have always written a 0 period
to the register.

Attach 82801IEM LPC Interface Bridge too.

Restore SpeedStep settings on shutdown. Some BIOSes don't like it, if
SpeedStep is enabled and powerdown fails otherwise. Fixes PR kern/40487.

don't enable speedstep on systems with intel 82855GM host bridges.

branches: 1.14.2; 1.14.4; 1.14.8;
Intel Tempest can use ichlpcib as well.

revert some parts of the following commit.
(given that it reverted other developers' changes saying
"misc/cosmetic changes", i assume that it was unintentional.)
this makes a watchdog on my box (8086:24d0) work again.
----------------------------
revision 1.1
date: 2007/08/26 16:49:47; author: xtraeme; state: Exp;
branches: 1.1.2;
Some changes for the ichlpcib driver:

- Moved to x86/pci, so that EM64T systems running NetBSD/amd64 can use it.
- Added support for the TCO on ICH6 or newer chipsets, adapted from
FreeBSD.
- Added timecounter support for the power management timer, adapted from
OpenBSD.
- Plus some misc/cosmetic changes.

Thanks to yukonbob on irc@freenode for testing the TCO part on ICH4-M.
Tested by me with ICH7 too.

Make struct pcib_softc explicit in our softc.

branches: 1.11.2; 1.11.4; 1.11.6;
Remove clause 3 and 4 from TNF licenses

branches: 1.10.2; 1.10.4;
- use aprint_*_dev and device_xname
- use POSIX integer types

Split device_t/softc for ichlpcib(4) and all hpet consumers, plus
other related cosmetic changes.

Use PMF_FN_ARGS, PMF_FN_PROTO.

branches: 1.7.2; 1.7.6;
fix some unaligned PCI config space accesses in suspend/resume functions

branches: 1.6.2;
Merge jmcneill-pm branch.

branches: 1.5.2; 1.5.4;
tcotimer_setmode: convert seconds to ticks after the value has been
checked with the limits. We can use now the max timeout value on ICH6
or newer (i.e 613 seconds and not the half of it as previously).

branches: 1.4.2; 1.4.4; 1.4.6; 1.4.10; 1.4.14;
Improve some comments.

Attach to ICH8M LPC.
Tested watchdog and it works.
ok xtraeme@

Attach to the ICH9 LPC Interface Bridges. The datasheet doesn't mention
any difference in the TCO part (compared to ICH[678]).

branches: 1.1.2;
Some changes for the ichlpcib driver:

- Moved to x86/pci, so that EM64T systems running NetBSD/amd64 can use it.
- Added support for the TCO on ICH6 or newer chipsets, adapted from
FreeBSD.
- Added timecounter support for the power management timer, adapted from
OpenBSD.
- Plus some misc/cosmetic changes.

Thanks to yukonbob on irc@freenode for testing the TCO part on ICH4-M.
Tested by me with ICH7 too.

branches: 1.3.2;
#include <sys/bus.h> instead of <machine/bus.h>.

branches: 1.2.2;
Modularize hpet(4). Works nicely with the multiple bus locations.

Factor out hpet(4) from ichlpcib(4).

vmx(4) should be MI. moved to sys/dev/pci from sys/arch/x86/pci

Fix the wrong logic about making the number of vmx(4) TX/RX queue
be power of two

reviewed by nonaka@n.o.

fix vmx(4) cannot link up at boot time. reviewed by msaitoh@n.o, thanks.

vmx(4) could call if_link_state_change(ifp, LINK_STATE_UP) from vmxnet3_init()
before ifp->if_link_cansched was set, because dp->dom_if_up() (in6_if_up() for
INET6) could call ifp->if_init(). And then, workqueue_enqueue() was not called
at that time.
As the result, the last LQ_ITEM was stuck LINK_STATE_UP, so
if_link_state_change_work_schedule() was never called until
if_link_state_change(ifp, LINK_STATE_DOWN) was called.

To fix this issue, vmx(4) avoid calling if_link_state_change() before
ifp->if_link_cansched is set.

Define and implement a locking protocol for the ifmedia / mii layers:
- MP-safe drivers provide a mutex to ifmedia that is used to serialize
access to media-related structures / hardware regsiters. Converted
drivers use the new ifmedia_init_with_lock() function for this. The
new name is provided to ease the transition.
- Un-converted drivers continue to call ifmedia_init(), which will supply
a compatibility lock to be used instead. Several media-related entry
points must be aware of this compatibility lock, and are able to acquire
it recursively a limited number of times, if needed. This is a SPIN
mutex with priority IPL_NET.
- This same lock is used to serialize access to PHY registers and other
MII-related data structures.

The PHY drivers are modified to acquire and release the lock, as needed,
and assert the lock is held as a diagnostic aid.

The "usbnet" framework has had an overhaul of its internal locking
protocols to fit in with the media / mii changes, and the drivers adapted.

USB wifi drivers have been changed to provide their own adaptive mutex
to the ifmedia later via a new ieee80211_media_init_with_lock() function.
This is required because the USB drivers need an adaptive mutex.

Besised "usbnet", a few other drivers are converted: vmx, wm, ixgbe / ixv.

mcx also now calls ifmedia_init_with_lock() because it needs to also use
an adaptive mutex. The mcx driver still needs to be fully converted to
NET_MPSAFE.

- Adopt <net/if_stats.h>.
- Use ifmedia_fini().

Fix missing callout_destroy(). Pointed out by yamaguchi@n.o.

Fix typo in evcnt description. Pointed out by yamaguchi@n.o.

branches: 1.54.2;
Protect ec_multicnt.

Fix missing splnet() for ether_ioctl() caused by if_vmx.c:r1.32.

pointed out by nonaka@n.o, thanks.

localify

Fix kassert failure in vmxnet3_transmit(). Pointed out by ryo@n.o, thanks.

Fix typo in vmxnet3_legacy_intr().

That causes sysctl hw.vmx*.{rx,tx} effect inversely when vmx(4) uses
INTx or MSI.

vmxnet3_softc.vmx_stats should not count globally. pointed out by hikaru@n.o

divide vmxnet3_softc.vmx_stats to each vmxnet3_txqueue and vmxnet3_rxqueue,
furthermore make them evcnt.

add vmx(4) basic statistics counters.

Sorry, I have forgotten this TODO in r1.40 commit message.

fix panic when vmx(4) is detached.

vmx(4) uses interrupt distribution for each queue like ixg(4).

branches: 1.45.2;
vmx(4) can select workqueue for packet processing like ixg(4).

make vmx(4)'s *_process_limit tunable.

vmx(4) uses deferred interrupt handlering like ixg(4).

Fix missing NULL check after softint_establish().

Join Tx interrupt handler and Rx interrupt handler of vmx(4).

That can reduce interrupt resources.

vmx(4) support if_transmit and Tx multiqueue (2/2).

Fix Tx interrupt handler. I tested on ESXi 5.5.

TODO: add statistics counters

refactor: unify vmxnet3_start_locked and vmxnet_transmit_locked

vmx(4) support if_transmit and Tx multiqueue (1/2)

Implemented Tx processing only. Fix Tx interrupt handler later.

vmx(4) can be detached now.

remove unnecessary NULL check after kmem_zalloc(KM_SLEEP)

vmx(4) can be set IFEF_MPSAFE now.

I tested bidirectional forwarding with some ioctls.

Store IFF_ALLMULTI in ec->ec_flags instead of ifp->if_flags.

See such as if_wm.c:1.636.

vmx(4) enable jumbo frame.

I tested 1600 mtu to/from Linux vmxnet3.

Fix vmx(4) MTU setting.

Advised by hikaru@n.o and msaitoh@n.o, thanks.

Eliminate IFF_RUNNING checking code from vmxnet3_init_locked().

Advised by hikaru@n.o, thanks.

Don't automatically set ec_capenable's ETHERCAP_VLAN_HWTAGGING bit in
vlan_config() to make it user-controllable. Instead, set the bit in
xxx_attach().

Even if we don't use MII(4), use the common path of SIOC[GS]IFMEDIA in
sys/net/if_ethersubr.c if we can.
- Add ec_ifmedia into struct ethercom.
- ec_mii in struct ethercom is kept and used as it is. It might be used in
future. Note that some Ethernet drivers which _DOESN'T_ use mii(4) use
ec_mii for keeping the if_media. Those should be changed in future.

-No functional change:
- KNF
- u_int*_t -> uint*_t.

PR/54058: vmx(4): Fix device enable command failure when the number of vCPUs
is not a power of two.

Make the size of the vmx(4) TX/RX queue a power of two not exceeding
the number of vCPUs.

branches: 1.26.2;
Implement the BPF direction filter (BIOC[GS]DIRECTION). It provides backward
compatibility with BIOC[GS]SEESENT ioctl. The userland interface is the same
as FreeBSD.

This change also fixes a bug that the direction is misunderstand on some
environment by passing the direction to bpf_mtap*() instead of checking
m->m_pkthdr.rcvif.

Rename

M_CSUM_DATA_IPv6_HL -> M_CSUM_DATA_IPv6_IPHL
M_CSUM_DATA_IPv6_HL_SET -> M_CSUM_DATA_IPv6_SET

Reduces the diff against IPv4. Also, clarify the definitions.

vmx(4): compute if_ibytes using rxq->vxrxq_stats.vmrxs_ibytes.

vmx(4): handled SIOCZIFDATA.

vmx(4): Fix calculation of interface statistics counter.

branches: 1.21.2;
m_free -> m_freem, otherwise leak

VLAN ID uses pkthdr instead of mtag now. Contributed by s-yamaguchi@IIJ.

I just commit by proxy. Reviewed by joerg@n.o and christos@n.o, thanks.
See http://mail-index.netbsd.org/tech-net/2017/09/26/msg006459.html

XXX need pullup to -8 branch

branches: 1.19.6;
Apply deferred if_start to vmx(4).

branches: 1.18.2;
we cannot guarantee that m_pulldown doesn't fail, as it may fail even
if temporarily out of memory, and it will free the mbuf in this scenario.

test for failure and return error if it happens.

CID 1396651

ok riastradh

on error, free the mbuf in vmxnet3_txq_offload_ctx, not in callers.

ok riastradh

GC unused macros.

Even if they were used (and actually asserted), asserting on !mutex_owned
is generally a bad idea, as it may be true in unexpected contexts.

suggested by riastradh, thanks.

Protect ec_multi* with mutex

The data can be accessed from sysctl, ioctl, interface watchdog
(if_slowtimo) and interrupt handlers. We need to protect the data against
parallel accesses from them.

Currently the mutex is applied to some drivers, we need to apply it to all
drivers in the future.

Note that the mutex is adaptive one for ease of implementation but some
drivers access the data in interrupt context so we cannot apply the mutex
to every drivers as is. We have two options: one is to replace the mutex
with a spin one, which requires some additional works (see
ether_multicast_sysctl), and the other is to modify the drivers to access
the data not in interrupt context somehow.

Use the correct number of multicast addrs

Move bpf_mtap and if_ipackets++ on Rx of each driver to percpuq if_input

The benefits of the change are:
- We can reduce codes
- We can provide the same behavior between drivers
- Where/When if_ipackets is counted up
- Note that some drivers still update packet statistics in their own
way (periodical update)
- Moved bpf_mtap run in softint
- This makes it easy to MP-ify bpf

Proposed on tech-kern and tech-net

Apply deferred if_start framework

if_schedule_deferred_start checks if the if_snd queue contains packets,
so drivers don't need to check it by themselves.

PR 51672 David Binderman: M_CSUM_TCPv6, not 2x M_CSUM_TCPv4.
(from context it's quite clear that's what's supposed to be here)

Mark a variable __diagused as it is only ever used in a KASSERT

Add missing bpf_mtap.

Sync code with FreeBSD to support RSS

- Use MSI/MSI-X if it is available.
- Support TSO.

co-authored by k-nakahara

branches: 1.7.2;
Introduce m_set_rcvif and m_reset_rcvif

The API is used to set (or reset) a received interface of a mbuf.
They are counterpart of m_get_rcvif, which will come in another
commit, hide internal of rcvif operation, and reduce the diff of
the upcoming change.

No functional change.

Introduce softint-based if_input

This change intends to run the whole network stack in softint context
(or normal LWP), not hardware interrupt context. Note that the work is
still incomplete by this change; to that end, we also have to softint-ify
if_link_state_change (and bpf) which can still run in hardware interrupt.

This change softint-ifies at ifp->if_input that is called from
each device driver (and ieee80211_input) to ensure Layer 2 runs
in softint (e.g., ether_input and bridge_input). To this end,
we provide a framework (called percpuq) that utlizes softint(9)
and percpu ifqueues. With this patch, rxintr of most drivers just
queues received packets and schedules a softint, and the softint
dequeues packets and does rest packet processing.

To minimize changes to each driver, percpuq is allocated in struct
ifnet for now and that is initialized by default (in if_attach).
We probably have to move percpuq to softc of each driver, but it's
future work. At this point, only wm(4) has percpuq in its softc
as a reference implementation.

Additional information including performance numbers can be found
in the thread at tech-kern@ and tech-net@:
http://mail-index.netbsd.org/tech-kern/2016/01/14/msg019997.html

Acknowledgment: riastradh@ greatly helped this work.
Thank you very much!

branches: 1.5.2; 1.5.4;
Set ifflags callback so that the device can enter promiscuous mode.

branches: 1.4.2; 1.4.4;
Correct return value handling.
m_defrag(9) is different from OpenBSD one,
it returns new mbuf pointer on success, not zero.

Use 64-bit DMA, if it is available.
This fixes null packet handling on guest which have memory over than 3GB.

Make it be able to down I/F. This fixes panic when removing IFF_UP flag.

Add VMware VMXNET3 ethernet driver from OpenBSD, vmx(4).

vmx(4) should be MI. moved to sys/dev/pci from sys/arch/x86/pci

Centralize ETHER_ALIGN into net/if_ether.h. Note that this commit also changes
if_upgt.c's ETHER_ALIGN from 0 to 2.

branches: 1.2.16;
Sync code with FreeBSD to support RSS

- Use MSI/MSI-X if it is available.
- Support TSO.

co-authored by k-nakahara

branches: 1.1.2; 1.1.6; 1.1.8; 1.1.12;
Add VMware VMXNET3 ethernet driver from OpenBSD, vmx(4).

Add support for I2C designware controllers (as found in Intel PCH devices),
with a pci front-end.
The pci front-end is tied to ACPI and Intel-specific, so it's in arch/x86/pci
and not dev/pci.
Core driver from OpenBSD, PCI front-end by me.

- msipic_construct_msix_pic(): set mp_table_base to memaddr (without
table_offset), this is what Xen wants
while there use pci_conf_write16() in msi_set_msictl_enablebit() too,
for consistency (it seems that Xen accepts the 32bit write at this point,
but this may change).

- xen_map_msix_pirq(): don't forget to set map_irq.table_base in the
MSI-X case, otherwise Xen maps it as MSI
- call pic_hwunmask() after pirq_establish() in msi/msix case, to make sure
the msi-x vector is unmasked.

Now MSI-X works with Xen so stop disabling it in pci_attach_hook().

Work in progress on MSI/MSI-X on Xen (MSI works on my hardware, more work
needed for MSI-X):
- Xen silently rejects 32 bits writes to MSI configuration registers
(especially when setting PCI_MSI_CTL_MSI_ENABLE/PCI_MSIX_CTL_ENABLE),
it expects 16 bits writes. So introduce a pci_conf_write16(),
only available on XENPV (and working only for mode 1 without
PCI_OVERRIDE_CONF_WRITE) and use it to enable MSI or MSI-X on XENPV.
- for multi-MSI vectors, Xen allocates all of them in a single hypercall,
so it's not convenient to do it at intr_establish() time.
So do it at alloc() time and register the pirqs in the msipic structure.
xen_pic_to_gsi() now just returns the values cached in the msipic.
As a bonus, if the PHYSDEVOP_map_pirq hypercall fails we can fail
the alloc() and we don't need the xen_pci_msi*_probe() hacks.

options NO_PCI_MSI_MSIX still on by default for XEN3_DOM0.

Fix build failure when XNEPV is defined.

Not pic->pic_addroute but pic->pic_hwunmask should enable interrupts for MSI-X.

pic->pic_addroute should not enable interrupt, because callers expect
interrupts have been disabled until they call pic->pic_hwunmask.

By the way, the old implement writes zero to Vector Control for MSI-X Table
Entries, howerver it must be read and updated. Because, there are not only
Mask Bit but also ST lower and ST upper.

branches: 1.23.2;
add support for using MSI for XenPV Dom0

use PHYSDEVOP_map_pirq to get the pirq/gsi for MSI/MSI-X, switch also INTx
to use it instead of PHYSDEVOP_alloc_irq_vector

MSI confirmed working with single-vector MSI for wm(4), ahcisata(4), bge(4)

XXX added some provision for MSI-X, but it doesn't actually work (no interrupts
delivered), needs some further investigation; disable MSI-X for XENPV
via flag in x86/pci/pci_machdep.c

constify the pic templates

Merge the bouyer-xenpvh branch, bringing in Xen PV drivers support under HVM
guests in GENERIC.
Xen support can be disabled at runtime with
boot -c
disable hypervisor

branches: 1.20.6;
Use PCI_MSIX_"TBL"BIR_MASK instead of PCI_MSIX_"PBA"BIR_MASK for MSI-X table.
This is not a real bug because both macros have the same value.

Disable MSI-X before writing the MSI-X table.

That fixes MSI-X interrupt lost on VMware ESXi 6.7 PCI passthrough devices.

ok knakahara@

change bus_space_map to _x86_memio_map

Resolves bus space reservation conflict between MI and MD code.
Discussion:
http://mail-index.netbsd.org/port-amd64/2019/09/28/msg003014.html

branches: 1.17.2;
Fix updating "Multiple Message Enable" field for MSI multiple vectors. Pointed out by jmcneill@n.o, thanks.

I tested ahcisata for MSI single vector regression.

Add note about the case of PCI_MSI_MDATA[64] is 16bit.

KNF. No functional change.

Fix comma with semicolon. No functional change.

No functional change:
- Rename macros:
- ICR, LVT and MSIDATA can share the bit definitions. Remove redundant
definitions and use the common macros.
- Consistently use LAPIC_LVT_ for all local vector table's macro names.
- Use __BITS().
- Add definition for TSC-deadline (LAPIC_LVT_TMM_TSCDLT).

Fix typo in comment (s/numer/number/).

branches: 1.11.2; 1.11.6;
Don't include malloc.h.

branches: 1.10.2;
remove checks for failure after memory allocation calls that cannot fail:

kmem_alloc() with KM_SLEEP
kmem_zalloc() with KM_SLEEP
percpu_alloc()
pserialize_create()
psref_class_create()

all of these paths include an assertion that the allocation has not failed,
so callers should not assert that again.

x86: Add preliminary x2APIC support.

x2APIC is used only when x2APIC is enabled in BIOS/UEFI.
LAPIC ID is not supported above 256.

No functional change:
- Add comments.
- Remove obsolete comment.
- Move definitions to better location.
- Rename bit definition.
- KNF.
- Indent.

Add workaround for PCI prefetchable bit in msipic_construct_msix_pic().
Some chips (e.g. Intel 82599) report SERR and MSI-X interrupt doesn't work.
This problem might not be the driver's bug but our PCI common part or VMs'
bug. See fxp(4), bge(4) and ixgbe(4). All of them has the same workaround
related to prefetchable bit. For the MSI-X table area, it should not have side
effect by prefetching. Until we find a real reason, we ignore the prefetchable
bit.

- Don't take pci_attach_args as an argument in pci_msi[x]_count().
- Move prototypes of pci_msi[x]_count() from x86/x86/pci_machdep_common to
sys/dev/pci/pcivar.h.
- Move pci_msi[x]_count() from x86/pci/pci_msi_machdep.c to sys/dev/pci/pci.c

Add missing opt_intrdebug.h.

branches: 1.4.2;
add a const qualifier to struct pci_attach_args *pa argument

Make this compilable in non-DIAGNOSTIC kernels.

fix debug message.

add x86 MD MSI/MSI-X support code.

Work in progress on MSI/MSI-X on Xen (MSI works on my hardware, more work
needed for MSI-X):
- Xen silently rejects 32 bits writes to MSI configuration registers
(especially when setting PCI_MSI_CTL_MSI_ENABLE/PCI_MSIX_CTL_ENABLE),
it expects 16 bits writes. So introduce a pci_conf_write16(),
only available on XENPV (and working only for mode 1 without
PCI_OVERRIDE_CONF_WRITE) and use it to enable MSI or MSI-X on XENPV.
- for multi-MSI vectors, Xen allocates all of them in a single hypercall,
so it's not convenient to do it at intr_establish() time.
So do it at alloc() time and register the pirqs in the msipic structure.
xen_pic_to_gsi() now just returns the values cached in the msipic.
As a bonus, if the PHYSDEVOP_map_pirq hypercall fails we can fail
the alloc() and we don't need the xen_pci_msi*_probe() hacks.

options NO_PCI_MSI_MSIX still on by default for XEN3_DOM0.

add support for using MSI for XenPV Dom0

use PHYSDEVOP_map_pirq to get the pirq/gsi for MSI/MSI-X, switch also INTx
to use it instead of PHYSDEVOP_alloc_irq_vector

MSI confirmed working with single-vector MSI for wm(4), ahcisata(4), bge(4)

XXX added some provision for MSI-X, but it doesn't actually work (no interrupts
delivered), needs some further investigation; disable MSI-X for XENPV
via flag in x86/pci/pci_machdep.c

branches: 1.2.2; 1.2.18;
add a const qualifier to struct pci_attach_args *pa argument

add x86 MD MSI/MSI-X support code.

Merge thorpej-cfargs2.

branches: 1.36.8;
Merge thorpej-cfargs branch:

Simplify and make extensible the config_search() / config_found() /
config_attach() interfaces: rather than having different variants for
which arguments you want pass along, just have a single call that
takes a variadic list of tag-value arguments.

Adjust all call sites:
- Simplify wherever possible; don't pass along arguments that aren't
actually needed.
- Don't be explicit about what interface attribute is attaching if
the device only has one. (More simplification.)
- Add a config_probe() function to be used in indirect configuiration
situations, making is visibly easier to see when indirect config is
in play, and allowing for future change in semantics. (As of now,
this is just a wrapper around config_match(), but that is an
implementation detail.)

Remove unnecessary or redundant interface attributes where they're not
needed.

There are currently 5 "cfargs" defined:
- CFARG_SUBMATCH (submatch function for direct config)
- CFARG_SEARCH (search function for indirect config)
- CFARG_IATTR (interface attribte)
- CFARG_LOCATORS (locators array)
- CFARG_DEVHANDLE (devhandle_t - wraps OFW, ACPI, etc. handles)

...and a sentinel value CFARG_EOL.

Add some extra sanity checking to ensure that interface attributes
aren't ambiguous.

Use CFARG_DEVHANDLE in MI FDT, OFW, and ACPI code, and macppc and shark
ports to associate those device handles with device_t instance. This
will trickle trough to more places over time (need back-end for pre-OFW
Sun OBP; any others?).

branches: 1.35.30;
use 4-byte style accesses, should hopefully fix PR#37787.

branches: 1.34.2; 1.34.16; 1.34.20;
Now that we have amdnb_misc for attaching amdtemp, revert pchb.c revisions
1.27 and 1.32. This will unbreak the build.

XXX The amdtemp device currently does not seem to provide correct sensor
values.

XXX The amdnb_misc device does not currently have a rescan capability, so
the amdtemp module will not instantiate any devices (PR kern/45268
reappears).

XXX The agp attachment at the same pci device and function (which was
the motivation for attaching amdtemp at pchb) probably ought to also
be moved to attach at amdnb_miscbus.

Use pci_aprint_devinfo(9) instead of pci_devinfo+aprint_{normal,naive}
where it looks straightforward, and pci_aprint_devinfo_fancy in a few
others where drivers want to supply their own device names instead
of the pcidevs generated one. More complicated cases, where names
are composed at runtime, are left alone for now. It certainly makes
sense to simplify the drivers here rather than inventing a catch-all API.
This should serve as as example for new drivers, and also ensure
consistent output in the AB_QUIET ("boot -q") case. Also, it avoids
excessive stack usage where drivers attach child devices because the
buffer for the device name is not kept on the local stack anymore.

branches: 1.32.2; 1.32.6;
Add rescan support for 'amdtempbus' to x86 pchb(4).
Maybe finally fixes PR#45268.

pchb_get_bus_number() is actually public

staticification

We no longer need to #include "rnd.h".

We need to initialize the PCI chipset and device tags in the softc for
the suspend and resume handlers.

Attach amdtemp(4) at pchb(4) instead of in place of pchb(4).

Should fix PR#45268.

#include <sys/bus.h> instead of <machine/bus.h>.

PCI_FLAGS_IO_ENABLED and PCI_FLAGS_MEM_ENABLED changed their functional
role in NetBSD (drivers are no longer supposed to write these to
pa_flags) without changing name. Correct that.

Rename PCI_FLAGS_IO_ENABLED to PCI_FLAGS_IO_OKAY and
PCI_FLAGS_MEM_ENABLED to PCI_FLAGS_MEM_OKAY, thus making their names
consistent with the other PCI flags and poisoning 3rd-party driver
sources that use the flags in the old bad way.

This patch produces no binary changes in this set of PCI kernels when
they are compiled w/o 'options DIAGNOSTIC' and w/ -V MKREPRO=yes:

algor P4032 P5064 P6032
alpha GENERIC
amd64 GENERIC XEN3_DOM0
arc GENERIC
atari HADES MILAN-PCIIDE
bebox GENERIC
cats GENERIC
cobalt GENERIC
evbarm-el ADI_BRH ARMADILLO9 CP3100 GEMINI GEMINI_MASTER GEMINI_SLAVE
evbarm-el GUMSTIX HDL_G IMX31LITE INTEGRATOR IQ31244 IQ80310 IQ80321
evbarm-el IXDP425 IXM1200 KUROBOX_PRO
evbarm-el LUBBOCK MARVELL_NAS NAPPI NSLU2 SHEEVAPLUG SMDK2800 TEAMASA_NPWR
evbarm-el TEAMASA_NPWR_FC TS7200 TWINTAIL ZAO425
evbmips-el AP30 DBAU1500 DBAU1550 MALTA MERAKI MTX-1 OMSAL400 RB153 WGT624V3
evbmips64-el XLSATX
evbppc EV64260 MPC8536DS MPC8548CDS OPENBLOCKS200 OPENBLOCKS266
evbppc OPENBLOCKS266_OPT P2020RDB PMPPC RB800 WALNUT
hp700 GENERIC
i386 ALL XEN3_DOM0 XEN3_DOMU
ibmnws GENERIC
iyonix GENERIC
landisk GENERIC
macppc GENERIC
mvmeppc GENERIC
netwinder GENERIC
ofppc GENERIC
prep GENERIC
sandpoint GENERIC
sbmips-el GENERIC
sgimips GENERIC32_IP2x GENERIC32_IP3x
sparc GENERIC_SUN4U KRUPS
sparc64 GENERIC

Add Intel Pineview support

branches: 1.23.2; 1.23.4;
Almost entirely rework Intel Firmware Hub random number generator support.

This introduces fwhrng(4) which attaches via ichlpcib(4), replacing
the rnd(4) support in pchb(4).

Add AGP support for a number of Intel onboard devices, including
82G41, 82B43, E7221, 82965GME, and "Iron Lake". Device
types (i915, i965, G33, and G4X variants) from the Linux Intel AGP
driver, and (for 82G41) from Henry Bent in PR#42906.

There are a few more varieties that should be relatively low-hanging
fruit ("Pineview" and "Sandy Bridge"), but will require a little bit
of rejiggering of the "chiptype".

OK mrg@

branches: 1.21.2;
A pointer typedef entails trading too much flexibility to declare const
and non-const types, and the kernel uses both const and non-const
PMF qualifiers and device suspensors, so change the pmf_qual_t and
device_suspensor_t typedefs from "pointers to const" to non-pointer,
non-const types.

branches: 1.20.2;
Expand PMF_FN_* macros.

Save a line of dmesg by printing the vendor/product info on the same line
as the locators.

Detach pchb(4) instances at shutdown.

branches: 1.17.2;
Add some more Intel G4X class chipsets

Add support for the Intel G45 AGP. From Arnaud Lacombe

Support for Intel G35 as found on Asus P5E-VM HDMI motherboard from
Milos Negovanovic

branches: 1.14.2; 1.14.4; 1.14.8;
AGP support for Intel 945GME chipset, found on Acer Aspire One.

Add agp support for Intel 946GZ.

branches: 1.12.4;
Add a function to extract the primary bus number of PCI host bridges,
as far as specific code for this already existed.

branches: 1.11.2;
Remove clause 3 and 4 from TNF licenses

branches: 1.10.2; 1.10.4;
- use aprint_*_dev and device_xname
- use POSIX integer types

Split device_t/softc and other related cosmetic changes.

Use PMF_FN_ARGS, PMF_FN_PROTO.

fix an unaligned PCI config space access for the P2 "BX" chipset

branches: 1.6.2; 1.6.6;
Support detachment of pchb(4) and sysbeep(4).

branches: 1.5.2;
Merge jmcneill-pm branch.

branches: 1.4.2; 1.4.4; 1.4.6;
Add Intel Q35/G33/Q33 bridges.

branches: 1.3.2;
Add Intel 82965PM bridge from jmcneill-pm.

branches: 1.2.2; 1.2.4;
PR/37201 - Yasushi Oshima -- Intel 82965G chipset support

branches: 1.1.2; 1.1.4;
- Share pchb(4) between i386 and amd64; one copy is enough for both.
- Move some of the x86 PCI devices into x86/pci/files.pci.
- Add more x86 stuff into x86/conf/files.x86.

ok joerg.

Almost entirely rework Intel Firmware Hub random number generator support.

This introduces fwhrng(4) which attaches via ichlpcib(4), replacing
the rnd(4) support in pchb(4).

branches: 1.9.2; 1.9.4;
Drop 3rd and 4th clauses, as the copyright holder (Michael Shalayeff) did
in OpenBSD revision 1.39.

branches: 1.8.4; 1.8.18;
Split device_t/softc and other related cosmetic changes.

branches: 1.7.2; 1.7.6;
Support detachment of pchb(4) and sysbeep(4).

branches: 1.6.2; 1.6.8;
Merge the ppcoea-renovation branch to HEAD.

This branch was a major cleanup and rototill of many of the various OEA
cpu based PPC ports that focused on sharing as much code as possible
between the various ports to eliminate near-identical copies of files in
every tree. Additionally there is a new PIC system that unifies the
interface to interrupt code for all different OEA ppc arches. The work
for this branch was done by a variety of people, too long to list here.

TODO:
bebox still needs work to complete the transition to -renovation.
ofppc still needs a bunch of work, which I will be looking at.
ev64260 still needs to be renovated
amigappc was not attempted.

NOTES:
pmppc was removed as an arch, and moved to a evbppc target.

Make the check for a working RNG a bit more aggressive. Try to read
10 samples and bail out if there was a timeout to get either of those
within 10ms or if they are all 0xff. Both are good indicators of a
missing RNG.

Exploit that only Intel devices are matched and all devices do the same.
This saves two levels of indentation for the main body, making it more
readable. Don't hide the error for disabling the RNG under DIAGNOSTIC,
verbose is enough. Use aprint_*_dev.

branches: 1.3.8; 1.3.10; 1.3.12;
Merge some of the less invasive changes from the vmlocking branch:

- kthread, callout, devsw API changes
- select()/poll() improvements
- miscellaneous MT safety improvements

branches: 1.2.8; 1.2.14; 1.2.20; 1.2.30; 1.2.32; 1.2.38;
Improve code probing for the Intel hardware RNG to avoid false detections.
See http://home.comcast.net/~andrex/hardware-RNG/doihave.html for details.
Problem pointed on by Thor Lancelot Simon on port-amd64 mailing list.

branches: 1.1.2;
Share Intel hardware random number generator support between amd64 and
i386 port. This will benefit EM64T systems using Intel i9xx chipsets.

Now that we have amdnb_misc for attaching amdtemp, revert pchb.c revisions
1.27 and 1.32. This will unbreak the build.

XXX The amdtemp device currently does not seem to provide correct sensor
values.

XXX The amdnb_misc device does not currently have a rescan capability, so
the amdtemp module will not instantiate any devices (PR kern/45268
reappears).

XXX The agp attachment at the same pci device and function (which was
the motivation for attaching amdtemp at pchb) probably ought to also
be moved to attach at amdnb_miscbus.

branches: 1.8.2; 1.8.6;
Add rescan support for 'amdtempbus' to x86 pchb(4).
Maybe finally fixes PR#45268.

Finish cleaning up pchb from recent change.
Use fewer magic numbers in ichlpcib.
Slightly improve style conformance.
Update paths in cpp re-inclusion guards.

Almost entirely rework Intel Firmware Hub random number generator support.

This introduces fwhrng(4) which attaches via ichlpcib(4), replacing
the rnd(4) support in pchb(4).

branches: 1.5.14; 1.5.20; 1.5.22;
Remove clause 3 and 4 from TNF licenses

branches: 1.4.2; 1.4.4;
Split device_t/softc and other related cosmetic changes.

branches: 1.3.2; 1.3.6;
Support detachment of pchb(4) and sysbeep(4).

branches: 1.2.2;
Merge jmcneill-pm branch.

branches: 1.1.2; 1.1.10; 1.1.16; 1.1.22; 1.1.50; 1.1.52; 1.1.58; 1.1.62; 1.1.64;
Share Intel hardware random number generator support between amd64 and
i386 port. This will benefit EM64T systems using Intel i9xx chipsets.

Don't include malloc.h.

branches: 1.9.6; 1.9.24;
converting extent(9) from malloc(9) to kmem(9)
preceding kmem-vmem-pool-uvm patch

releng@ acknowledged

branches: 1.8.2; 1.8.6;
Normalize whitespace.

Replace some anonymous constants with PCI_ constants.

Print debugging information using aprint_debug(9) not aprint_verbose(9)
and be consistent about that. Get rid of the pciaddrverbose switch for
debugging printfs.

Make 'static' several functions that are private to this module.

Don't test truth of arbitrary integers but compare with 0. Change
'return (x)' to 'return x'.

#include <sys/bus.h> instead of <machine/bus.h>.

Add PAE to ALL kernel, so that most paddr_t format string errors get caught
during compilation.

While here, fix the compilation for ALL.

branches: 1.4.2; 1.4.4; 1.4.6;
Use aprint_*

branches: 1.3.2;
backout previous. makes i386 ALL kernel build again

remove unused malloc.h

branches: 1.1.2; 1.1.4; 1.1.8; 1.1.12;
Add support for PCI_BUS_FIXUP and PCI_ADDR_FIXUP on amd64.

branches: 1.1.2; 1.1.4; 1.1.8; 1.1.22;
Add support for PCI_BUS_FIXUP and PCI_ADDR_FIXUP on amd64.

- Almost all ppbreg.h's definitions are also in pcireg.h. Remove duplicated
definitions from ppbreg.h and move some definitions from ppbreg.h to
pcireg.h.
- Change fast back-to-back "capable" to "enable" in pci_subr.c.
- Print Primary Discard Timer, Secondary Discard Timer, Discard Timer Status
and Discard Timer SERR# Enable bit in pci_subr.c.
- PCI_BRIDGE_PREFETCHBASE32_REG and PCI_BRIDGE_PREFETCHLIMIT32_REG are
"upper" 32bit registers, rename to *UP32_REG to avoid confusion.
- Use macro.

branches: 1.2.54;
#include <sys/bus.h> instead of <machine/bus.h>.

branches: 1.1.2; 1.1.4; 1.1.8; 1.1.18; 1.1.22;
Add support for PCI_BUS_FIXUP and PCI_ADDR_FIXUP on amd64.

branches: 1.1.2; 1.1.4; 1.1.8; 1.1.22;
Add support for PCI_BUS_FIXUP and PCI_ADDR_FIXUP on amd64.

reorder includes to pull __HAVE_PCI_MSI_MSIX properly via
<x86/pci_machdep_common.h>

KNF. No functional change.

We reorganise definitions for XEN source support as follows:

XEN - common sources required for baseline XEN support.
XENPV - sources required for support of XEN in PV mode.
XENPVHVM - sources required for support for XEN in HVM mode.
XENPVH - sources required for support for XEN in PVH mode.

make

options NO_PCI_MSI_MSIX

work again for arch/x86/

actually allow pci_intr_alloc() with NULL count with MSI-X

make pci_intr_alloc() try also MSI-X by default (with NULL count);
there are boards/emulators which only have MSI-X and no MSI, and
so far there is no evidence there are devices which support both
and don't work in MSI-X mode

this change is supposed to reduce amount of needed cut&paste code in drivers

discussed briefly with jmcneill@

Revert:
http://mail-index.netbsd.org/source-changes/2018/09/10/msg098995.html

It is incorrect to infer semantics from usage.

the problem for which the original commit was intended should be fixed
within the callee intr_establish_xname() and not the caller:
pci_intr_find_intx_irq()

This was accomplished via:
http://mail-index.netbsd.org/source-changes/2018/09/20/msg099286.html

In the NIOAPIC case, we do not need to support "legacy" irqs,
ie; We don't need to simultaneously pass back the irq in the
range 0 < irq < 16 (which are sometimes described as "legacy"
in src

This was non-obvious, until the semantics of "legacy" were
used in inconsistent ways in Xen (to also mean interrupts in
the 0 < irq < 256 range) which causes problems with attempting
to unify the sys/arch/x86/isa/isa_machdep.c:isa_intr_establish_xname()
function between XEN and !XEN

This commit should not affect current functionality on any
either native or Xen. It is needed for future code reorg, and
published now as a preview.

branches: 1.43.2;
provide pci_intr_establish_xname() on x86 independantly from MSI,
so it's available on XEN too; change also the stub to use weak
symbol instead #ifdef

branches: 1.42.2;
fix "intrctl list" panic when ACPI is disabled.

reviewed by cherry@n.o and tested by msaitoh@n.o, thanks.

Don't include malloc.h.

branches: 1.40.2;
remove checks for failure after memory allocation calls that cannot fail:

kmem_alloc() with KM_SLEEP
kmem_zalloc() with KM_SLEEP
percpu_alloc()
pserialize_create()
psref_class_create()

all of these paths include an assertion that the allocation has not failed,
so callers should not assert that again.

fix build of amd64/i386 with NO_PCI_MSI_MSIX option.

branches: 1.38.2;
pci_intr_type() is required pci_chipset_tag_t argument by other than x86.

pointed out by nonaka@n.o.

Add kernel code to support intrctl(8).

- Don't take pci_attach_args as an argument in pci_msi[x]_count().
- Move prototypes of pci_msi[x]_count() from x86/x86/pci_machdep_common to
sys/dev/pci/pcivar.h.
- Move pci_msi[x]_count() from x86/pci/pci_msi_machdep.c to sys/dev/pci/pci.c

fix pci_intr_alloc(..., NULL, 0). reported nonaka@n.o

add pci_intr_alloc() API

pci_msi_string() must be used by MD code only.

refactor: change function names and move them.

unify INTx, MSI and MSI-X APIs without alloc. (alloc API is under discussion)

add x86 MD MSI/MSI-X support code.

add intr_handle_t and let pci_intr_handle_t use it.

add pci_intr_distribute(9) for x86.

branches: 1.27.6;
make pci_intr_string and eisa_intr_string take a buffer and a length
instead of relying in local static storage.

branches: 1.26.2;
Several registers and bitfields named IOAPIC_* actually belong to the
LAPIC, so rename them LAPIC_* and move to a more appropriate header
file.

branches: 1.25.2;
comment

assertions. use a macro. no functional changes.

branches: 1.23.2;
Use a loop instead of tail-recursion for the pci_intr(9) overrides.
This is the same change that I just made to the pci(9) overrides. While
I am here, fix a bug: use PCI_OVERRIDE_INTR_DISESTABLISH instead of
PCI_OVERRIDE_INTR_ESTABLISH for the pci_intr_disestablish(9) override.

In pci_msi_establish(), replace several anonymous constants with IOAPIC_
symbols. No change in the generated assembly.

Redefine PCI_MSI_* and PCI_PCIE_* constants in terms of bits(3).

Use named constants and more conventional variable names in
pci_msi_establish() and pci_msi_disestablish(). Fix a couple of bugs:
pci_msi_establish() returned a pointer to the struct intrhand instead of
to the struct msi_hdl as it was intended to, and pci_msi_disestablish()
did not free(9) the msi_hdl.

add an experimental implementation of PCI MSIs (Message Signaled
Interrupts). Successfully tested with hdaudio and "wpi" wireless
ethernet.
notes:
-There seem to be buggy chips around which announce MSI support
but don't correctly implement it. Thus the final word whether MSIs
can be used should be by the driver.
-Only a single vector is supported. For multiple vectors, the IDT
allocation code would have to be changed. (And we would possibly
run into problems due to the limited number of vectors supported
by the current code.)
-The code is "#if NIOAPIC > 0" because it uses the ioapic_edge
interrupt stubs. These actually don't touch any ioapic, so this
is somewhat a misnomer.
-MSIs can't be identified by a "pin" but only by a cpu/vector
pair. Common intr code soesn't deal well with this yet.
-Drivers need to take care of saving/restoring MSI data in the device's
config space on suspend/resume.

Neither pci_dma64_available(), pci_probe_device(), pci_mapreg_map(9),
pci_find_rom(), pci_intr_map(9), pci_enumerate_bus(), nor the match
predicate passed to pciide_compat_intr_establish() should ever modify
their pci_attach_args argument, so make their pci_attach_args arguments
const and deal with the fallout throughout the kernel.

For the most part, these changes add a 'const' where there was no
'const' before, however, some drivers and MD code used to modify
pci_attach_args. Now those drivers either copy their pci_attach_args
and modify the copy, or refrain from modifying pci_attach_args:

Xen: according to Manuel Bouyer, writing to pci_attach_args in
pci_intr_map() was a leftover from Xen 2. Probably a bug. I
stopped writing it. I have not tested this change.

siside(4): sis_hostbr_match() needlessly wrote to pci_attach_args.
Probably a bug. I use a temporary variable. I have not tested this
change.

slide(4): sl82c105_chip_map() overwrote the caller's pci_attach_args.
Probably a bug. Use a local pci_attach_args. I have not tested
this change.

viaide(4): via_sata_chip_map() and via_sata_chip_map_new() overwrote the
caller's pci_attach_args. Probably a bug. Make a local copy of the
caller's pci_attach_args and modify the copy. I have not tested
this change.

While I'm here, make pci_mapreg_submap() static.

With these changes in place, I have tested the compilation of these
kernels:

alpha GENERIC
amd64 GENERIC XEN3_DOM0
arc GENERIC
atari HADES MILAN-PCIIDE
bebox GENERIC
cats GENERIC
cobalt GENERIC
evbarm-eb NSLU2
evbarm-el ADI_BRH ARMADILLO9 CP3100 GEMINI GEMINI_MASTER GEMINI_SLAVE GUMSTIX
HDL_G IMX31LITE INTEGRATOR IQ31244 IQ80310 IQ80321 IXDP425 IXM1200
KUROBOX_PRO LUBBOCK MARVELL_NAS NAPPI SHEEVAPLUG SMDK2800 TEAMASA_NPWR
TEAMASA_NPWR_FC TS7200 TWINTAIL ZAO425
evbmips-el AP30 DBAU1500 DBAU1550 MALTA MERAKI MTX-1 OMSAL400 RB153 WGT624V3
evbmips64-el XLSATX
evbppc EV64260 MPC8536DS MPC8548CDS OPENBLOCKS200 OPENBLOCKS266
OPENBLOCKS266_OPT P2020RDB PMPPC RB800 WALNUT
hp700 GENERIC
i386 ALL XEN3_DOM0 XEN3_DOMU
ibmnws GENERIC
macppc GENERIC
mvmeppc GENERIC
netwinder GENERIC
ofppc GENERIC
prep GENERIC
sandpoint GENERIC
sgimips GENERIC32_IP2x
sparc GENERIC_SUN4U KRUPS
sparc64 GENERIC

As of Sun Apr 3 15:26:26 CDT 2011, I could not compile these kernels
with or without my patches in place:

### evbmips-el GDIUM

nbmake: nbmake: don't know how to make /home/dyoung/pristine-nbsd/src/sys/arch/mips/mips/softintr.c. Stop

### evbarm-el MPCSA_GENERIC
src/sys/arch/evbarm/conf/MPCSA_GENERIC:318: ds1672rtc*: unknown device `ds1672rtc'

### ia64 GENERIC

/tmp/genassym.28085/assym.c: In function 'f111':
/tmp/genassym.28085/assym.c:67: error: invalid application of 'sizeof' to incomplete type 'struct pcb'
/tmp/genassym.28085/assym.c:76: error: dereferencing pointer to incomplete type

### sgimips GENERIC32_IP3x

crmfb.o: In function `crmfb_attach':
crmfb.c:(.text+0x2304): undefined reference to `ddc_read_edid'
crmfb.c:(.text+0x2304): relocation truncated to fit: R_MIPS_26 against `ddc_read_edid'
crmfb.c:(.text+0x234c): undefined reference to `edid_parse'
crmfb.c:(.text+0x234c): relocation truncated to fit: R_MIPS_26 against `edid_parse'
crmfb.c:(.text+0x2354): undefined reference to `edid_print'
crmfb.c:(.text+0x2354): relocation truncated to fit: R_MIPS_26 against `edid_print'

branches: 1.18.2;
Move counting of faults, traps, intrs, soft[intr]s, syscalls, and nswtch
from uvmexp to per-cpu cpu_data and move them to 64bits. Remove unneeded
includes of <uvm/uvm_extern.h> and/or <uvm/uvm.h>.

Provide an x86 implementation of pci_chipset_tag_create(9) and
pci_chipset_tag_destroy(9).

branches: 1.16.2;
Add a new member, pc_super, to x86's pci_chipset_tag: pc.pc_super points
to the tag that pc inherits its behavior from. Add code to deal with
pc.pc_super.

Pull identical declarations out of xen/include/pci_machdep.h and
x86/include/pci_machdep.h into x86/include/pci_machdep_common.h.

In the x86 pci(9) implementation, test for and call a
pci_chipset_tag_t's override functions.

branches: 1.14.2;
Switch to ACPICA 20090730, and update for API changes.

Fix 'boot -z' bogons.

branches: 1.12.4; 1.12.10;
Remove "struct device" from "struct pic", where it was only real
for ioapics and faked up for others. Add it to "struct ioapic_softc"
for now, until device/softc get split.
This required all typecasts between "struct pic" and "struct ioapic_softc"
to be replaced, I hope I got them all.
functionally tested on i386, compile-tested on xen, untested on amd64

branches: 1.11.2;
pci_intr_setattr(), allows PCI interrupts to be marked MPSAFE on x86, and
other platforms if the code is added.

pci_intr_map(...)
pci_intr_setattr(pc, ih, PCI_INTR_MPSAFE, 1);
pci_intr_establish(...)

Add a 'known_mpsafe' argument to intr_establish().

branches: 1.9.2;
ansify

Remove clause 3 and 4 from TNF licenses

branches: 1.7.6; 1.7.8; 1.7.10;
sys/lock.h isn't needed here.

branches: 1.6.28; 1.6.34; 1.6.42;
__unused removal on arguments; approved by core.

- sprinkle __unused on function decls.
- fix a couple of unused bugs
- no more -Wno-unused for i386

branches: 1.4.4; 1.4.6; 1.4.8;
spell NACPI correctly.

PR/33912: tron: Building GENERIC kernel fails
Fallout from ACPI changes.

Apply fvdl's acpi pci interrupt configuration code.
- MPACPI is no more.
- MPACPI_SCANPCI -> ACPI_SCANPCI

branches: 1.1.4; 1.1.6; 1.1.14; 1.1.16;
Split move interrupt-related PCI functions from pci_machdep.c to
pci_intr_machdep.c. In Xen-3 registers access is done the normal way but
interrupts need custom setup. Proposed on port-amd64, port-i386 and
port-xen a week ago.

x86: correct bootinfo detection for vioif(4) adapters

When we pxeboot a virtio-net adapter in QEMU, firmware reports the
parent virtio(4) pci BDF triplet as the device we can match on, but
device_pci_register must return the child vioif(4) as actual boot device.

PR kern/57023 from Martin Kjellstrand.

x86/pci_machdep.c: Nix trailing whitespace.

No functional change intended.

Search host bridge on all devices from PCI bus 0

We look for host bridge MSI capability to enable MSI on PCI devices,
which require locating the host bridge itself. Previously we assumed
it was on bus 0, device 0, but that assmption misses some setups.
For instance, Dell Poweredge r760xd2 has its host bridge on bus 0,
device 20, function 4.

This change iterates on all devices on bus 0 to find the host bridge.

branches: 1.98.2;
pci_machdep.c & pci_msi_machdep.c: comment fixes

Correct spelling and grammar in some comments.

Support non-VGA framebuffers for Xen dom0. This is mandatory for graphic
console on EFI-only hardware.
Add a xen_genfb_getbtinfo() function which will return a btinfo_framebuffer
structure, filled in with parameters provided by Xen
when runing as a Xen dom0, call xen_genfb_getbtinfo() instead of
lookup_bootinfo(BTINFO_FRAMEBUFFER) when adding properties to the
PCI graphic device (when genfb is attached) and in x86_genfb_init()
when genfb is used as console.
x86/x86/consinit.c: If running as a Xen dom0, use xen_genfb_getbtinfo()
to check if we have a genfb console
xen/x86/consinit.c: support genfb as possible console
xen/x86/consinit.c: use the hypervior IO as console until a better one
is found. If the hypervisor is using a serial port for boot messages,
we'll get NetBSD's boot message on the serial port too until
the real console takes over.
xen/x86/autoconf.c: rework device_register() to be closer to the x86 version.
Especially make sure that device_pci_register() is called.

Declare
int acpi_md_vesa_modenum;
int acpi_md_vbios_reset;
struct vcons_screen x86_genfb_console_screen;

in genfb_machdep.h instead of locally as extern in various .c files.

xen: Provide definitions or ifdefs to make drm build in XEN3_DOM0.

No idea if it works, but it builds now.

PR port-xen/49330

Fix detection of availability of MSI/MSI-X on some systems.

Try to find all functions on bus 0, device 0 to find a PCI host bridge.
Some CPU's host bridge is at 0:0.4. Tested by Intel Snow Ridge.

branches: 1.93.4;
Fix compile error. Compile test only.

x86: Fix interaction between consinit, device_pci_register, and drm.

Leave an essay on what's going on here in both places with
cross-references.

PR kern/56996

- msipic_construct_msix_pic(): set mp_table_base to memaddr (without
table_offset), this is what Xen wants
while there use pci_conf_write16() in msi_set_msictl_enablebit() too,
for consistency (it seems that Xen accepts the 32bit write at this point,
but this may change).

- xen_map_msix_pirq(): don't forget to set map_irq.table_base in the
MSI-X case, otherwise Xen maps it as MSI
- call pic_hwunmask() after pirq_establish() in msi/msix case, to make sure
the msi-x vector is unmasked.

Now MSI-X works with Xen so stop disabling it in pci_attach_hook().

Work in progress on MSI/MSI-X on Xen (MSI works on my hardware, more work
needed for MSI-X):
- Xen silently rejects 32 bits writes to MSI configuration registers
(especially when setting PCI_MSI_CTL_MSI_ENABLE/PCI_MSIX_CTL_ENABLE),
it expects 16 bits writes. So introduce a pci_conf_write16(),
only available on XENPV (and working only for mode 1 without
PCI_OVERRIDE_CONF_WRITE) and use it to enable MSI or MSI-X on XENPV.
- for multi-MSI vectors, Xen allocates all of them in a single hypercall,
so it's not convenient to do it at intr_establish() time.
So do it at alloc() time and register the pirqs in the msipic structure.
xen_pic_to_gsi() now just returns the values cached in the msipic.
As a bonus, if the PHYSDEVOP_map_pirq hypercall fails we can fail
the alloc() and we don't need the xen_pci_msi*_probe() hacks.

options NO_PCI_MSI_MSIX still on by default for XEN3_DOM0.

Disable MSI and MSI-X support if IAPC_BOOT_ARCH reports that MSI is not
supported.

Remove x86_genfb_mtrr_init. PATs have been available since the Pentium III
and this code has been #if notyet'd shortly after being introduced.

branches: 1.87.2;
add support for using MSI for XenPV Dom0

use PHYSDEVOP_map_pirq to get the pirq/gsi for MSI/MSI-X, switch also INTx
to use it instead of PHYSDEVOP_alloc_irq_vector

MSI confirmed working with single-vector MSI for wm(4), ahcisata(4), bge(4)

XXX added some provision for MSI-X, but it doesn't actually work (no interrupts
delivered), needs some further investigation; disable MSI-X for XENPV
via flag in x86/pci/pci_machdep.c

branches: 1.86.2;
Added drivers for Hyper-V Synthetic Keyboard and Video device.

Factor out the fbinfo setting code, to make it more readable, and use
memcpy to properly align the structure (although it does not matter on x86).

We reorganise definitions for XEN source support as follows:

XEN - common sources required for baseline XEN support.
XENPV - sources required for support of XEN in PV mode.
XENPVHVM - sources required for support for XEN in HVM mode.
XENPVH - sources required for support for XEN in PVH mode.

Fix bug, SPINOUT() is not supposed to take the value given to BACKOFF().
Here the exponential backoff is wrecked.

branches: 1.82.2;
Disable all contemporary mode 1 quirks.

If mode 1 enable check fails, give mode 1 a second chance by trying to
use it to locate a PCI Host Bridge or device from vendor that produced
a chipset lacking a Host Bridge class device.

Should allow us to remove most all the mode 1 quirks added in the last
two decades.

efiboot reports parent ppb bus/device/function of booted network inteface.

branches: 1.79.2; 1.79.8;
remove checks for failure after memory allocation calls that cannot fail:

kmem_alloc() with KM_SLEEP
kmem_zalloc() with KM_SLEEP
percpu_alloc()
pserialize_create()
psref_class_create()

all of these paths include an assertion that the allocation has not failed,
so callers should not assert that again.

EFI console is drawing faster by shadowfb.

Supress verbose message "This pci host supports neither MSI nor MSI-X."
on VMware and KVM. OK'd by k-nakahara.

branches: 1.76.2;
more fix line break position in verbose message.

fix line break position in verbose message.

pointed out by nonaka@n.o, thanks.

branches: 1.74.2;
Avoid trying to create a tag for locating AMD HyperTransport bridge that will
panic a machine that uses Configuration Mechanism 2.

Move acpimcfg_map_bus() before no-MSI bailout in pci_attach_hook().

Add verbose messages when the kernel disables MSI/MSI-X.

PCI Extended Configuration stuff written by nonaka@:
- Add PCI Extended Configuration Space support into x86.
- Check register offset of pci_conf_read() in MD part. It returns (pcireg_t)-1
if it isn't accessible.
- Decode Extended Capability in PCI Extended Configuration Space.
Currently the following extended capabilities are decoded:
- Advanced Error Reporting
- Virtual Channel
- Device Serial Number
- Power Budgeting
- Root Complex Link Declaration
- Root Complex Event Collector Association
- Access Control Services
- Alternative Routing-ID Interpretation
- Address Translation Services
- Single Root IO Virtualization
- Page Request
- TPH Requester
- Latency Tolerance Reporting
- Secondary PCI Express
- Process Address Space ID
- LN Requester
- L1 PM Substates
The following extended capabilities are not decoded yet:
- Root Complex Internal Link Control
- Multi-Function Virtual Channel
- RCRB Header
- Vendor Unique
- Configuration Access Correction
- Multiple Root IO Virtualization
- Multicast
- Resizable BAR
- Dynamic Power Allocation
- Protocol Multiplexing
- Downstream Port Containment
- Precision Time Management
- M-PCIe
- Function Reading Status Queueing
- Readiness Time Reporting
- Designated Vendor-Specific

add x86 MD MSI/MSI-X support code.

branches: 1.69.2;
print the bad values in panic messages

we don't need to keep track of curmode if not vga_post.

branches: 1.67.2;
tidy up.

Force pci_mode 1 when running as Xen HVM domU to allow cd* to be detected
correctly. Fixes kern/48770. Thanks to cube@

branches: 1.65.2;
Stopgap to prevent genfb from stealing console. Revisit later.

PUCCN improvements:
- Fix a bug that the puc cn mechanism doesn't use the UART's frequency
in pucdata.c's table.

- Add a new option PUC_CNAUTO. If this option is set, consinit() in
x86/x86/consinit.c checks puc com device to use it as console.
Without this option, the behavior is the same as before.

- Add a new config parameter PUC_CNBUS. The old code scans bus #0 only.
If PUC_CNBUS is set, the specified number's bus will be scanned.

- Rename comcnprobe() to puc_cnprobe() to make it clear.

- Rename comcninit() to puc_cninit() to make it clear.

- Add code for a device that a device's com register is MMIO (#if0 ed).

Give cpu_comcnprobe a chance of working on Mode 2 PCI config space.

remove set but unused variables

Force PCI mode 1 when running under QEMU, to work around QEMU bug 897771.
This should also make it possible to boot NetBSD under versions of KVM
that have inherited said QEMU bug. Fixes PR kern/45671.

hand genfb the virtual address of the actual framebuffer, not the upper
left corner of the text area
now centering works and we don't scribble past the mapped VRAM when trying
to clear the screen in 32bit colour

Blocking memory space accesses on the SIS 85C496 chipset turned out to be
a bit too heavy-handed and similar cases are unlikely to crop up again,
so simplify by eliminating pci_bus_flags().

Closes PR port-i386/20410.

Allow console on com_puc without a compile-time option so that PC servers
can become headless after the first reboot (sadly, e.g. Intel AMT presents
as a com_puc, but doesn't appear in the BIOS serial port table, so you need
a keyboard and monitor to install and set the installboot parameters first).

Fix com_puc console on devices with offset BAR's.

branches: 1.57.4; 1.57.6;
use IO_VGA as symbolic constant for 0x3c0 in x86_genfb_set_mapreg()

branches: 1.56.2;
slightly rework pcim1_quirk_tbl[]-related bits:
- put patchable entry first so finding it with gdb/ddb is more trivial
- use pcitag_t instead of uint32_t for tag
- make this table const
- drop old #undef
- use NULL instead of 0 where appropriate.

cosmetic, spelling, and grammar adjustments

branches: 1.54.2; 1.54.6; 1.54.8;
Add VIA VX900 host bridge to a buggy PCI mode 1 quirk table. PR/46018
Ok releng@

branches: 1.53.4;
remove Xbox support

branches: 1.52.2;
Factor device_isa_register() and device_pci_register() out of
device_register() and stick the new routines into isa_machdep.c and
pci_machdep.c, respectively.

Bracket a debugging printf() with #ifdef DEBUG.

Add bus_dma overrides. From dyoung

Move the code for grovelling in PCI configuration space for assigned
memory & I/O regions into its own module, pci_ranges.c, so that we can
leave it out on systems that won't need it.

Add some code for grovelling in the PCI configuration space for all
of the memory & I/O space reserved by the PCI BIOS for PCI devices
(including bridges) and recording that information for later use.

The code takes between 13k and 50k (depends on the architecture and,
bizarrely, the kernel configuration) so I am going to move it from
pci_machdep.c into its own module on Monday.

Make the override implementation more concise. Saves about three lines
of code per routine, makes it more explicit what's going on, and avoids
recursion, though the compiler probably optimized the tail recursion in
the old code.

use c99 struct initializers

PCI_FLAGS_IO_ENABLED and PCI_FLAGS_MEM_ENABLED changed their functional
role in NetBSD (drivers are no longer supposed to write these to
pa_flags) without changing name. Correct that.

Rename PCI_FLAGS_IO_ENABLED to PCI_FLAGS_IO_OKAY and
PCI_FLAGS_MEM_ENABLED to PCI_FLAGS_MEM_OKAY, thus making their names
consistent with the other PCI flags and poisoning 3rd-party driver
sources that use the flags in the old bad way.

This patch produces no binary changes in this set of PCI kernels when
they are compiled w/o 'options DIAGNOSTIC' and w/ -V MKREPRO=yes:

algor P4032 P5064 P6032
alpha GENERIC
amd64 GENERIC XEN3_DOM0
arc GENERIC
atari HADES MILAN-PCIIDE
bebox GENERIC
cats GENERIC
cobalt GENERIC
evbarm-el ADI_BRH ARMADILLO9 CP3100 GEMINI GEMINI_MASTER GEMINI_SLAVE
evbarm-el GUMSTIX HDL_G IMX31LITE INTEGRATOR IQ31244 IQ80310 IQ80321
evbarm-el IXDP425 IXM1200 KUROBOX_PRO
evbarm-el LUBBOCK MARVELL_NAS NAPPI NSLU2 SHEEVAPLUG SMDK2800 TEAMASA_NPWR
evbarm-el TEAMASA_NPWR_FC TS7200 TWINTAIL ZAO425
evbmips-el AP30 DBAU1500 DBAU1550 MALTA MERAKI MTX-1 OMSAL400 RB153 WGT624V3
evbmips64-el XLSATX
evbppc EV64260 MPC8536DS MPC8548CDS OPENBLOCKS200 OPENBLOCKS266
evbppc OPENBLOCKS266_OPT P2020RDB PMPPC RB800 WALNUT
hp700 GENERIC
i386 ALL XEN3_DOM0 XEN3_DOMU
ibmnws GENERIC
iyonix GENERIC
landisk GENERIC
macppc GENERIC
mvmeppc GENERIC
netwinder GENERIC
ofppc GENERIC
prep GENERIC
sandpoint GENERIC
sbmips-el GENERIC
sgimips GENERIC32_IP2x GENERIC32_IP3x
sparc GENERIC_SUN4U KRUPS
sparc64 GENERIC

branches: 1.44.2;
Add an exponential back-off to the loop that tries to lock the
PCI configuration-access registers, to avoid excessive cacheline
ping-ponging. Thanks to rmind@ for the tip.

Provide an x86 implementation of pci_chipset_tag_create(9) and
pci_chipset_tag_destroy(9).