| History log of /src/sys/arch/x86/pci/msipic.h |
| Revision | | Date | Author | Comments |
| 1.4 |
| 23-May-2022 |
bouyer | Work in progress on MSI/MSI-X on Xen (MSI works on my hardware, more work
needed for MSI-X):
- Xen silently rejects 32 bits writes to MSI configuration registers
(especially when setting PCI_MSI_CTL_MSI_ENABLE/PCI_MSIX_CTL_ENABLE),
it expects 16 bits writes. So introduce a pci_conf_write16(),
only available on XENPV (and working only for mode 1 without
PCI_OVERRIDE_CONF_WRITE) and use it to enable MSI or MSI-X on XENPV.
- for multi-MSI vectors, Xen allocates all of them in a single hypercall,
so it's not convenient to do it at intr_establish() time.
So do it at alloc() time and register the pirqs in the msipic structure.
xen_pic_to_gsi() now just returns the values cached in the msipic.
As a bonus, if the PHYSDEVOP_map_pirq hypercall fails we can fail
the alloc() and we don't need the xen_pci_msi*_probe() hacks.
options NO_PCI_MSI_MSIX still on by default for XEN3_DOM0.
|
| 1.3 |
| 04-May-2020 |
jdolecek | add support for using MSI for XenPV Dom0
use PHYSDEVOP_map_pirq to get the pirq/gsi for MSI/MSI-X, switch also INTx
to use it instead of PHYSDEVOP_alloc_irq_vector
MSI confirmed working with single-vector MSI for wm(4), ahcisata(4), bge(4)
XXX added some provision for MSI-X, but it doesn't actually work (no interrupts
delivered), needs some further investigation; disable MSI-X for XENPV
via flag in x86/pci/pci_machdep.c
|
| 1.2 |
| 08-May-2015 |
knakahara | branches: 1.2.2; 1.2.18;
add a const qualifier to struct pci_attach_args *pa argument
|
| 1.1 |
| 27-Apr-2015 |
knakahara | add x86 MD MSI/MSI-X support code.
|
| 1.2.18.2 |
| 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.2.18.1 |
| 08-May-2015 |
jdolecek | file msipic.h was added on branch tls-maxphys on 2017-12-03 11:36:50 +0000
|
| 1.2.2.2 |
| 06-Jun-2015 |
skrll | Sync with HEAD
|
| 1.2.2.1 |
| 08-May-2015 |
skrll | file msipic.h was added on branch nick-nhusb on 2015-06-06 14:40:04 +0000
|
