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History log of /src/sys/arch/x86/x86/procfs_machdep.c
RevisionDateAuthorComments
 1.49  06-Oct-2024  msaitoh Add AMD svsm bit for x86's /proc/cpuinfo
 1.48  07-Aug-2023  msaitoh Update /proc/cpuinfo.

- Move "ssbd" to an unused Linux mapping.
- Update unused Linux mappings.
 1.47  11-Apr-2023  msaitoh Add Intel lam and AMD vnmi.
 1.46  30-Dec-2022  msaitoh Add x2avic. Modify comment.
 1.45  20-Jun-2022  msaitoh branches: 1.45.4;
Add tdx_guest, brs, hfi, ibt, amx_bf16, amx_tile and amx_int8.
 1.44  31-Jan-2022  msaitoh Fix procfs_machdep.c rev. 1.143. Print CPUID 0x00000007:1 %eax correctly.
 1.43  14-Jan-2022  msaitoh Update for cpuid flags:

- The table 11 was changed from CPUID 0x0f leaf 0 %edx to a Linux mapping.
- The table 12 was changed from CPUID 0x0f leaf 1 %edx to CPUID 0x07 leaf 1
%edx. Print avx_vnni and avx512_bf16.
- Print cppc, enqcmd and arch_lbr.
- Modify linux mapping. No used on NetBSD.
 1.42  07-Oct-2021  msaitoh KNF. No functional change.
 1.41  10-Jul-2021  msaitoh Add v_spec_ctrl, avx512_fp16, sme, sev and sev_es. Tested by nonaka@.
 1.40  30-Nov-2020  msaitoh branches: 1.40.4;
Add sgx, sgx_lc, serialize and tsxldtrk.
 1.39  25-Apr-2020  bouyer branches: 1.39.2;
Merge the bouyer-xenpvh branch, bringing in Xen PV drivers support under HVM
guests in GENERIC.
Xen support can be disabled at runtime with
boot -c
disable hypervisor
 1.38  24-Apr-2020  msaitoh Lowercase ppin.
 1.37  24-Apr-2020  msaitoh Add AMD protected processor identification number (PPIN).
 1.36  01-Apr-2020  msaitoh branches: 1.36.2;
Add AVX512_VP2INTERSECT, SERIALIZE and TSXLDTRK(TSX suspend load addr tracking)
 1.35  17-Jan-2020  msaitoh Add Fast Short Rep Mov(fsrm).
 1.34  17-Oct-2019  msaitoh branches: 1.34.2;
Add rdpru.
 1.33  24-Jul-2019  msaitoh branches: 1.33.2;
Add avx512ifma, cqm_mbm_total, cqm_mbm_local and waitpkg
 1.32  28-May-2019  kamil Avoid the 1<<31 construct

Shift unsigned int rather than signed one.

Detected with kUBSan when reading /proc/cpuinfo.
 1.31  16-May-2019  msaitoh Revert rev. 1.29. Use current cpuid 7 edx value to print.
 1.30  16-May-2019  msaitoh Add md_clear.
 1.29  16-May-2019  msaitoh Use ci_feat_val[7] instead of directly getting cpuid 7 edx.
 1.28  18-Feb-2019  msaitoh - Add wbnoinvd, virt_ssbd, tme, cldemote, movdiri, movdir64b and pconfig.
- Move AMD 0x80000008 ebx's ibpb, ibrs and stibp to x86_features[8] linux
mapping.
 1.27  06-Jan-2019  christos restore original now that weak symbols are gone
 1.26  05-Jan-2019  christos Comment out rcr0 use until the weak symbol mess is undone.
 1.25  15-Nov-2018  msaitoh - I misread ci_acpiid as ci_apicid... LAPIC ID is in ci_cpuid.
Print it correctly.
- ci_initapicid(Initial APIC ID) is uint32_t, so use %u.
 1.24  20-Aug-2018  msaitoh OK'd by maxv:
- Add cpuid 7 edx L1D_FLUSH bit.
- Add IA32_ARCH_SKIP_L1DFL_VMENTRY bit.
- Add IA32_FLUSH_CMD MSR.
 1.23  23-May-2018  msaitoh branches: 1.23.2;
Add SSBD bit for Intel.
 1.22  05-Mar-2018  msaitoh branches: 1.22.2;
- Add AMD CPUID leaf 0x80000008 ebx's xsaveerptr, ibpb, ibrs, stibp.
- Add Intel CPUID leaf 7 ebx's umip, avx512_vbmi2, gfni, vaes, vpclmulqdq,
avx512_vnni and avx512_bitalg.
- Add Intel CPUID leaf 7 edx's avx512_4vnniw, avx512_4fmaps and
arch_capabilities.
 1.21  10-Jan-2018  msaitoh Print intel_pt in /proc/cpuinfo.
 1.20  10-Oct-2017  msaitoh Fix the location of AMD's smca(Scalable MCA) bit. Thanks Yasushi Oshima for
finding this bug.
 1.19  09-Oct-2017  maya GC i386_fpu_present. no FPU x86 is not supported.

Also delete newly unused send_sigill
 1.18  05-Oct-2017  msaitoh - Use per cpu ci->ci_max_cupid instead of global "cpuid_level" variable.
- Print AMD specific cpuid leafs:
0x80000008 ebx
0x8000000a edx
0x80000007 ebx
 1.17  28-Sep-2017  msaitoh Print the following cpuid bits:

0x0000000d:1 eax (xsaveopt, xsavec, xgetbv1, xsaves)
0x0000000f:0 edx (cqm_llc)
0x0000000f:1 edx (cqm_occup_llc)
0x00000006 eax (dtherm, ida, arat, pln, pts, hwp, hwp_notify,
hwp_act_window, hwp_epp, hwp_pkg_req)
 1.16  28-Aug-2017  msaitoh Check buffer length correctly to not to print a garbage character.
Fixes PR#52352 reported by Yasushi Oshima.
 1.15  15-May-2017  msaitoh branches: 1.15.2;
- Print 0x00000007:0 ecx leaf bits.
- Don't print fdiv_bug on amd64.
- Print APIC ID, Initial APIC ID and clflush size.
 1.14  08-Dec-2016  msaitoh branches: 1.14.6;
- Remove "pcommit".
- Add "rdt_a".
 1.13  08-Aug-2016  msaitoh - Update VIA/Cyrix/Centaur-defined bits. Part of PR#39950
- Fix comment. x86_features[4] is not 0x80000001 but 0x00000001
- Update comment
 1.12  27-Apr-2016  msaitoh branches: 1.12.2;
Take some changes from the Linux's latest x86/include/asm/cpufeatures.h.
- Add ptsc, avx512dq, avx512bw and avx512vl
- Remove some Linux mappings.
 1.11  12-Feb-2016  msaitoh Fix typo in comment.
 1.10  18-Jan-2016  msaitoh Add comments. Fix comments. No functional change.
 1.9  13-Jan-2016  msaitoh Use CPUID_TO_*() macros. This change fix a bug that /proc/cpuinfo's CPU model
was incorrect on many newer CPUs and CPU family was incorrect on some AMD
machines.
 1.8  13-Jan-2016  msaitoh PR#49246 "x86/x86/procfs_machdep.c (/proc/cpuinfo) is very old" related change
- Decode NetBSD's ci_feat_val[0-5]. The output order of the bits is the same as
linux. Before this commit, only ci_feat_val[0] was decoded.
- Linux defined feature words and some others are not decoded yet.
- procfs_getonecpufeatures() will be rewritten when all of linux entries are
decoded.
 1.7  16-Apr-2015  njoly Always output 2 digits for the cpu frequency decimal part.
 1.6  05-Apr-2014  christos branches: 1.6.4; 1.6.6;
make this compute the needed size instead of bailing.
 1.5  27-Mar-2014  christos correct/add protection against snprintf overflow.
 1.4  24-Mar-2014  christos use cpu_{g,s}etmodel
 1.3  12-Feb-2014  dsl Change i386 to use x86/fpu.c instead of i386/isa/npx.c
This changes the trap10 and trap13 code to call directly into fpu.c,
removing all the code for T_ARITHTRAP, T_XMM and T_FPUNDA from i386/trap.c
Not all of the code thate appeared to handle fpu traps was ever called!
Most of the changes just replace the include of machine/npx.h with x86/fpu.h
(or remove it entirely).
 1.2  02-Feb-2014  dsl Minor fpu initialisation cleanups:
Set default CR) so that the FPU is enabled (unset CR0_EM) and initialise
i386_fpu_present to 1.
No need to call the npx trap indirectly, rename to fpunda() to match amd64.
Remove the i386_fpu_exception variable and sysctl (It used to indicate
which irq was used for fpu exceptions, but we only support 'internal'
now). Hopefully no one cares.
fpuinit() now only needs to clear TS before the fninit(). Apart from the
checks for 486SX and the 'fdiv bug' this matches the amd64 version.
Exclude fpuinit() from XEN kernels, they don't call it - which rather begs
the question as to whether it is needed at all!
 1.1  08-Jul-2010  rmind branches: 1.1.2; 1.1.4; 1.1.6; 1.1.12; 1.1.16; 1.1.26; 1.1.30;
Unify i386 and amd64 procfs MD code into x86.
 1.1.30.1  18-May-2014  rmind sync with head
 1.1.26.2  03-Dec-2017  jdolecek update from HEAD
 1.1.26.1  20-Aug-2014  tls Rebase to HEAD as of a few days ago.
 1.1.16.1  22-May-2014  yamt sync with head.

for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.

this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
 1.1.12.2  05-Mar-2011  rmind sync with head
 1.1.12.1  08-Jul-2010  rmind file procfs_machdep.c was added on branch rmind-uvmplock on 2011-03-05 20:52:31 +0000
 1.1.6.2  24-Oct-2010  jym Sync with HEAD
 1.1.6.1  08-Jul-2010  jym file procfs_machdep.c was added on branch jym-xensuspend on 2010-10-24 22:48:19 +0000
 1.1.4.2  17-Aug-2010  uebayasi Sync with HEAD.
 1.1.4.1  08-Jul-2010  uebayasi file procfs_machdep.c was added on branch uebayasi-xip on 2010-08-17 06:45:34 +0000
 1.1.2.2  11-Aug-2010  yamt sync with head.
 1.1.2.1  08-Jul-2010  yamt file procfs_machdep.c was added on branch yamt-nfs-mp on 2010-08-11 22:52:58 +0000
 1.6.6.6  28-Aug-2017  skrll Sync with HEAD
 1.6.6.5  05-Feb-2017  skrll Sync with HEAD
 1.6.6.4  05-Oct-2016  skrll Sync with HEAD
 1.6.6.3  29-May-2016  skrll Sync with HEAD
 1.6.6.2  19-Mar-2016  skrll Sync with HEAD
 1.6.6.1  06-Jun-2015  skrll Sync with HEAD
 1.6.4.4  18-Nov-2018  martin Pull up following revision(s) (requested by msaitoh in ticket #1650):

sys/arch/x86/x86/procfs_machdep.c: revision 1.25

- I misread ci_acpiid as ci_apicid... LAPIC ID is in ci_cpuid.
Print it correctly.

- ci_initapicid(Initial APIC ID) is uint32_t, so use %u.
 1.6.4.3  11-Sep-2017  snj Pull up following revision(s) (requested by msaitoh in ticket #1505):
sys/arch/x86/x86/procfs_machdep.c: 1.15-1.16
- Print 0x00000007:0 ecx leaf bits.
- Don't print fdiv_bug on amd64.
- Print APIC ID, Initial APIC ID and clflush size.
--
Check buffer length correctly to not to print a garbage character.
Fixes PR#52352 reported by Yasushi Oshima.
 1.6.4.2  08-Dec-2016  snj Pull up following revision(s) (requested by msaitoh in ticket #1293):
sys/arch/x86/x86/procfs_machdep.c: revisions 1.12-1.14
Update for x86 /proc/cpuinfo:
- Add ptsc, avx512dq, avx512bw, avx512vl and rdt_a.
- Update VIA/Cyrix/Centaur-defined bits. Part of PR#39950.
- Remove pcommit.
- Update some Linux mapping unused in /proc/cpuinfo.
 1.6.4.1  06-Mar-2016  martin branches: 1.6.4.1.2;
Pull up the following revisions, requested by msaitoh in ticket #1119:

sys/arch/x86/x86/procfs_machdep.c 1.7-1.11

x86's /proc/cpuinfo fixes:
- Always output 2 digits for the cpu frequency decimal part.
- Update x86's feature bits in /proc/cpuinfo (PR#49246).
- Fix a bug that /proc/cpuinfo's CPU model was incorrect on many newer
CPUs and CPU family was incorrect on some AMD CPUs.
- Add comment. Fix comment.
 1.6.4.1.2.1  18-Jan-2017  skrll Sync with netbsd-5
 1.12.2.1  07-Jan-2017  pgoyette Sync with HEAD. (Note that most of these changes are simply $NetBSD$
tag issues.)
 1.14.6.1  19-May-2017  pgoyette Resolve conflicts from previous merge (all resulting from $NetBSD
keywork expansion)
 1.15.2.16  21-Jun-2023  martin Pull up following revision(s) (requested by msaitoh in ticket #1830):

sys/arch/x86/x86/procfs_machdep.c: revision 1.47

Add Intel lam and AMD vnmi.
 1.15.2.15  23-Jan-2023  martin Pull up following revision(s) (requested by msaitoh in ticket #1788):

sys/arch/x86/x86/procfs_machdep.c: revision 1.46

Add x2avic. Modify comment.
 1.15.2.14  16-Sep-2022  martin Pull up following revision(s) (requested by msaitoh in ticket #1766):

sys/arch/x86/x86/procfs_machdep.c: revision 1.45

Add tdx_guest, brs, hfi, ibt, amx_bf16, amx_tile and amx_int8.
 1.15.2.13  31-Jan-2022  martin Pull up following revision(s) (requested by msaitoh in ticket #1733):

sys/arch/x86/x86/procfs_machdep.c: revision 1.43
sys/arch/x86/x86/procfs_machdep.c: revision 1.44

Update for cpuid flags:
- The table 11 was changed from CPUID 0x0f leaf 0 %edx to a Linux mapping.
- The table 12 was changed from CPUID 0x0f leaf 1 %edx to CPUID 0x07 leaf 1
%edx. Print avx_vnni and avx512_bf16.
- Print cppc, enqcmd and arch_lbr.
- Modify linux mapping. No used on NetBSD.

Fix procfs_machdep.c rev. 1.143. Print CPUID 0x00000007:1 %eax correctly.
 1.15.2.12  03-Dec-2021  martin Pull up the following revisions, requested by msaitoh in ticket #1715:

sys/arch/x86/x86/procfs_machdep.c 1.40-1.42

- Add v_spec_ctrl, avx512_fp16, sme, sev, sev_es, sgx, sgx_lc,
serialize and tsxldtrk.
- Whitespace fix.
 1.15.2.11  20-Jul-2020  martin Pull up following revision(s) (requested by msaitoh in ticket #1581):

sys/arch/x86/x86/procfs_machdep.c: revision 1.37
sys/arch/x86/x86/procfs_machdep.c: revision 1.38

Add AMD protected processor identification number (PPIN).

Lowercase ppin.
 1.15.2.10  15-Apr-2020  martin Pull up the following, requested by msaitoh in ticket #1530:

sys/arch/x86/x86/procfs_machdep.c 1.33-1.36
sys/arch/x86/x86/tsc.c 1.40
sys/arch/x86/x86/specialreg.h 1.159-1.161
usr.sbin/cpuctl/arch/i386.c 1.109-1.110 via patch

- Print avx512ifma, cqm_mbm_total, cqm_mbm_local, waitpkg, rdpru,
Fast Short Rep Mov(fsrm), AVX512_VP2INTERSECT, SERIALIZE and
TSXLDTRK.
- Rename CPUID Fn8000_0007 %edx bit 8 from "TSC" to "ITSC"
(Invariant TSC) to avoid confusion.
- Print CPUID 0x80000007 %edx on both Intel and AMD.
- Remove ci_max_ext_cpuid from usr.sbin/cpuctl/arch/i386.c because it's
the same as ci_cpuid_extlevel.
- Use unsigned to avoid undefined behavior in procfs_getonefeatreg().
 1.15.2.9  29-May-2019  martin Pullup the following, requested by msaitoh in ticket #1270:

sys/arch/x86/include/specialreg.h 1.143, 1.145 via patch
sys/arch/x86/x86/procfs_machdep.c 1.30

Add TSX_FORCE_ABORT related definitions.
Add cpuid7 edx bit 10 "MD_CLEAR".
 1.15.2.8  07-Mar-2019  martin Pull up following revision(s) (requested by msaitoh in ticket #1204):

sys/arch/x86/x86/procfs_machdep.c: revision 1.28

- Add wbnoinvd, virt_ssbd, tme, cldemote, movdiri, movdir64b and pconfig.
- Move AMD 0x80000008 ebx's ibpb, ibrs and stibp to x86_features[8] linux
mapping.
 1.15.2.7  18-Nov-2018  martin Pull up following revision(s) (requested by msaitoh in ticket #1094):

sys/arch/x86/x86/procfs_machdep.c: revision 1.25

- I misread ci_acpiid as ci_apicid... LAPIC ID is in ci_cpuid.
Print it correctly.

- ci_initapicid(Initial APIC ID) is uint32_t, so use %u.
 1.15.2.6  23-Sep-2018  martin Pull up following revision(s) (requested by msaitoh in ticket #1026):

sys/arch/x86/x86/procfs_machdep.c: revision 1.24
sys/arch/x86/include/specialreg.h: revision 1.130

OK'd by maxv:
- Add cpuid 7 edx L1D_FLUSH bit.
- Add IA32_ARCH_SKIP_L1DFL_VMENTRY bit.
- Add IA32_FLUSH_CMD MSR.
 1.15.2.5  09-Jun-2018  martin Pull up following revision(s) (requested by msaitoh in ticket #867):

sys/arch/x86/x86/procfs_machdep.c: revision 1.23

Add SSBD bit for Intel.
 1.15.2.4  16-Mar-2018  martin Pull up following revision(s) (requested by msaitoh in ticket #634):
sys/arch/x86/x86/procfs_machdep.c: revision 1.22
- Add AMD CPUID leaf 0x80000008 ebx's xsaveerptr, ibpb, ibrs, stibp.
- Add Intel CPUID leaf 7 ebx's umip, avx512_vbmi2, gfni, vaes, vpclmulqdq,
avx512_vnni and avx512_bitalg.
- Add Intel CPUID leaf 7 edx's avx512_4vnniw, avx512_4fmaps and
arch_capabilities.
 1.15.2.3  13-Jan-2018  snj Pull up following revision(s) (requested by msaitoh in ticket #492):
sys/arch/x86/x86/procfs_machdep.c: revision 1.21
Print intel_pt in /proc/cpuinfo.
 1.15.2.2  21-Nov-2017  martin Pull up following revision(s) (requested by msaitoh in ticket #367):
sys/arch/x86/x86/procfs_machdep.c: revision 1.20
sys/arch/x86/x86/procfs_machdep.c: revision 1.17
sys/arch/x86/x86/procfs_machdep.c: revision 1.18
Print the following cpuid bits:
0x0000000d:1 eax (xsaveopt, xsavec, xgetbv1, xsaves)
0x0000000f:0 edx (cqm_llc)
0x0000000f:1 edx (cqm_occup_llc)
0x00000006 eax (dtherm, ida, arat, pln, pts, hwp, hwp_notify,
hwp_act_window, hwp_epp, hwp_pkg_req)
- Use per cpu ci->ci_max_cupid instead of global "cpuid_level" variable.
- Print AMD specific cpuid leafs:
0x80000008 ebx
0x8000000a edx
0x80000007 ebx
Fix the location of AMD's smca(Scalable MCA) bit. Thanks Yasushi Oshima for
finding this bug.
 1.15.2.1  31-Aug-2017  martin Pull up following revision(s) (requested by msaitoh in ticket #247):
sys/arch/x86/x86/procfs_machdep.c: revision 1.16
Check buffer length correctly to not to print a garbage character.
Fixes PR#52352 reported by Yasushi Oshima.
 1.22.2.3  26-Nov-2018  pgoyette Sync with HEAD, resolve a couple of conflicts
 1.22.2.2  06-Sep-2018  pgoyette Sync with HEAD

Resolve a couple of conflicts (result of the uimin/uimax changes)
 1.22.2.1  25-Jun-2018  pgoyette Sync with HEAD
 1.23.2.3  13-Apr-2020  martin Mostly merge changes from HEAD upto 20200411
 1.23.2.2  08-Apr-2020  martin Merge changes from current as of 20200406
 1.23.2.1  10-Jun-2019  christos Sync with HEAD
 1.33.2.8  21-Jun-2023  martin Pull up following revision(s) (requested by msaitoh in ticket #1649):

sys/arch/x86/x86/procfs_machdep.c: revision 1.47

Add Intel lam and AMD vnmi.
 1.33.2.7  23-Jan-2023  martin Pull up following revision(s) (requested by msaitoh in ticket #1571):

sys/arch/x86/x86/procfs_machdep.c: revision 1.46

Add x2avic. Modify comment.
 1.33.2.6  16-Sep-2022  martin Pull up following revision(s) (requested by msaitoh in ticket #1526):

sys/arch/x86/x86/procfs_machdep.c: revision 1.45

Add tdx_guest, brs, hfi, ibt, amx_bf16, amx_tile and amx_int8.
 1.33.2.5  31-Jan-2022  martin Pull up following revision(s) (requested by msaitoh in ticket #1419):

sys/arch/x86/x86/procfs_machdep.c: revision 1.43
sys/arch/x86/x86/procfs_machdep.c: revision 1.44

Update for cpuid flags:
- The table 11 was changed from CPUID 0x0f leaf 0 %edx to a Linux mapping.
- The table 12 was changed from CPUID 0x0f leaf 1 %edx to CPUID 0x07 leaf 1
%edx. Print avx_vnni and avx512_bf16.
- Print cppc, enqcmd and arch_lbr.
- Modify linux mapping. No used on NetBSD.

Fix procfs_machdep.c rev. 1.143. Print CPUID 0x00000007:1 %eax correctly.
 1.33.2.4  03-Dec-2021  martin Pull up the following revisions, requested by msaitoh in ticket #1385:

sys/arch/x86/x86/procfs_machdep.c 1.40-1.42

- Add v_spec_ctrl, avx512_fp16, sme, sev, sev_es, sgx, sgx_lc,
serialize and tsxldtrk.
- Whitespace fix.
 1.33.2.3  10-Jul-2020  martin Pull up following revision(s) (requested by msaitoh in ticket #993):

sys/arch/x86/x86/procfs_machdep.c: revision 1.37
sys/arch/x86/x86/procfs_machdep.c: revision 1.38

Add AMD protected processor identification number (PPIN).

Lowercase ppin.
 1.33.2.2  14-Apr-2020  martin Pull up following revision(s) (requested by msaitoh in ticket #833):

usr.sbin/cpuctl/arch/i386.c: revision 1.109
sys/arch/x86/include/specialreg.h: revision 1.159
usr.sbin/cpuctl/arch/i386.c: revision 1.110
sys/arch/x86/include/specialreg.h: revision 1.160
sys/arch/x86/include/specialreg.h: revision 1.161
sys/arch/x86/x86/tsc.c: revision 1.40
sys/arch/x86/x86/procfs_machdep.c: revision 1.35
sys/arch/x86/x86/procfs_machdep.c: revision 1.36

Add Fast Short Rep Mov(fsrm).

Add AVX512_VP2INTERSECT, SERIALIZE and TSXLDTRK(TSX suspend load addr tracking)

CPUID Fn00000001 %edx bit 8 is printed as "TSC", so rename CPUID Fn8000_0007
%edx bit 8 from "TSC" to "ITSC" (Invariant TSC) to avoid confusion.

Rename CPUID_APM_TSC to CPUID_APM_ITSC. No functional change.

Remove ci_max_ext_cpuid because it's the same as ci_cpuid_extlevel.

Print CPUID 0x80000007 %edx on both Intel and AMD.
 1.33.2.1  17-Oct-2019  martin Pull up following revision(s) (requested by msaitoh in ticket #344):

sys/arch/x86/include/specialreg.h: revision 1.154
sys/arch/x86/include/specialreg.h: revision 1.155
usr.sbin/cpuctl/arch/i386.c: revision 1.107
sys/arch/x86/x86/procfs_machdep.c: revision 1.34

- Add definitions of AMD's CPUID Fn8000_001f Encrypted Memory features.
- Add definition of AMD's CPUID Fn8000_000a %edx bit 11 "GMET".
- Define CPUID_AMD_SVM_PFThreshold correctly.
- Modify comment a bit for consistency.

Fix AMD Fn8000_0001f %eax bit 0's name.

Add rdpru.
 1.34.2.1  17-Jan-2020  ad Sync with head.
 1.36.2.1  25-Apr-2020  bouyer Sync with bouyer-xenpvh-base2 (HEAD)
 1.39.2.1  14-Dec-2020  thorpej Sync w/ HEAD.
 1.40.4.1  01-Aug-2021  thorpej Sync with HEAD.
 1.45.4.2  21-Jun-2023  martin Pull up following revision(s) (requested by msaitoh in ticket #203):

sys/arch/x86/x86/procfs_machdep.c: revision 1.47

Add Intel lam and AMD vnmi.
 1.45.4.1  23-Jan-2023  martin Pull up following revision(s) (requested by msaitoh in ticket #54):

sys/arch/x86/x86/procfs_machdep.c: revision 1.46

Add x2avic. Modify comment.

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