Cross Reference: /src/sys/dev/acpi/sdhc

History log of /src/sys/dev/acpi/sdhc_acpi.c
Revision	Date	Author	Comments
1.22	17-Aug-2024	skrll	Trailing whitespace
1.21	09-May-2024	dyoung	branches: 1.21.2; If the ACPI flag "non-removable" is present and true for an SD/MMC slot, then set a new flag on that slot to indicate that the media is non-removable. Make sdhc_card_detect always return true for a slot if its non-removable media flag is set. This change lets the kernel automatically configure the permanently-installed MMC slot on the NXP LX2160-based HoneyComb LX2 board.
1.20	06-Feb-2022	jmcneill	sdhc: Retire SDHC_FLAG_USE_ADMA2 flag. ADMA2 support in sdhc is mature now, so no need for it to be opt-in.
1.19	15-Jan-2022	jmcneill	32-bit build fix
1.18	15-Jan-2022	jmcneill	acpi: sdhc: Read caps2 even if sdhci-caps{,-mask} doesn't touch the bits SDHC_FLAG_HOSTCAPS means that the driver has to supply both caps and caps2 values.
1.17	15-Jan-2022	jmcneill	acpi: sdhc: Add support for RK356x eMMC controller. RK356x has a DesignWare eMMC controller that is somewhat SDHCI compliant, with one major problem -- the clock divisor doesn't actually work. To change the clock card on Rockchip SoCs, the clock frequency needs to be adjusted in the Clock & Reset Unit (CRU) directly. The RK356x UEFI implementation introduces a DSM that allows drivers to request firmware assistance in setting the card clock rate, for instances like this where the divisor is broken. From the UEFI README: Function 1: Set Card Clock The _DSM control method parameters for the Set Card Clock function are as follows: Arguments * Arg0: UUID = 434addb0-8ff3-49d5-a724-95844b79ad1f * Arg1: Revision = 0 * Arg2: Function Index = 1 * Arg3: Target card clock rate in Hz. Return The actual card clock rate in Hz. Will be less than or equal to the target clock rate. Returns 0 if the target clock rate could not be set.
1.16	11-Jan-2022	jmcneill	acpi: sdhc: Support sdhci-caps and sdhci-caps-mask properties.
1.15	28-Dec-2021	jmcneill	acpi: sdhc: Ignore clkbase register if clock-frequency property is present
1.14	01-Feb-2020	tnn	fix build
1.13	01-Feb-2020	christos	use designated initializers
1.12	01-Feb-2020	jmcneill	appease -Werror=missing-field-initializers
1.11	01-Feb-2020	jmcneill	Add NXP/Freescale ESDHC specific support
1.10	01-Feb-2020	jmcneill	Use acpi_match_hid to match both _HID and _CID
1.9	29-Dec-2019	jmcneill	branches: 1.9.2; Read clock frequency from device properties
1.8	15-Oct-2019	chs	convert more KM_NOSLEEP to KM_SLEEP and remove code to handle failures.
1.7	17-Nov-2018	kre	Attempt to appease gcc and unbreak i386 build. Should be NFC.
1.6	16-Nov-2018	jmcneill	Use acpi_md_intr_establish/disestablish to handle device IRQs. The existing code abused AcpiOsInstallInterruptHandler, which is meant for installing the SCI handler.
1.5	08-May-2018	mlelstv	branches: 1.5.2; Bail if we have a zero-length memory resource.
1.4	17-Feb-2017	nonaka	branches: 1.4.12; 1.4.14; sdhc(4): hardware reset support for Intel eMMC controller
1.3	11-Aug-2016	nonaka	branches: 1.3.2; Enable DMA transfer.
1.2	22-Jun-2016	nonaka	branches: 1.2.2; 1.2.4; remove unused variable.
1.1	21-Jun-2016	nonaka	Add sdhc(4) at acpi support
1.2.4.1	20-Mar-2017	pgoyette	Sync with HEAD
1.2.2.4	28-Aug-2017	skrll	Sync with HEAD
1.2.2.3	05-Oct-2016	skrll	Sync with HEAD
1.2.2.2	09-Jul-2016	skrll	Sync with HEAD
1.2.2.1	22-Jun-2016	skrll	file sdhc_acpi.c was added on branch nick-nhusb on 2016-07-09 20:25:01 +0000
1.3.2.1	21-Apr-2017	bouyer	Sync with HEAD
1.4.14.2	26-Nov-2018	pgoyette	Sync with HEAD, resolve a couple of conflicts
1.4.14.1	21-May-2018	pgoyette	Sync with HEAD
1.4.12.2	03-Dec-2017	jdolecek	update from HEAD
1.4.12.1	17-Feb-2017	jdolecek	file sdhc_acpi.c was added on branch tls-maxphys on 2017-12-03 11:36:58 +0000
1.5.2.3	13-Apr-2020	martin	Mostly merge changes from HEAD upto 20200411
1.5.2.2	08-Apr-2020	martin	Merge changes from current as of 20200406
1.5.2.1	10-Jun-2019	christos	Sync with HEAD
1.9.2.1	29-Feb-2020	ad	Sync with head.
1.21.2.1	02-Aug-2025	perseant	Sync with HEAD

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