History log of /src/sys/dev/nvmm/x86/nvmm_x86_svmfunc.S |
Revision | | Date | Author | Comments |
1.6 |
| 05-Sep-2020 |
maxv | nvmm: update copyright headers
|
1.5 |
| 11-Aug-2020 |
maxv | Micro-optimize: use pushq instead of pushw. To avoid LCP stalls and unaligned stack accesses.
|
1.4 |
| 19-Jul-2020 |
maxv | The TLB flush IPIs do not respect the IPL, so enforcing IPL_HIGH has no effect. Disable interrupts earlier instead. This prevents a possible race against such IPIs.
|
1.3 |
| 24-Apr-2019 |
maxv | branches: 1.3.2; 1.3.4; Match the structure order, for better cache utilization.
|
1.2 |
| 10-Jan-2019 |
maxv | Optimize:
* Don't save/restore the host CR2, we don't care because we're not in a #PF context (and preemption switches already handle CR2 safely).
* Don't save/restore the host FS and GS, just reset them to zero after VMRUN. Note: DS and ES must be reset _before_ VMRUN, but that doesn't apply to FS and GS.
* Handle FSBASE and KGSBASE outside of the VCPU loop, to avoid the cost of saving/restoring them when there's no reason to leave the loop.
|
1.1 |
| 07-Nov-2018 |
maxv | branches: 1.1.2; Add NVMM - for NetBSD Virtual Machine Monitor -, a kernel driver that provides support for hardware-accelerated virtualization on NetBSD.
It is made of an MI frontend, to which MD backends can be plugged. One MD backend is implemented, x86-SVM, for x86 AMD CPUs.
We install
/usr/include/dev/nvmm/nvmm.h /usr/include/dev/nvmm/nvmm_ioctl.h /usr/include/dev/nvmm/{arch}/nvmm_{arch}.h
And the kernel module. For now, the only architecture where we do that is amd64 (arch=x86).
NVMM is not enabled by default in amd64-GENERIC, but is instead easily modloadable.
Sent to tech-kern@ a month ago. Validated with kASan, and optimized with tprof.
|
1.1.2.3 |
| 18-Jan-2019 |
pgoyette | Synch with HEAD
|
1.1.2.2 |
| 26-Nov-2018 |
pgoyette | Sync with HEAD, resolve a couple of conflicts
|
1.1.2.1 |
| 07-Nov-2018 |
pgoyette | file nvmm_x86_svmfunc.S was added on branch pgoyette-compat on 2018-11-26 01:52:32 +0000
|
1.3.4.1 |
| 29-Aug-2020 |
martin | Pull up following revision(s) (requested by maxv in ticket #1068):
sys/dev/nvmm/x86/nvmm_x86_svm.c: revision 1.71 sys/dev/nvmm/nvmm.c: revision 1.34 sys/dev/nvmm/x86/nvmm_x86_svm.c: revision 1.72 sys/dev/nvmm/nvmm.c: revision 1.35 sys/dev/nvmm/nvmm.c: revision 1.36 sys/dev/nvmm/x86/nvmm_x86_svmfunc.S: revision 1.5 sys/dev/nvmm/nvmm.c: revision 1.37 sys/dev/nvmm/x86/nvmm_x86_vmxfunc.S: revision 1.5 sys/dev/nvmm/x86/nvmm_x86_vmx.c: revision 1.70 sys/dev/nvmm/x86/nvmm_x86_svm.c: revision 1.68 sys/dev/nvmm/x86/nvmm_x86.c: revision 1.15 sys/dev/nvmm/nvmm_ioctl.h: revision 1.10
Micro-optimize: use pushq instead of pushw. To avoid LCP stalls and unaligned stack accesses.
nvmm-x86: also flush the guest TLB when CR4.{PCIDE,SMEP} changes
nvmm: localify a variable that doesn't need to be global
nvmm: use relaxed atomics to read nmachines
nvmm-x86-svm: dedup code
nvmm-x86: hide more CPUID flags, mostly related to perf monitors
nvmm: misc improvements - use mach->ncpus to get the number of vcpus, now that we have it - don't forget to decrement mach->ncpus when a machine gets killed - add more __predict_false()
nvmm-x86-svm: don't forget to intercept INVD INVD executed in the guest can be dangerous for the host, due to CPU caches being flushed without write-back.
nvmm: slightly clarify
nvmm: explicitly include atomic.h
|
1.3.2.2 |
| 10-Jun-2019 |
christos | Sync with HEAD
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1.3.2.1 |
| 24-Apr-2019 |
christos | file nvmm_x86_svmfunc.S was added on branch phil-wifi on 2019-06-10 22:07:14 +0000
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