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History log of /src/sys/dev/pci/nfsmbreg.h
RevisionDateAuthorComments
 1.2  04-Dec-2007  xtraeme Newer nForce MCP SMBus devices use different PCI BARs than the old ones
(nForce 2/3/4).

nfsmb(4) is now properly working on newer MCPs, tested by wiz@ on MCP55:

nfsmbc0 at pci0 dev 1 function 1: NVIDIA nForce MCP55 SMBus Controller (rev. 0xa2)
nfsmb0 at nfsmbc0 SMBus 1
iic0 at nfsmb0: I2C bus
spdmem0 at iic0 addr 0x51
spdmem0: DDR2 SDRAM memory, data ECC, 1024MB, 667MHz, PC2-5300
spdmem0: 14 rows, 10 cols, 2 ranks, 4 banks/chip, 3.00ns cycle time
spdmem0: voltage SSTL 1.8V, refresh time 7.8us (self-refreshing)
nfsmb1 at nfsmbc0 SMBus 2
iic1 at nfsmb1: I2C bus
 1.1  11-Jul-2007  kiyohara branches: 1.1.2; 1.1.4; 1.1.10; 1.1.12; 1.1.14; 1.1.20; 1.1.22;
Add support for NVIDIA nForce 2/3/4 SMBus controller and SMBus driver.
 1.1.22.1  08-Dec-2007  ad Sync with head.
 1.1.20.1  08-Dec-2007  mjf Sync with HEAD.
 1.1.14.3  07-Dec-2007  yamt sync with head
 1.1.14.2  03-Sep-2007  yamt sync with head.
 1.1.14.1  11-Jul-2007  yamt file nfsmbreg.h was added on branch yamt-lazymbuf on 2007-09-03 14:37:14 +0000
 1.1.12.1  09-Jan-2008  matt sync with HEAD
 1.1.10.1  09-Dec-2007  jmcneill Sync with HEAD.
 1.1.4.2  15-Jul-2007  ad Sync with head.
 1.1.4.1  11-Jul-2007  ad file nfsmbreg.h was added on branch vmlocking on 2007-07-15 13:21:37 +0000
 1.1.2.2  11-Jul-2007  mjf Sync with head.
 1.1.2.1  11-Jul-2007  mjf file nfsmbreg.h was added on branch mjf-ufs-trans on 2007-07-11 20:07:54 +0000

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