History log of /src/sys/dev/pci/ppbreg.h |
Revision | | Date | Author | Comments |
1.10 |
| 01-Mar-2019 |
msaitoh | - Almost all ppbreg.h's definitions are also in pcireg.h. Remove duplicated definitions from ppbreg.h and move some definitions from ppbreg.h to pcireg.h. - Change fast back-to-back "capable" to "enable" in pci_subr.c. - Print Primary Discard Timer, Secondary Discard Timer, Discard Timer Status and Discard Timer SERR# Enable bit in pci_subr.c. - PCI_BRIDGE_PREFETCHBASE32_REG and PCI_BRIDGE_PREFETCHLIMIT32_REG are "upper" 32bit registers, rename to *UP32_REG to avoid confusion. - Use macro.
|
1.9 |
| 02-Jul-2018 |
msaitoh | VGA 16 bit decode bit is not bit 3 but bit 4.
|
1.8 |
| 18-Dec-2017 |
msaitoh | branches: 1.8.2; 1.8.4; Add VGA 16bit decode bit into the PCI bridge control register. This bit is defined in PCI-to-PCI Bridge Architecture Specification Revision 1.2. This bit has meaning if the VGA enable bit or the VGA Palette Snoop Enable bit is set.
NOTE: sys/arch/x86/pci/pci_ranges.c::mmio_range_extend_by_vga_enable() and/or some other functions should be modified.
|
1.7 |
| 10-May-2017 |
msaitoh | branches: 1.7.2; Fix typos.
|
1.6 |
| 11-Dec-2005 |
christos | branches: 1.6.120; 1.6.140; 1.6.154; merge ktrace-lwp.
|
1.5 |
| 27-Feb-2005 |
perry | nuke trailing whitespace
|
1.4 |
| 08-Nov-2001 |
thorpej | branches: 1.4.16; 1.4.24; 1.4.26; Fix the Bridge Control Register bit definitions, add ones that appeared in PCI 2.2.
|
1.3 |
| 06-Jul-2001 |
mcr | branches: 1.3.2; 1.3.6; added bridge secondary bus reset macros.
|
1.2 |
| 14-Mar-1996 |
cgd | branches: 1.2.42; (1) provide #defines for cf_loc[] entries for devices that attach to pcibus and pci. (2) remove the #ifdef i386 from pci.c, and provide a machine-dependent hook (pci_md_attach_hook()) to do any machine-dependent attachment gunk, e.g. on the i386 printing out the configuration mode (if bus 0) (3) don't pass max device number for a given bus in, use PCI_MAX_DEVICE_NUMBER, which can be defined on a per-machine basis. (defaults to 32. on i386, it's 32 if pci conf mode == 1, 16 if 2.)
|
1.1 |
| 28-Feb-1996 |
cgd | Preliminary support for PCI-PCI bridges. Recognize a PCI-PCI bridge and attach the secondary pci bus as a 'pci' device. Note that this support is incomplete and will not yet work for ports other than that i386. (The i386 can rely on the PCI interrupt 'line' information to determine interrupt mapping, which is not necessarily possible on other systems.)
|
1.2.42.2 |
| 14-Nov-2001 |
nathanw | Catch up to -current.
|
1.2.42.1 |
| 24-Aug-2001 |
nathanw | Catch up with -current.
|
1.3.6.1 |
| 12-Nov-2001 |
thorpej | Sync the thorpej-mips-cache branch with -current.
|
1.3.2.1 |
| 10-Jan-2002 |
thorpej | Sync kqueue branch with -current.
|
1.4.26.1 |
| 19-Mar-2005 |
yamt | sync with head. xen and whitespace. xen part is not finished.
|
1.4.24.1 |
| 29-Apr-2005 |
kent | sync with -current
|
1.4.16.1 |
| 04-Mar-2005 |
skrll | Sync with HEAD.
Hi Perry!
|
1.6.154.1 |
| 11-May-2017 |
pgoyette | Sync with HEAD
|
1.6.140.1 |
| 28-Aug-2017 |
skrll | Sync with HEAD
|
1.6.120.1 |
| 03-Dec-2017 |
jdolecek | update from HEAD
|
1.7.2.2 |
| 26-Jul-2018 |
snj | Pull up following revision(s) (requested by msaitoh in ticket #933): sys/dev/pci/pci_subr.c: revision 1.202 sys/dev/pci/pcireg.h: revision 1.139 sys/dev/pci/ppbreg.h: revision 1.9 VGA 16 bit decode bit is not bit 3 but bit 4. -- - Print Power Management Control/status register in 32bit. - Simplify.
|
1.7.2.1 |
| 26-Feb-2018 |
snj | Pull up following revision(s) (requested by msaitoh in ticket #576): sys/dev/pci/pci_subr.c: 1.197-1.200 sys/dev/pci/pcireg.h: 1.136-1.137 sys/dev/pci/ppbreg.h: 1.8 Add VGA 16bit decode bit into the PCI bridge control register. This bit is defined in PCI-to-PCI Bridge Architecture Specification Revision 1.2. This bit has meaning if the VGA enable bit or the VGA Palette Snoop Enable bit is set. NOTE: sys/arch/x86/pci/pci_ranges.c::mmio_range_extend_by_vga_enable() and/or some other functions should be modified. "s/above 300W/greater than 300W/" in pci_conf_print_pcie_power(). From PCIe Base Spec 3.1a Errata 2017-12-13. Cleanup: - Don't pass a capability pointer as a argument of pci_conf_find_cap() and determine the first pointer in the pci_conf_find_cap() function. - Don't pass a capability pointer as a argument of pci_conf_find_extcap() because it's not used. - Remove unsed code. - Add PCie Link Activation ECN. - Use macro. - KNF.
|
1.8.4.1 |
| 10-Jun-2019 |
christos | Sync with HEAD
|
1.8.2.1 |
| 28-Jul-2018 |
pgoyette | Sync with HEAD
|