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History log of /src/sys/dev/sdmmc/sdhcreg.h
RevisionDateAuthorComments
 1.21  15-Jul-2020  msaitoh Identify SDHC 4.1 and 4.2. From {DragonFly,Free}BSD.
 1.20  23-Oct-2019  hkenken Add SDHC flags.

+ SDHC_FLAG_BROKEN_ADMA2_ZEROLEN
Broken ADMA2 Zero length descriptor.
Can't 64K Byte data transfer.
+ SDHC_FLAG_NO_1_8_V
Support no 1.8V Supply.
Disable UHS-I bus speed mode (SDR50, DDR50, SDR104).
 1.19  23-Jun-2017  ryo branches: 1.19.6; 1.19.12;
fix problem for ESDHC/USDHC due to change of r1.96

on ESDHC/USDHC, even if the iosize is less than SDHC_HOST_CTL_VERSION,
specver must be an appropriate value.
 1.18  31-Dec-2015  ryo branches: 1.18.10;
add support iMX6 uSDHC
- some UHS-I/SDR104 card are not stable
- eMMC doesn't work yet
 1.17  05-Aug-2015  jmcneill support re-tuning modes 1 and 2
 1.16  05-Aug-2015  jmcneill Implement SDHC sampling clock tuning procedure.
 1.15  02-Aug-2015  jmcneill add support for UHS-I modes on capable 3.0+ controllers
 1.14  29-Jul-2015  jmcneill Add ADMA2 support, which enables scatter gather DMA for data transfers on
controllers that support it.
 1.13  02-May-2015  jmcneill support SDHC 4.0, allow for overriding clk base frequency
 1.12  26-Jan-2015  nonaka eSDHC has non standard Host Controller Version Register offset.
 1.11  24-Dec-2012  jakllsch branches: 1.11.12; 1.11.14;
Add a few more register bits from SDHCI 3.0.
Also, add comment to denote an ESDHC bit.
 1.10  15-Oct-2012  jakllsch Make whitespace following preprocessor keywords consistent
with the predominating form in this file (that is, a space).
 1.9  31-Aug-2012  matt branches: 1.9.2;
Support deciphering SDHCv3 clock rates.
 1.8  20-Jul-2012  matt Add use of watermark register when PIO to an ESDHC. After every kill or
drain of watermask words, pause a bit to give time for the fifo to recover.
Always the command response in BE byteorder. Rewrite __bitfield to deal
with this.
 1.7  12-Jul-2012  jakllsch Add DMA boundary field shift and mask.
 1.6  02-Mar-2012  nonaka Added Ricoh 5U822/5U823 SD/MMC Controller support.
 1.5  01-Feb-2012  matt branches: 1.5.2;
Add XLP specific CGM mode for SDHC_CLOCK_CTL.
 1.4  01-Feb-2012  matt Add some more FreeScale ESDHC defintions.
 1.3  29-Jun-2011  matt branches: 1.3.2; 1.3.6;
Add some inital changes for the Freescale eSDHC.
 1.2  17-Mar-2011  matt Add stuff that the Freescale PowerQUICC3 ESDHC controllers have.
 1.1  21-Apr-2009  nonaka branches: 1.1.2; 1.1.4; 1.1.6; 1.1.8; 1.1.12; 1.1.14; 1.1.16;
Added SD/MMC support from OpenBSD.
tested on i386, amd64 at current-users ML by pgoyette@.
tested on zaurus by myself.
 1.1.16.1  06-Jun-2011  jruoho Sync with HEAD.
 1.1.14.4  27-Dec-2011  matt Sync/merge with changes from matt-nb5-pq3
 1.1.14.3  24-Dec-2011  matt Add support for >63MHZ speeds.
Add support for extended clock division via CGM.
 1.1.14.2  21-Apr-2010  matt sync to netbsd-5
 1.1.14.1  21-Apr-2009  matt file sdhcreg.h was added on branch matt-nb5-mips64 on 2010-04-21 00:27:52 +0000
 1.1.12.1  21-Apr-2011  rmind sync with head
 1.1.8.2  07-Oct-2009  sborrill branches: 1.1.8.2.4;
Pull up the following revisions(s) (requested by jmcneill in ticket #1044):
distrib/sets/lists/man/mi: patch
share/man/man4/Makefile: patch
sys/arch/amd64/conf/files.amd64: 1.67
sys/arch/i386/conf/files.i386: 1.349
sys/conf/files 1.945
share/man/man4/sdmmc.4: 1.1-1.4
sys/dev/sdmmc/Makefile.sdmmcdevs 1.1
sys/dev/sdmmc/devlist2h.awk 1.1
sys/dev/sdmmc/files.sdmmc 1.1-1.2
sys/dev/sdmmc/ld_sdmmc.c 1.1-1.3
sys/dev/sdmmc/sbt.c 1.1-1.2
sys/dev/sdmmc/sdhc.c 1.1-1.3
sys/dev/sdmmc/sdhcreg.h 1.1
sys/dev/sdmmc/sdhcvar.h 1.1
sys/dev/sdmmc/sdmmc.c 1.1
sys/dev/sdmmc/sdmmc_cis.c 1.1
sys/dev/sdmmc/sdmmc_io.c 1.1
sys/dev/sdmmc/sdmmc_ioreg.h 1.1
sys/dev/sdmmc/sdmmc_mem.c 1.1-1.2
sys/dev/sdmmc/sdmmcchip.h 1.1
sys/dev/sdmmc/sdmmcdevs 1.1
sys/dev/sdmmc/sdmmcdevs.h 1.1-1.2
sys/dev/sdmmc/sdmmcreg.h 1.1-1.3
sys/dev/sdmmc/sdmmcvar.h 1.1

Add sdmmc framework
 1.1.8.1  21-Apr-2009  sborrill file sdhcreg.h was added on branch netbsd-5 on 2009-10-07 15:41:13 +0000
 1.1.8.2.4.1  26-Jul-2011  matt Backport flash/nand/nor subsystem from -HEAD.
 1.1.6.2  13-May-2009  jym Sync with HEAD.

Commit is split, to avoid a "too many arguments" protocol error.
 1.1.6.1  21-Apr-2009  jym file sdhcreg.h was added on branch jym-xensuspend on 2009-05-13 17:21:29 +0000
 1.1.4.2  04-May-2009  yamt sync with head.
 1.1.4.1  21-Apr-2009  yamt file sdhcreg.h was added on branch yamt-nfs-mp on 2009-05-04 08:13:18 +0000
 1.1.2.2  28-Apr-2009  skrll Sync with HEAD.
 1.1.2.1  21-Apr-2009  skrll file sdhcreg.h was added on branch nick-hppapmap on 2009-04-28 07:36:33 +0000
 1.3.6.4  06-Mar-2012  mrg sync to -current
 1.3.6.3  06-Mar-2012  mrg sync to -current
 1.3.6.2  04-Mar-2012  mrg sync to latest -current.
 1.3.6.1  18-Feb-2012  mrg merge to -current.
 1.3.2.3  23-Jan-2013  yamt sync with head
 1.3.2.2  30-Oct-2012  yamt sync with head
 1.3.2.1  17-Apr-2012  yamt sync with head
 1.5.2.2  02-Jan-2013  riz sys/dev/sdmmc/sdhc.c patch
sys/dev/sdmmc/sdhcreg.h patch

Support SDHC version 3 clocks.
[skrll, ticket #759]
 1.5.2.1  08-Aug-2012  jdc Pull up revisions:
src/sys/dev/sdmmc/sdhc.c revisions 1.16,1.20,1.21,1.22,1.23 via patch,1.25
src/sys/dev/sdmmc/sdhcreg.h revision 1.8
src/sys/dev/sdmmc/sdmmc_mem.c revisions 1.21,1.22
src/sys/dev/sdmmc/sdmmcreg.h revisions 1.10,1.11,1.12
(requested by matt in ticket 441).

SDHCI byte swaps the BE response on the wire into LE registers.
As we always want response data in LE, use bus_space_read_stream.
Additonally, read response data in 1 or 4 4-byte chunks, instead of
one 4-byte chunk or 15 1-byte chunks.

bus_space_*_stream_N() functions are not universally available.
Provite alternate implementation for when they are unavailable.

Handle interrupt acknowledgement in the SDHC_FLAG_32BIT_ACCESS case in
the same way as non-SDHC_FLAG_32BIT_ACCESS case.

If there was an error in 32-bit mode, just set ERROR_INTERRUPT otherwise
see if matched anything we care about.

Add use of watermark register when PIO to an ESDHC. After every kill or
drain of watermask words, pause a bit to give time for the fifo to recover.
Always the command response in BE byteorder. Rewrite __bitfield to deal
with this.

Responses are actually in host order (except SCR which is return in
big endian so that's convert to host order).

Fix comments about __bitfield.
 1.9.2.3  03-Dec-2017  jdolecek update from HEAD
 1.9.2.2  25-Feb-2013  tls resync with head
 1.9.2.1  20-Nov-2012  tls Resync to 2012-11-19 00:00:00 UTC
 1.11.14.5  28-Aug-2017  skrll Sync with HEAD
 1.11.14.4  19-Mar-2016  skrll Sync with HEAD
 1.11.14.3  22-Sep-2015  skrll Sync with HEAD
 1.11.14.2  06-Jun-2015  skrll Sync with HEAD
 1.11.14.1  06-Apr-2015  skrll Sync with HEAD
 1.11.12.1  27-Jan-2015  martin Pull up following revision(s) (requested by nonaka in ticket #460):
sys/dev/sdmmc/sdhcreg.h: revision 1.12
sys/dev/sdmmc/sdhc.c: revision 1.52
eSDHC has non standard Host Controller Version Register offset.
 1.18.10.2  05-Aug-2020  martin Pull up following revision(s) (requested by msaitoh in ticket #1592):

sys/dev/sdmmc/sdhc.c: revision 1.107
sys/dev/sdmmc/sdhcreg.h: revision 1.21

Identify SDHC 4.1 and 4.2. From {DragonFly,Free}BSD.
 1.18.10.1  07-Jan-2018  snj Pull up following revision(s) (requested by ryo in ticket #468):
sys/dev/sdmmc/sdhcreg.h: revision 1.19
sys/dev/sdmmc/sdhc.c: revision 1.101
fix problem for ESDHC/USDHC due to change of r1.96
on ESDHC/USDHC, even if the iosize is less than SDHC_HOST_CTL_VERSION,
specver must be an appropriate value.
 1.19.12.1  20-Jul-2020  martin Pull up following revision(s) (requested by msaitoh in ticket #1021):

sys/dev/sdmmc/sdhc.c: revision 1.107
sys/dev/sdmmc/sdhcreg.h: revision 1.21

Identify SDHC 4.1 and 4.2. From {DragonFly,Free}BSD.
 1.19.6.1  13-Apr-2020  martin Mostly merge changes from HEAD upto 20200411

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