| History log of /src/sys/external/bsd/drm2/drm/drm_cache.c |
| Revision | | Date | Author | Comments |
| 1.19 |
| 19-Jul-2022 |
riastradh | drm: Make drm_clflush_* noop on alpha.
As far as I know there is no need for this; the CPU has weak ordering
on loads and stores requiring ordering barriers, but I/O devices
participate in the CPU's cache protocol for access to main memory so
there's never any need for explicit cache flushes.
|
| 1.18 |
| 19-Dec-2021 |
riastradh | drm: Another pass over i915 and some supporting logic.
This makes a shim around sg_table, which essentially represents two
things:
1. an array of pages (roughly corresponding to bus_dma_segment_t[])
2. an array of DMA addresses stored in a bus_dmamap_t
Both parts are optional; different parts of i915 use sg_tables to
pass around one or both of the two parts. This helps to reduce the
ifdefs by quite a bit, although it's not always clear which part of
an sg_table any particular interface is actually using which is why I
was reluctant to do this before.
|
| 1.17 |
| 19-Dec-2021 |
riastradh | drm: Nix use of uvm pglist. Just use arrays of page pointers.
|
| 1.16 |
| 19-Dec-2021 |
riastradh | Make ourselves less dependent on drmP.h, removed upstream.
This causes some trouble as CONFIG_* lines might not be appropriately
defined. A few declarations remain in drmP.h so it's not gone.
Author: Maya Rashish <maya@NetBSD.org>
|
| 1.15 |
| 19-Dec-2021 |
riastradh | drm_clflush_* decls moved to drm_cache.h.
|
| 1.14 |
| 05-Sep-2020 |
maxv | x86: fix several CPUID flags
- Rename: CPUID_PN -> CPUID_PSN
CPUID_CFLUSH -> CPUID_CLFSH
CPUID_SBF -> CPUID_PBE
CPUID_LZCNT -> CPUID_ABM
CPUID_P1GB -> CPUID_PAGE1GB
CPUID2_PCLMUL -> CPUID2_PCLMULQDQ
CPUID2_CID -> CPUID2_CNXTID
CPUID2_xTPR -> CPUID2_XTPR
CPUID2_AES -> CPUID2_AESNI
To match the x86 specification and the other OSes.
- Remove: CPUID_B10, CPUID_B20, CPUID_IA64. They do not exist.
|
| 1.13 |
| 23-Jan-2019 |
jmcneill | branches: 1.13.4;
skip clflush on aarch64, too
|
| 1.12 |
| 27-Aug-2018 |
riastradh | Draft sparc cache flushing.
|
| 1.11 |
| 27-Aug-2018 |
riastradh | Factor mfence out. Simplify a little.
|
| 1.10 |
| 27-Aug-2018 |
riastradh | Need sync after a series of dcbf's on powerpc.
|
| 1.9 |
| 27-Aug-2018 |
riastradh | Implement drm_md_clflush_* for powerpc with dcbf.
|
| 1.8 |
| 17-Oct-2015 |
jmcneill | branches: 1.8.10; 1.8.16; 1.8.18;
skip clflush on arm
|
| 1.7 |
| 17-Oct-2015 |
jmcneill | machine/cpufunc.h is MD, move it to i386/amd64 block
|
| 1.6 |
| 06-Mar-2015 |
riastradh | Remove local definition of wbinvd.
|
| 1.5 |
| 06-Mar-2015 |
riastradh | Use x86_mfence explicitly, not membar_sync, just to be clear.
|
| 1.4 |
| 04-Mar-2015 |
riastradh | CLFLUSH needs to be surrounded by membars.
While here, round everything to a multiple of the cache line size.
|
| 1.3 |
| 16-Jul-2014 |
riastradh | branches: 1.3.2; 1.3.4; 1.3.6;
Make it build and boot on my test machines.
Screen blanks on boot on the Ivy Bridge system with
DRM error in cpt_serr_int_handler: PCH transcoder A FIFO underrun
But after that everything is OK. Appears to be an upstream problem.
To investigate...
I think there's a cache flushing issue somewhere -- there are little
display artefacts on my T60.
|
| 1.2 |
| 18-Mar-2014 |
riastradh | branches: 1.2.2; 1.2.4; 1.2.6;
Merge riastradh-drm2 to HEAD.
|
| 1.1 |
| 08-Sep-2013 |
riastradh | branches: 1.1.2;
file drm_cache.c was initially added on branch riastradh-drm2.
|
| 1.1.2.2 |
| 08-Sep-2013 |
riastradh | Helps to commit all my changes to drm_cache.c.
|
| 1.1.2.1 |
| 08-Sep-2013 |
riastradh | Implement drm_cache.c, for x86 only at the moment.
|
| 1.2.6.2 |
| 22-May-2014 |
yamt | sync with head.
for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.
this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
|
| 1.2.6.1 |
| 18-Mar-2014 |
yamt | file drm_cache.c was added on branch yamt-pagecache on 2014-05-22 11:40:55 +0000
|
| 1.2.4.2 |
| 18-May-2014 |
rmind | sync with head
|
| 1.2.4.1 |
| 18-Mar-2014 |
rmind | file drm_cache.c was added on branch rmind-smpnet on 2014-05-18 17:46:00 +0000
|
| 1.2.2.1 |
| 10-Aug-2014 |
tls | Rebase.
|
| 1.3.6.2 |
| 27-Dec-2015 |
skrll | Sync with HEAD (as of 26th Dec)
|
| 1.3.6.1 |
| 06-Apr-2015 |
skrll | Sync with HEAD
|
| 1.3.4.3 |
| 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.3.4.2 |
| 20-Aug-2014 |
tls | Rebase to HEAD as of a few days ago.
|
| 1.3.4.1 |
| 16-Jul-2014 |
tls | file drm_cache.c was added on branch tls-maxphys on 2014-08-20 00:04:20 +0000
|
| 1.3.2.1 |
| 06-Mar-2015 |
snj | Pull up following revision(s) (requested by mrg in ticket #573):
sys/external/bsd/common/include/linux/kernel.h: 1.5, 1.6
sys/external/bsd/drm2/dist/drm/drm_ioctl.c: 1.4
sys/external/bsd/drm2/dist/drm/drm_irq.c: 1.6-1.8
sys/external/bsd/drm2/dist/drm/i915/i915_dma.c: 1.13-1.15
sys/external/bsd/drm2/dist/drm/i915/i915_gem.c: 1.23-1.27
sys/external/bsd/drm2/dist/drm/i915/i915_gem_execbuffer.c: 1.5
sys/external/bsd/drm2/dist/drm/i915/intel_display.c: 1.14, 1.15
sys/external/bsd/drm2/dist/drm/i915/intel_dp.c: 1.10
sys/external/bsd/drm2/dist/drm/i915/intel_drv.h: 1.8
sys/external/bsd/drm2/dist/drm/i915/intel_i2c.c: 1.8-1.13
sys/external/bsd/drm2/dist/drm/i915/intel_pm.c: 1.6
sys/external/bsd/drm2/dist/drm/i915/intel_ringbuffer.c: 1.5, 1.6
sys/external/bsd/drm2/dist/drm/nouveau/core/engine/device/nouveau_engine_device_base.c: 1.4
sys/external/bsd/drm2/dist/drm/nouveau/core/engine/fifo/nouveau_engine_fifo_nvc0.c: 1.3, 1.4
sys/external/bsd/drm2/dist/drm/nouveau/core/engine/fifo/nouveau_engine_fifo_nve0.c: 1.3, 1.4
sys/external/bsd/drm2/dist/drm/nouveau/core/include/core/device.h: 1.4
sys/external/bsd/drm2/dist/drm/nouveau/core/include/subdev/mc.h: 1.2
sys/external/bsd/drm2/dist/drm/nouveau/core/include/subdev/pwr.h: 1.3, 1.4
sys/external/bsd/drm2/dist/drm/nouveau/core/os.h: 1.4, 1.5
sys/external/bsd/drm2/dist/drm/nouveau/core/subdev/bios/nouveau_subdev_bios_base.c: 1.2
sys/external/bsd/drm2/dist/drm/nouveau/core/subdev/bios/nouveau_subdev_bios_pll.c: 1.2
sys/external/bsd/drm2/dist/drm/nouveau/core/subdev/clock/nouveau_subdev_clock_base.c: 1.2
sys/external/bsd/drm2/dist/drm/nouveau/core/subdev/clock/nouveau_subdev_clock_nv50.c: 1.2
sys/external/bsd/drm2/dist/drm/nouveau/core/subdev/devinit/fbmem.h: 1.2
sys/external/bsd/drm2/dist/drm/nouveau/core/subdev/devinit/nouveau_subdev_devinit_nv04.c: 1.2
sys/external/bsd/drm2/dist/drm/nouveau/core/subdev/fb/nouveau_subdev_fb_nv50.c: 1.2
sys/external/bsd/drm2/dist/drm/nouveau/core/subdev/fb/nouveau_subdev_fb_nvc0.c: 1.2
sys/external/bsd/drm2/dist/drm/nouveau/core/subdev/fb/nv50.h: 1.2
sys/external/bsd/drm2/dist/drm/nouveau/core/subdev/fb/nvc0.h: 1.2
sys/external/bsd/drm2/dist/drm/nouveau/core/subdev/mc/nouveau_subdev_mc_base.c: 1.2, 1.3
sys/external/bsd/drm2/dist/drm/nouveau/core/subdev/mxm/nouveau_subdev_mxm_nv50.c: 1.2
sys/external/bsd/drm2/dist/drm/nouveau/core/subdev/pwr/nouveau_subdev_pwr_base.c: 1.3, 1.4
sys/external/bsd/drm2/dist/drm/nouveau/core/subdev/therm/nouveau_subdev_therm_ic.c: 1.2
sys/external/bsd/drm2/dist/drm/nouveau/core/subdev/timer/nouveau_subdev_timer_nv04.c: 1.2
sys/external/bsd/drm2/dist/drm/nouveau/core/subdev/vm/nouveau_subdev_vm_base.c: 1.2
sys/external/bsd/drm2/dist/drm/nouveau/core/subdev/vm/nouveau_subdev_vm_nv04.c: 1.2
sys/external/bsd/drm2/dist/drm/nouveau/core/subdev/vm/nouveau_subdev_vm_nv44.c: 1.2
sys/external/bsd/drm2/dist/drm/nouveau/core/subdev/vm/nv04.h: 1.2
sys/external/bsd/drm2/dist/drm/nouveau/nouveau_bo.h: 1.3
sys/external/bsd/drm2/dist/drm/nouveau/nouveau_drm.c: 1.4, 1.5
sys/external/bsd/drm2/dist/drm/nouveau/nouveau_fbcon.c: 1.2
sys/external/bsd/drm2/dist/drm/nouveau/nouveau_nv50_display.c: 1.3
sys/external/bsd/drm2/dist/drm/nouveau/nouveau_nv84_fence.c: 1.2
sys/external/bsd/drm2/dist/drm/nouveau/nouveau_ttm.c: 1.3
sys/external/bsd/drm2/dist/drm/nouveau/nouveau_ttm.h: 1.2
sys/external/bsd/drm2/dist/drm/nouveau/nouveau_vga.h: 1.2
sys/external/bsd/drm2/dist/drm/radeon/radeon_fence.c: 1.6-1.8
sys/external/bsd/drm2/dist/drm/radeon/radeon_pm.c: 1.3
sys/external/bsd/drm2/dist/drm/radeon/rs400.c: 1.3
sys/external/bsd/drm2/dist/drm/via/via_dmablit.c: 1.3, 1.4
sys/external/bsd/drm2/dist/drm/via/via_drv.h: 1.3
sys/external/bsd/drm2/dist/drm/via/via_irq.c: 1.3, 1.4
sys/external/bsd/drm2/dist/drm/via/via_video.c: 1.3, 1.4
sys/external/bsd/drm2/dist/include/drm/drmP.h: 1.10
sys/external/bsd/drm2/dist/include/drm/drm_crtc.h: 1.4
sys/external/bsd/drm2/dist/include/drm/drm_modes.h: 1.3
sys/external/bsd/drm2/dist/uapi/drm/i915_drm.h: 1.2
sys/external/bsd/drm2/drm/drm_cache.c: 1.4-1.6
sys/external/bsd/drm2/drm/drm_drv.c: 1.14
sys/external/bsd/drm2/drm/drm_module.c: 1.10
sys/external/bsd/drm2/drm/drm_sysctl.c: 1.5
sys/external/bsd/drm2/drm/drm_vma_manager.c: 1.2
sys/external/bsd/drm2/drm/drmfb.c: 1.1
sys/external/bsd/drm2/drm/files.drmkms: 1.10, 1.11
sys/external/bsd/drm2/i2c/drm_encoder_slave.c: 1.1
sys/external/bsd/drm2/i915drm/files.i915drmkms: 1.7, 1.10
sys/external/bsd/drm2/i915drm/intelfb.c: 1.11, 1.12
sys/external/bsd/drm2/include/asm/io.h: 1.4
sys/external/bsd/drm2/include/asm/unaligned.h: 1.2, 1.3
sys/external/bsd/drm2/include/drm/drm_encoder_slave.h: 1.1
sys/external/bsd/drm2/include/drm/drm_wait_netbsd.h: 1.7-1.11
sys/external/bsd/drm2/include/drm/drmfb.h: 1.1
sys/external/bsd/drm2/include/drm/drmfb_pci.h: 1.1, 1.2
sys/external/bsd/drm2/include/linux/bitops.h: 1.9
sys/external/bsd/drm2/include/linux/i2c.h: 1.7, 1.8
sys/external/bsd/drm2/include/linux/io-mapping.h: 1.5
sys/external/bsd/drm2/include/linux/moduleparam.h: 1.5
sys/external/bsd/drm2/include/linux/pci.h: 1.12-1.15
sys/external/bsd/drm2/include/linux/pm.h: 1.4
sys/external/bsd/drm2/include/linux/reboot.h: 1.2
sys/external/bsd/drm2/include/linux/slab.h: 1.5
sys/external/bsd/drm2/include/linux/string.h: 1.4
sys/external/bsd/drm2/include/linux/vgaarb.h: 1.3
sys/external/bsd/drm2/include/linux/ww_mutex.h: 1.10
sys/external/bsd/drm2/linux/files.drmkms_linux: 1.8
sys/external/bsd/drm2/linux/linux_i2c.c: 1.3
sys/external/bsd/drm2/linux/linux_ww_mutex.c: 1.1
sys/external/bsd/drm2/nouveau/files.nouveau: 1.5-1.8
sys/external/bsd/drm2/nouveau/nouveau_pci.c: 1.1-1.3
sys/external/bsd/drm2/nouveau/nouveau_pci.h: 1.1
sys/external/bsd/drm2/nouveau/nouveau_sysfs.c: 1.1
sys/external/bsd/drm2/nouveau/nouveau_vga.c: 1.1
sys/external/bsd/drm2/nouveau/nouveaufb.c: 1.1
sys/external/bsd/drm2/nouveau/nouveaufb.h: 1.1
sys/external/bsd/drm2/pci/drm_pci.c: 1.10-1.12
sys/external/bsd/drm2/pci/drm_pci_module.c: 1.4
sys/external/bsd/drm2/pci/drmfb_pci.c: 1.1-1.3
sys/external/bsd/drm2/pci/files.drmkms_pci: 1.5
sys/external/bsd/drm2/radeon/radeon_pci.c: 1.5-1.7
sys/modules/drmkms/Makefile: 1.8, 1.9
sys/modules/drmkms_linux/Makefile: 1.6
sys/modules/drmkms_pci/Makefile: 1.5
sync drm2 with HEAD.
|
| 1.8.18.1 |
| 10-Jun-2019 |
christos | Sync with HEAD
|
| 1.8.16.2 |
| 26-Jan-2019 |
pgoyette | Sync with HEAD
|
| 1.8.16.1 |
| 06-Sep-2018 |
pgoyette | Sync with HEAD
Resolve a couple of conflicts (result of the uimin/uimax changes)
|
| 1.8.10.1 |
| 08-Dec-2021 |
martin | Pull up the following, requested by msaitoh in ticket #1720:
sys/arch/x86/include/specialreg.h 1.146, 1.171,
1.173-1.178 via patch
sys/arch/x86/x86/identcpu.c 1.106, 1.117,
1.122 via patch
sys/arch/x86/x86/pmap.c patch
sys/external/bsd/drm2/drm/drm_cache.c 1.14
usr.sbin/cpuctl/arch/i386.c 1.114-1.117
- Add PT, PKRU, HDC, LA57, PKE, PKS, CET, CET_U, CET_S, HWP, KL,
AVX512_BF16, TME_EN and PCONFIG.
- Rename some macros to match the x86 specification and the other OSes.
- Print CPUID 0x8000008 %ebx on Intel, too.
- Print CPUID leaf 7 subleaf 1.
- Identify Tiger Lake, 3rd gen Xeon Scalable (Ice Lake), Elkhart Lake
and Jasper Lake.
- Remove a few unused MSRs.
- Add comment.
- KNF. Whitespace fix.
|
| 1.13.4.1 |
| 08-Dec-2021 |
martin | Pull up the following revisions, requested by msaitoh in ticket #1391:
sys/arch/x86/include/specialreg.h 1.171, 1.173-1.178
sys/arch/x86/x86/identcpu.c 1.106, 1.117,
1.122 via patch
sys/dev/nvmm/x86/nvmm_x86.c 1.18
sys/external/bsd/drm2/drm/drm_cache.c 1.14
sys/external/bsd/drm2/include/asm/cpufeature.h 1.5
usr.sbin/cpuctl/arch/i386.c 1.114-1.117
- Add LA57, PKE, PKS, CET, CET_U, CET_S, HWP, KL, AVX512_BF16, TME_EN
and PCONFIG.
- Rename some macros to match the x86 specification and the other OSes.
- Print CPUID 0x8000008 %ebx on Intel, too.
- Print CPUID leaf 7 subleaf 1.
- Identify Tiger Lake, 3rd gen Xeon Scalable (Ice Lake), Elkhart Lake
and Jasper Lake.
- Add comment.
- KNF. Whitespace fix.
|
