Defer acquiring the FDE lock until after the allocation. This can avoid
nesting issues between malloc and backtrace when using LSan.

branches: 1.9.16;
Avoid negative shift.

Fix binary search when search value is in the last block, but not equal
to the start of the range. PR 49444.

branches: 1.7.2; 1.7.4; 1.7.6;
Fix braino in last commit and free the node iff the insert failed.

Use static_cast for rb_tree_insert_node void * return value.

branches: 1.5.2; 1.5.4;
GC unwind_info_size.

branches: 1.4.2;
SH3 uses unaligned data in the .eh_frame section, so use memcpy.

Pass down data_base just in case something actually tries to use it.

Add more const to make GCC happy.

Add a heavily modified version of Apple's libunwind as released under
MIT license in libc++abi. At the moment, only x86 support is tested.

branches: 1.1.4; 1.1.6; 1.1.10;
Add a heavily modified version of Apple's libunwind as released under
MIT license in libc++abi. At the moment, only x86 support is tested.

Remove redundant setIP call overwritten a few lines later.

branches: 1.6.18; 1.6.20;
Introduce a separate bit mask for the return address. Use it on HPPA.

branches: 1.5.2; 1.5.4; 1.5.8;
Use the return address register from the CIE. Based on patch from Nick
Kledzik.

Some architectures like SPARC need to apply a fixed offset to the return
address. Introduce such a constant.

branches: 1.3.2;
Rename IP_PSEUDO_REG to RETURN_REG. Fix PPC value. Sort.

GC unused enum.

Add a heavily modified version of Apple's libunwind as released under
MIT license in libc++abi. At the moment, only x86 support is tested.

s/aligment/alignment/ + one more typo fix in comments.

The return address register entry is the DWARF register. On PowerPC,
this is not the same as the internal encoding, since the Link Register
is deliberately non-continous from the other general purpose register
values. To handle this, always translate the value into the internal
format.

branches: 1.5.2; 1.5.4; 1.5.8; 1.5.46;
Missing register validation check.

Use the return address register from the CIE. Based on patch from Nick
Kledzik.

Add initial unwind support for SPARC/SPARC64.

branches: 1.2.2;
0 is a valid LSDA encoding and can be seen in statically linked
programs. Initialize lsdaEncoding to DW_EH_PE_omit and check for that
value to decide whether a value should be decoded.

Add a heavily modified version of Apple's libunwind as released under
MIT license in libc++abi. At the moment, only x86 support is tested.

branches: 1.1.4; 1.1.6; 1.1.10;
Add a heavily modified version of Apple's libunwind as released under
MIT license in libc++abi. At the moment, only x86 support is tested.

Revert unintended commit.

Gah, fix two typos.

Explicitly compile libunwind with vfp3 because gcc-8 defaults to neon
and breaks exceptions.

branches: 1.11.18;
Force FPU support for Clang, don't disable IAS completely.

branches: 1.10.2;
prefer our own unwind.h

branches: 1.9.2; 1.9.4;
IAS is clang specific.

.fpu is not handled correctly by LLVM's assembler parser, so use GAS for
now.

Split COPTS.libunwind.cxx into multiple lines.

remove the build support for GCC 4.1, and any hacks i found for it.

there could still be more -- i only looked for lines matching
both "HAVE_GCC" and "4" as words (grep -w.)

branches: 1.5.2; 1.5.4; 1.5.6;
Allow building with GCC 4.1 by providing <cstdint>

Kill one colon that shouldn't be.

libstdc++ doesn't like me using <cstdint> without requesting C++11, so
just do so.

Fix typo.

Add a heavily modified version of Apple's libunwind as released under
MIT license in libc++abi. At the moment, only x86 support is tested.

libunwind: Drop unused/wrong reg_t typedef for alpha

Fix editing mishap, should fix the build

Teach the LLVM-derived unwinder about the DWARF pseudo-registers defined
by GCC for HPPA to hold the return address where the signal trampoline
will resume. XXX Same treatment is needed for HPPA64, but not done as
part of this commit.

Thanks to thorpej for help with this. (ages ago)

Teach the LLVM-derived unwinder about the DWARF pseudo-registers defined
by GCC for SuperH for GBR, MACH, MACL, and SR.

Gah, fix two typos.

Teach the LLVM-derived unwinder about the DWARF pseudo-register defined
by GCC for AArch64 to hold the return address where the signal trampoline
will resume.

Teach the LLVM-derived unwinder about the alternate DWARF pseudo-register
that GCC defines for the PC / return address. This is simply an alias for
the same internal PC register number.

Teach the LLVM-derived unwinder about the DWARF pseudo-register defined
by GCC for PPC32 to hold the return address where the signal trampoline
will resume, as well as for the CTR and XER registers.

Add parentheses

Teach the LLVM-derived unwinder about the DWARF pseudo-register defined
by GCC for Alpha to hold the return address where the signal trampoline
will resume.

- Teach the LLVM-derived unwinder about the DWARF pseudo-registers defined
by GCC for MIPS64 to hold the MDHI and MDLO registers, as well as the return
address where the signal trampoline will resume.
- In the MIPS64 validFloatVectorRegister(), compare against the internal
register numbers, not the DWARF register numbers.

- Teach the LLVM-derived unwinder about the DWARF pseudo-registers defined
by GCC for MIPS to hold the MDHI and MDLO registers, as well as the return
address where the signal trampoline will resume. XXX Same treatment is
needed for MIPS64, but not done as part of this commit.
- In the MIPS validFloatVectorRegister(), compare against the internal
register numbers, not the DWARF register numbers.

PR toolchain/55837

Stop using enum for flags, as per request from joerg.

#define constants and #undef after use.

PR toolchain/55837

Bump LAST_REGISTER and LAST_RESTORE_REG to REGNO_ARM32_S31 for arm.

There are two numbering schemes for VFPv2 registers: s0-s31 and d0-d15.
The former is used by GCC, and the latter is by LLVM. Since libunwind was
derived from LLVM, it has never supported the former. This results in
crashes for GCC-compiled binaries in exception handler of C++, if it
encounters VFPv2 registers when unwinding frames.

This commit adds support for s0-s31 numbering to libunwind. I choose an
implementation in which VFPv2 registers are ``double-counted'' as s0-s31
AND d0-d15. This does not cause real problems, since the former is only
used by GCC, and the later is by LLVM. That is, different numbering
schemes cannot appear in a same frame. To make sure, assertions are added
in order to check this.

I've confirmed that no regression for ATF both for GCC- and LLVM-compiled
userlands.

PR toolchain/55837

Fix logic error in copyFloatVectorRegister() for arm; copy s0-s31 or
d0-d31, not both.

PR toolchain/55837

Fix pointer arithmetic when copying s0-s31 registers for arm.

PR toolchain/55837

Fix DWARF/internal register numbers of s31 for arm.

PR toolchain/55837

copyFloatVectorRegister(): Assert register number is valid to make sure.

PR toolchain/55837

Misc style fixes for clarity:

- Rename lazyVFP1() and lazyVFP3() to lazyVFPv2() and lazyVFPv3(),
respectively. Note that VFPv1 was obsoleted and replaced by VFPv2.

- Introduce enum for flags.

- Add few comments.

No functional changes.

branches: 1.21.4; 1.21.6;
Redo the aarch64 support in libunwind. This included a number of bugs
starting from returning the wrong value from the constructor to
completely bogus offset computations. Drop the ELR support for now.

branches: 1.20.18;
GCC 5.3 likes to emit unwind data with float registers, i.e. register
halfs. Compensate.

branches: 1.19.2; 1.19.12;
Introduce a separate bit mask for the return address. Use it on HPPA.

Add OR1K support

branches: 1.17.4;
Changes to existing files to enable building AARCH64 userland.
evbarm64-el
This is clang only. While gcc4.8 supports aarch64, no netbsd support has
been written for aarch64 with gcc4.8.

branches: 1.16.2; 1.16.4;
Support DWARFish unwind for ARM.

Use the return address register from the CIE. Based on patch from Nick
Kledzik.

Add initial unwind support for MIPS and MIPS64.

Basic unwind support for HPPA.

Add basic Alpha support to libunwind.

Add initial unwind support for SPARC/SPARC64.

Some architectures like SPARC need to apply a fixed offset to the return
address. Introduce such a constant.

Move definition of what the native register layout is into
Registers.hpp.

branches: 1.8.2;
Support SH3 in our unwinder.

Save & restore FP registers.

Add m68k support to our unwinder.

Add basic unwind support for VAX. PSW handling and stack pointer after
resume is still incomplete.

Add a dummy element as explicit padding for PPC32. Fix DWARF enumeration
to match the values created by GCC. Fix DWARFish -> index conversion.

Rename IP_PSEUDO_REG to RETURN_REG. Fix PPC value. Sort.

Add support for non-EABI (DWARF) ARM exception handling.

Add a heavily modified version of Apple's libunwind as released under
MIT license in libc++abi. At the moment, only x86 support is tested.

The semantics of DW_CFA_GNU_args_size have changed subtile over the
years. Adopt the new convention that it is call-site specific and that
it should be applied before moving the IP by personality routines, but
not during normal unwinding. Further discussion can be found in
LLVM's phabricator review D38680.

branches: 1.3.2; 1.3.4; 1.3.8; 1.3.32; 1.3.34;
GC unwind_info_size.

branches: 1.2.2;
Fix DW_CFA_GNU_args_size handling. The primary architecture using this
opcode is VAX. A function call pushes the number of arguments given onto
the stack and "ret" will pop it automatically. The FDE of the caller
contains the amount of stack space used for arguments (and possibly
extra padding), so unwinding has to compensate for this when "returning"
from a function. This is exactly the case when step() is done. The
existing handling in _Unwind_SetIP no longer makes sense.

Add a heavily modified version of Apple's libunwind as released under
MIT license in libc++abi. At the moment, only x86 support is tested.

branches: 1.1.4; 1.1.6; 1.1.10;
Add a heavily modified version of Apple's libunwind as released under
MIT license in libc++abi. At the moment, only x86 support is tested.

use __builtin_unreachable() after calls that panic or switch context

The semantics of DW_CFA_GNU_args_size have changed subtile over the
years. Adopt the new convention that it is call-site specific and that
it should be applied before moving the IP by personality routines, but
not during normal unwinding. Further discussion can be found in
LLVM's phabricator review D38680.

branches: 1.9.16; 1.9.18;
Provide _Unwind_Find_FDE for libgcc_s compatibility.

branches: 1.8.2; 1.8.4; 1.8.8; 1.8.10;
Move definition of what the native register layout is into
Registers.hpp.

branches: 1.7.2;
Support SH3 in our unwinder.

Add m68k support to our unwinder.

Fix DW_CFA_GNU_args_size handling. The primary architecture using this
opcode is VAX. A function call pushes the number of arguments given onto
the stack and "ret" will pop it automatically. The FDE of the caller
contains the amount of stack space used for arguments (and possibly
extra padding), so unwinding has to compensate for this when "returning"
from a function. This is exactly the case when step() is done. The
existing handling in _Unwind_SetIP no longer makes sense.

Add basic unwind support for VAX. PSW handling and stack pointer after
resume is still incomplete.

Add _Unwind_GetIPInfo for libstdc++.

Add support for non-EABI (DWARF) ARM exception handling.

Add a heavily modified version of Apple's libunwind as released under
MIT license in libc++abi. At the moment, only x86 support is tested.

Provide _Unwind_Find_FDE for libgcc_s compatibility.

branches: 1.2.4; 1.2.6; 1.2.10; 1.2.12;
Add _Unwind_GetIPInfo for libstdc++.

Add a heavily modified version of Apple's libunwind as released under
MIT license in libc++abi. At the moment, only x86 support is tested.

PR toolchain/55837

Fix for jumpto() armeb; use word-wise load for flags, instead of byte-wise one.

PR toolchain/55837

Misc style fixes for clarity:

- Rename lazyVFP1() and lazyVFP3() to lazyVFPv2() and lazyVFPv3(),
respectively. Note that VFPv1 was obsoleted and replaced by VFPv2.

- Introduce enum for flags.

- Add few comments.

No functional changes.

branches: 1.18.4; 1.18.6;
Redo the aarch64 support in libunwind. This included a number of bugs
starting from returning the wrong value from the constructor to
completely bogus offset computations. Drop the ELR support for now.

branches: 1.17.30;
Use ARM_ENTRY since these aren't thumb compatible.

branches: 1.16.2;
Add OR1K support

branches: 1.15.4;
Changes to existing files to enable building AARCH64 userland.
evbarm64-el
This is clang only. While gcc4.8 supports aarch64, no netbsd support has
been written for aarch64 with gcc4.8.

branches: 1.14.2; 1.14.4;
Lazy VFP processing works a lot better if the functions contain a return
instruction.

Support DWARFish unwind for ARM.

Add initial unwind support for MIPS and MIPS64.

Basic unwind support for HPPA.

Add basic Alpha support to libunwind.

Add initial unwind support for SPARC/SPARC64.

branches: 1.8.2;
Support SH3 in our unwinder.

Save & restore FP registers.

Add m68k support to our unwinder.

Drop XXX, spell R14 as SP.

Add basic unwind support for VAX. PSW handling and stack pointer after
resume is still incomplete.

Add a dummy element as explicit padding for PPC32. Fix DWARF enumeration
to match the values created by GCC. Fix DWARFish -> index conversion.

Add support for non-EABI (DWARF) ARM exception handling.

Add a heavily modified version of Apple's libunwind as released under
MIT license in libc++abi. At the moment, only x86 support is tested.