| History log of /src/sys/modules/nvmm |
| Revision | Date | Author | Comments |
| 1.5 | 05-Aug-2020 |
maxv | Upgrade NVMM to WARNS=5.
|
| 1.4 | 23-Feb-2019 |
maxv | branches: 1.4.4;
Install the x86 RESET state at VCPU creation time, for convenience, so
that the libnvmm users can expect a functional VCPU right away.
|
| 1.3 | 17-Feb-2019 |
rin | Bump default value of WARNS for modules from 3 to 5, and
explicitly set WARNS for modules that fail with WARNS=5.
Also, turn on -Wno-missing-noreturn for clang for some files.
At the moment, among ~ 360 modules,
- 2 (lua and zfs) need WARNS=0
- 1 (solaris) needs WARNS=1
- 136 need WARNS=3 (mostly due to sign-compare)
- 4 need WARNS=4
- others can be compiled with WARNS=5
Discussed on tech-kern.
|
| 1.2 | 13-Feb-2019 |
maxv | Add Intel-VMX support in NVMM. This allows us to run hardware-accelerated
VMs on Intel CPUs. Overall this implementation is fast and reliable, I am
able to run NetBSD VMs with many VCPUs on a quad-core Intel i5.
NVMM-Intel applies several optimizations already present in NVMM-AMD, and
has a code structure similar to it. No change was needed in the NVMM MI
frontend, or in libnvmm.
Some differences exist against AMD:
- On Intel the ASID space is big, so we don't fall back to a shared ASID
when there are more VCPUs executing than available ASIDs in the host,
contrary to AMD. There are enough ASIDs for the maximum number of VCPUs
supported by NVMM.
- On Intel there are two TLBs we need to take care of, one for the host
(EPT) and one for the guest (VPID). Changes in EPT paging flush the
host TLB, changes to the guest mode flush the guest TLB.
- On Intel there is no easy way to set/fetch the VTPR, so we intercept
reads/writes to CR8 and maintain a software TPR, that we give to the
virtualizer as if it was the effective TPR in the guest.
- On Intel, because of SVS, the host CR4 and LSTAR are not static, so
we're forced to save them on each VMENTRY.
- There is extra Intel weirdness we need to take care of, for example the
reserved bits in CR0 and CR4 when accesses trap.
While this implementation is functional and can already run many OSes, we
likely have a problem on 32bit-PAE guests, because they require special
care on Intel CPUs, and currently we don't handle that correctly; such
guests may misbehave for now (without altering the host stability). I
expect to fix that soon.
|
| 1.1 | 07-Nov-2018 |
maxv | branches: 1.1.2;
Add NVMM - for NetBSD Virtual Machine Monitor -, a kernel driver that
provides support for hardware-accelerated virtualization on NetBSD.
It is made of an MI frontend, to which MD backends can be plugged. One
MD backend is implemented, x86-SVM, for x86 AMD CPUs.
We install
/usr/include/dev/nvmm/nvmm.h
/usr/include/dev/nvmm/nvmm_ioctl.h
/usr/include/dev/nvmm/{arch}/nvmm_{arch}.h
And the kernel module. For now, the only architecture where we do that
is amd64 (arch=x86).
NVMM is not enabled by default in amd64-GENERIC, but is instead easily
modloadable.
Sent to tech-kern@ a month ago. Validated with kASan, and optimized
with tprof.
|
| 1.1.2.2 | 26-Nov-2018 |
pgoyette | Sync with HEAD, resolve a couple of conflicts
|
| 1.1.2.1 | 07-Nov-2018 |
pgoyette | file Makefile was added on branch pgoyette-compat on 2018-11-26 01:52:50 +0000
|
| 1.4.4.2 | 10-Jun-2019 |
christos | Sync with HEAD
|
| 1.4.4.1 | 23-Feb-2019 |
christos | file Makefile was added on branch phil-wifi on 2019-06-10 22:09:35 +0000
|
| 1.2 | 25-Jun-2020 |
maxv | Register NVMM as an actual pseudo-device. Without PMF handler, to
explicitly disallow ACPI suspend if NVMM is running.
Should fix PR/55406.
|
| 1.1 | 07-Nov-2018 |
maxv | branches: 1.1.2; 1.1.6; 1.1.8;
Add NVMM - for NetBSD Virtual Machine Monitor -, a kernel driver that
provides support for hardware-accelerated virtualization on NetBSD.
It is made of an MI frontend, to which MD backends can be plugged. One
MD backend is implemented, x86-SVM, for x86 AMD CPUs.
We install
/usr/include/dev/nvmm/nvmm.h
/usr/include/dev/nvmm/nvmm_ioctl.h
/usr/include/dev/nvmm/{arch}/nvmm_{arch}.h
And the kernel module. For now, the only architecture where we do that
is amd64 (arch=x86).
NVMM is not enabled by default in amd64-GENERIC, but is instead easily
modloadable.
Sent to tech-kern@ a month ago. Validated with kASan, and optimized
with tprof.
|
| 1.1.8.1 | 02-Aug-2020 |
martin | Pull up following revision(s) (requested by maxv in ticket #1032):
sys/dev/nvmm/x86/nvmm_x86_vmx.c: revision 1.60 (patch)
sys/dev/nvmm/x86/nvmm_x86_vmx.c: revision 1.61 (patch)
sys/dev/nvmm/nvmm.c: revision 1.30
sys/dev/nvmm/nvmm.c: revision 1.31
sys/dev/nvmm/nvmm.c: revision 1.32
sys/dev/nvmm/nvmm_internal.h: revision 1.15
sys/dev/nvmm/nvmm_internal.h: revision 1.16
sys/dev/nvmm/files.nvmm: revision 1.3
sys/dev/nvmm/x86/nvmm_x86_svm.c: revision 1.62 (patch)
sys/dev/nvmm/x86/nvmm_x86_svm.c: revision 1.63 (patch)
sys/dev/nvmm/x86/nvmm_x86_vmx.c: revision 1.59 (patch)
sys/modules/nvmm/nvmm.ioconf: revision 1.2
Gather the conditions to return from the VCPU loops in nvmm_return_needed(),
and use it in nvmm_do_vcpu_run() as well. This fixes two undesired behaviors:
- When a VM initializes, the many nested page faults that need processing
could cause the calling thread to occupy the CPU too much if we're unlucky
and are only getting repeated nested page faults thousands of times in a
row.
- When the emulator calls nvmm_vcpu_run() and immediately sends a signal to
stop the VCPU, it's better to check signals earlier and leave right away,
rather than doing a round of VCPU run that could increase the time spent
by the emulator waiting for the return.
style
Register NVMM as an actual pseudo-device. Without PMF handler, to
explicitly disallow ACPI suspend if NVMM is running.
Should fix PR/55406.
Print the backend name when attaching.
|
| 1.1.6.2 | 10-Jun-2019 |
christos | Sync with HEAD
|
| 1.1.6.1 | 07-Nov-2018 |
christos | file nvmm.ioconf was added on branch phil-wifi on 2019-06-10 22:09:35 +0000
|
| 1.1.2.2 | 26-Nov-2018 |
pgoyette | Sync with HEAD, resolve a couple of conflicts
|
| 1.1.2.1 | 07-Nov-2018 |
pgoyette | file nvmm.ioconf was added on branch pgoyette-compat on 2018-11-26 01:52:50 +0000
|
