1.2 |
| 21-Apr-2025 |
riastradh | t_signal_and_sp: Fix threadspfunc on mips.
1. Writing branch delay slots requires `.set noreorder'. Got used to reading and writing RISCy code with branch delay slots ages ago, still haven't gotten used to having to tell the assembler `no, I really want you to assemble the instructions I wrote, as I wrote them, and not some other instructions in some other order'.
2. Return value is v0 on mips, not a0 like modern mips^W^Wriscv.
With this, the threadsp test passes on mips.
PR kern/59327: user stack pointer is not aligned properly
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