| History log of /src/tests/sys/crypto/chacha |
| Revision | Date | Author | Comments |
| 1.8 | 05-Sep-2023 |
mrg | apply previous to just GCC.
|
| 1.7 | 05-Sep-2023 |
mrg | apply -Wno-maybe-uninitialized to chacha_sse2.c.
there's a clearly initialised memory region that is claimed as
being maybe uninitialised, and this test-build version of it
triggers it while the normal build doesn't.
|
| 1.6 | 08-Sep-2020 |
jakllsch | Acknowledge clang warning for NEON cipher code on aarch64eb
We've already made the nonportable vector initializations portable; the
code works on aarch64eb.
|
| 1.5 | 17-Aug-2020 |
riastradh | Make the AES and ChaCha NEON tests work in softfloat userland.
(`Softfloat' here refers to the ABI, which of course may be running
on a CPU with NEON.)
|
| 1.4 | 16-Aug-2020 |
martin | Restrict the NEON code to v7hf - the softfloat toolchain does not like
it (nor is it likely to work if there is no FPU present).
|
| 1.3 | 28-Jul-2020 |
riastradh | Implement 4-way vectorization of ChaCha for armv7 NEON.
cgd performance is not as good as I was hoping (~4% improvement over
chacha_ref.c) but it should improve substantially more if we let the
cgd worker thread keep fpu state so we don't have to pay the cost of
isb and zero-the-fpu on every 512-byte cgd block.
|
| 1.2 | 27-Jul-2020 |
riastradh | Enable ChaCha NEON code on armv7 too.
The 4-blocks-at-a-time assembly helper is disabled for now; adapting
it to armv7 is going to be a little annoying with only 16 128-bit
vector registers.
(Should also do a fifth block in the integer registers for 320 bytes
at a time.)
|
| 1.1 | 25-Jul-2020 |
riastradh | Add kernel ChaCha test to exercise all available implementations.
|
| 1.4 | 17-Aug-2020 |
riastradh | Make the AES and ChaCha NEON tests work in softfloat userland.
(`Softfloat' here refers to the ABI, which of course may be running
on a CPU with NEON.)
|
| 1.3 | 27-Jul-2020 |
riastradh | It's __ARM_NEON, not __ARM_NEON__, sometimes, apparently.
|
| 1.2 | 27-Jul-2020 |
riastradh | Enable ChaCha NEON code on armv7 too.
The 4-blocks-at-a-time assembly helper is disabled for now; adapting
it to armv7 is going to be a little annoying with only 16 128-bit
vector registers.
(Should also do a fifth block in the integer registers for 320 bytes
at a time.)
|
| 1.1 | 25-Jul-2020 |
riastradh | Add kernel ChaCha test to exercise all available implementations.
|
