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History log of /src/usr.sbin/tprof
RevisionDateAuthorComments
 1.13 09-Dec-2022  ryo mainly fixes around display.

- use terminfo
- dynamically adjust column widths
- mode can be changed while running
 1.12 01-Dec-2022  ryo add "top" subcommand to tprof(8)
 1.11 01-Dec-2022  ryo split ksyms stuff into ksyms.[ch]
 1.10 17-Nov-2020  rin Support aarch64eb; just works fine.
 1.9 27-Jan-2019  kre Fix merge botch.
 1.8 27-Jan-2019  pgoyette Merge the [pgoyette-compat] branch
 1.7 15-Jul-2018  jmcneill Add ARMv7 support.
 1.6 15-Jul-2018  jmcneill Add ARMv8 support.
 1.5 13-Jul-2018  maxv Merge tpfmt(1) into tprof(8). We want to have access to everything with
only one tool. The code is copied mostly as-is, and the functionality is
available via the "analyze" command.

Eg:
tprof monitor -e llc-misses:k -o myfile.out sleep 20
tprof analyze < myfile.out

Will move soon, I don't like the reading via stdin.
 1.4 13-Jul-2018  maxv Revamp tprof.

Rewrite the Intel backend to use the generic PMC interface, which is
available on all Intel CPUs. Synchronize the AMD backend with the new
interface.

The kernel identifies the PMC interface, and gives its id to userland.
Userland then queries the events itself (via cpuid etc). These events
depend on the PMC interface.

The tprof utility is rewritten to allow the user to choose which event
to count (which was not possible until now, the event was hardcoded in
the backend). The command line format is based on usr.bin/pmc, eg:

tprof -e llc-misses:k -o output sleep 20

The man page is updated too, but the arguments will likely change soon
anyway so it doesn't matter a lot.

The tprof utility has three tables:

Intel Architectural Version 1
Intel Skylake/Kabylake
AMD Family 10h

A CPU can support a combination of tables. For example Kabylake has
Intel-Architectural-Version-1 and its own Intel-Kabylake table.

For now the Intel Skylake/Kabylake table contains only one event, just
to demonstrate that the combination of tables works. Tested on an
Intel Core i5 Kabylake.

The code for AMD Family 10h is taken from the code I had written for
usr.bin/pmc. I haven't tested it yet, but it's the same as pmc(1), so
I guess it works as-is.

The whole thing is written in such a way that (I think) it is not
complicated to add more CPU models, and more architectures (other than
x86).
 1.3 26-Nov-2011  yamt branches: 1.3.38; 1.3.40;
man page
 1.2 22-Apr-2009  lukem branches: 1.2.6;
Enable WARNS=4 by default, except for:
cpuctl dumplfs hprop ipf iprop-log kadmin kcm kdc kdigest
kimpersonate kstash ktutil makefs ndbootd ntp pppd quot
racoon racoonctl rtadvd sntp sup tcpdchk tcpdmatch tcpdump
traceroute traceroute6 user veriexecgen wsmoused zic
(Mostly third-party applications)
 1.1 01-Jan-2008  yamt branches: 1.1.2; 1.1.14;
a dumb program to talk with the tprof driver.
 1.1.14.1 13-May-2009  jym Sync with HEAD.

Third (and last) commit. See http://mail-index.netbsd.org/source-changes/2009/05/13/msg221222.html
 1.1.2.2 09-Jan-2008  matt sync with HEAD
 1.1.2.1 01-Jan-2008  matt file Makefile was added on branch matt-armv6 on 2008-01-09 02:02:33 +0000
 1.2.6.1 17-Apr-2012  yamt sync with head
 1.3.40.1 10-Jun-2019  christos Sync with HEAD
 1.3.38.1 28-Jul-2018  pgoyette Sync with HEAD
 1.10 13-Jul-2018  maxv Revamp tprof.

Rewrite the Intel backend to use the generic PMC interface, which is
available on all Intel CPUs. Synchronize the AMD backend with the new
interface.

The kernel identifies the PMC interface, and gives its id to userland.
Userland then queries the events itself (via cpuid etc). These events
depend on the PMC interface.

The tprof utility is rewritten to allow the user to choose which event
to count (which was not possible until now, the event was hardcoded in
the backend). The command line format is based on usr.bin/pmc, eg:

tprof -e llc-misses:k -o output sleep 20

The man page is updated too, but the arguments will likely change soon
anyway so it doesn't matter a lot.

The tprof utility has three tables:

Intel Architectural Version 1
Intel Skylake/Kabylake
AMD Family 10h

A CPU can support a combination of tables. For example Kabylake has
Intel-Architectural-Version-1 and its own Intel-Kabylake table.

For now the Intel Skylake/Kabylake table contains only one event, just
to demonstrate that the combination of tables works. Tested on an
Intel Core i5 Kabylake.

The code for AMD Family 10h is taken from the code I had written for
usr.bin/pmc. I haven't tested it yet, but it's the same as pmc(1), so
I guess it works as-is.

The whole thing is written in such a way that (I think) it is not
complicated to add more CPU models, and more architectures (other than
x86).
 1.9 30-Jan-2008  ad branches: 1.9.66; 1.9.68;
Expunge references to lockmgr.
 1.8 14-Jan-2008  yamt whitespace
 1.7 14-Jan-2008  yamt add a script to produce something like opannotate.
 1.6 14-Jan-2008  yamt rename fmt.sh to tpfmt.sh
 1.5 05-Jan-2008  yamt branches: 1.5.2;
mention SIZEOF_PTR
 1.4 05-Jan-2008  yamt PR/37662 was fixed.
 1.3 02-Jan-2008  yamt note what's sampled.
 1.2 02-Jan-2008  yamt explain the output of fmt.sh
 1.1 01-Jan-2008  yamt minimum documentation.
 1.5.2.3 23-Mar-2008  matt sync with HEAD
 1.5.2.2 09-Jan-2008  matt sync with HEAD
 1.5.2.1 05-Jan-2008  matt file README was added on branch matt-armv6 on 2008-01-09 02:02:34 +0000
 1.9.68.1 10-Jun-2019  christos Sync with HEAD
 1.9.66.1 28-Jul-2018  pgoyette Sync with HEAD
 1.4 14-Jan-2008  yamt rename fmt.sh to tpfmt.sh
 1.3 03-Jan-2008  yamt branches: 1.3.2;
use the SIZEOF_PTR environment variable if set.
 1.2 01-Jan-2008  yamt comment a usage.
 1.1 01-Jan-2008  yamt a dumb formatter for tprof. should be rewritten.
 1.3.2.3 23-Mar-2008  matt sync with HEAD
 1.3.2.2 09-Jan-2008  matt sync with HEAD
 1.3.2.1 03-Jan-2008  matt file fmt.sh was added on branch matt-armv6 on 2008-01-09 02:02:34 +0000
 1.3 01-Apr-2024  riastradh elftoolchain: Be consistent about which ELF header files we use.

1. For tools that use elftoolchain: always use elftoolchain's
elfdefinitions.h. Don't even think about looking at the host's
sys/exec_elf.h, which makes no sense and should never happen.

(ELF tools that don't use elftoolchain, like m68k-elf2coff,
continue to use nbincludes/sys/exec_elf.h. But no more nbincludes
hacks in elftoolchain.)

2. For kernel components (solaris, zfs, dtrace): always use
sys/exec_elf.h, even in Solaris components via sys/elf.h.
elfdefinitions.h is not wired up in the kernel build at all.

3. For most userland components that involve libelf: use
elfdefinitions.h via libelf header files (libelf.h, gelf.h).

libdtrace in particular requires _all_ R_* reloc type definitions,
but sys/exec_elf.h brings in only the _current machine's_ R_*
reloc type definitions. (While here: Use uintptr_t instead of
Elf_Addr for pointer-to-integer cast, since Elf_Addr is MD and
provided only by sys/exec_elf.h, not by elfdefinitions.h.)

And most userland components using libelf don't rely on any
properties of the current machine from sys/exec_elf.h, so they can
use libelf's elfdefinition.h.

Exceptions:

- dtrace drti.c relies on link.h -> link_elf.h -> sys/exec_elf.h,
but it also relies on sys/dtrace.h -> sys/elf.h ->
elfdefinitions.h like other userland components using sys/elf.h.

- kdump-ioctl.c uses sys/exec_elf.h directly and sys/dtrace.h ->
sys/elf.h -> elfdefinitions like other userland components using
sys/elf.h.

- t_ptrace_wait.c (via t_ptrace_core_wait.h) uses libelf to parse
core files, but relies on sys/exec_elf.h for struct
netbsd_elfcore_procinfo.

None of these exceptions needs all R_* reloc type definitions, so
as a workaround, we can just suppress libelf's elfdefinitions.h by
defining _SYS_ELFDEFINITIONS_H_ and use sys/exec_elf.h in these
exceptions.

And undo the whole BUILTIN_ELF_HEADERS mistake. This was:

- half bogus workarounds for missing build_install dependencies in
tools/Makefile, which are no longer missing now, and
- half futile attempt to use src/sys/sys/exec_elf.h via nbincludes in
tools involving libelf instead of libelf's elfdefinitions.h, which
collides.

Longer-term, we may wish to unify sys/exec_elf.h and libelf's
elfdefinitions.h, so we don't have to play these games.

But at least now the games are limited to three .c files (one of
which is generated by Makefile.ioctl-c), rather than haphazardly
applied tree-wide by monstrous kludges in widely used .h files with
broken hackarounds to get the tools build lurching to completion.
 1.2 01-Dec-2022  ryo add "top" subcommand to tprof(8)
 1.1 01-Dec-2022  ryo split ksyms stuff into ksyms.[ch]
 1.2 01-Dec-2022  ryo add "top" subcommand to tprof(8)
 1.1 01-Dec-2022  ryo split ksyms stuff into ksyms.[ch]
 1.3 13-Jul-2018  maxv Revamp tprof.

Rewrite the Intel backend to use the generic PMC interface, which is
available on all Intel CPUs. Synchronize the AMD backend with the new
interface.

The kernel identifies the PMC interface, and gives its id to userland.
Userland then queries the events itself (via cpuid etc). These events
depend on the PMC interface.

The tprof utility is rewritten to allow the user to choose which event
to count (which was not possible until now, the event was hardcoded in
the backend). The command line format is based on usr.bin/pmc, eg:

tprof -e llc-misses:k -o output sleep 20

The man page is updated too, but the arguments will likely change soon
anyway so it doesn't matter a lot.

The tprof utility has three tables:

Intel Architectural Version 1
Intel Skylake/Kabylake
AMD Family 10h

A CPU can support a combination of tables. For example Kabylake has
Intel-Architectural-Version-1 and its own Intel-Kabylake table.

For now the Intel Skylake/Kabylake table contains only one event, just
to demonstrate that the combination of tables works. Tested on an
Intel Core i5 Kabylake.

The code for AMD Family 10h is taken from the code I had written for
usr.bin/pmc. I haven't tested it yet, but it's the same as pmc(1), so
I guess it works as-is.

The whole thing is written in such a way that (I think) it is not
complicated to add more CPU models, and more architectures (other than
x86).
 1.2 14-Jan-2008  yamt branches: 1.2.4; 1.2.68; 1.2.70;
update comments
 1.1 14-Jan-2008  yamt add a script to produce something like opannotate.
 1.2.70.1 10-Jun-2019  christos Sync with HEAD
 1.2.68.1 28-Jul-2018  pgoyette Sync with HEAD
 1.2.4.2 23-Mar-2008  matt sync with HEAD
 1.2.4.1 14-Jan-2008  matt file tpann.sh was added on branch matt-armv6 on 2008-03-23 00:50:08 +0000
 1.4 13-Jul-2018  maxv Revamp tprof.

Rewrite the Intel backend to use the generic PMC interface, which is
available on all Intel CPUs. Synchronize the AMD backend with the new
interface.

The kernel identifies the PMC interface, and gives its id to userland.
Userland then queries the events itself (via cpuid etc). These events
depend on the PMC interface.

The tprof utility is rewritten to allow the user to choose which event
to count (which was not possible until now, the event was hardcoded in
the backend). The command line format is based on usr.bin/pmc, eg:

tprof -e llc-misses:k -o output sleep 20

The man page is updated too, but the arguments will likely change soon
anyway so it doesn't matter a lot.

The tprof utility has three tables:

Intel Architectural Version 1
Intel Skylake/Kabylake
AMD Family 10h

A CPU can support a combination of tables. For example Kabylake has
Intel-Architectural-Version-1 and its own Intel-Kabylake table.

For now the Intel Skylake/Kabylake table contains only one event, just
to demonstrate that the combination of tables works. Tested on an
Intel Core i5 Kabylake.

The code for AMD Family 10h is taken from the code I had written for
usr.bin/pmc. I haven't tested it yet, but it's the same as pmc(1), so
I guess it works as-is.

The whole thing is written in such a way that (I think) it is not
complicated to add more CPU models, and more architectures (other than
x86).
 1.3 13-Oct-2009  yamt branches: 1.3.44; 1.3.46;
deal with the output of new objdump.
 1.2 14-Jan-2008  yamt branches: 1.2.4;
update comments
 1.1 14-Jan-2008  yamt rename fmt.sh to tpfmt.sh
 1.2.4.2 23-Mar-2008  matt sync with HEAD
 1.2.4.1 14-Jan-2008  matt file tpfmt.sh was added on branch matt-armv6 on 2008-03-23 00:50:08 +0000
 1.3.46.1 10-Jun-2019  christos Sync with HEAD
 1.3.44.1 28-Jul-2018  pgoyette Sync with HEAD
 1.30 18-Apr-2023  gutteridge tprof.8: fix typo, s/speficied/specified/
 1.29 17-Apr-2023  uwe tprof(8): fix markup nits
 1.28 17-Apr-2023  gutteridge tprof.8: new sentence, new line
 1.27 17-Apr-2023  msaitoh Use the default counter if -e argument is not specified.

monitor command:
The default counter is selected if -e argument is not specified.
list command:
Print the name of the default counter for monitor and top command.
 1.26 17-Apr-2023  msaitoh Add two note to the tprof(8)'s manual page.

- "list" command prints the maximum number of counters that can be used
simultaneously.
- multiple -e arguments can be specified.
 1.25 10-Apr-2023  msaitoh Add Cometlake support.
 1.24 16-Dec-2022  ryo branches: 1.24.2;
the "scale" option can be specified in the event name even in "tprof monitor"
 1.23 16-Dec-2022  ryo - added 'c' command to tprof-top to show/hide event counter.
- column widths were not calculated correctly and sometimes displayed incorrectly.
- use putp() for terminfo str.
- fix build error with llvm.
 1.22 09-Dec-2022  ryo supported AMD family added
 1.21 09-Dec-2022  ryo mainly fixes around display.

- use terminfo
- dynamically adjust column widths
- mode can be changed while running
 1.20 09-Dec-2022  ryo add accumulative mode. "tprof top -a"
 1.19 01-Dec-2022  ryo add "top" subcommand to tprof(8)
 1.18 01-Dec-2022  ryo Improve tprof(8)

- Added "tprof count" subcommand to perform counts only.
- Event options (u,k) are now optional. The default value is both userland and kernel. (:uk)
- Event counters can be displayed with SIGINFO during `tprof monitor' or `tprof count'.
 1.17 01-Dec-2022  ryo Improve tprof(4)

- Multiple events can now be handled simultaneously.
- Counters should be configured with TPROF_IOC_CONFIGURE_EVENT in advance,
instead of being configured at TPROF_IOC_START.
- The configured counters can be started and stopped repeatedly by
PROF_IOC_START/TPROF_IOC_STOP.
- The value of the performance counter can be obtained at any timing as a 64bit
value with TPROF_IOC_GETCOUNTS.
- Backend common parts are handled in tprof.c as much as possible, and functions
on the tprof_backend side have been reimplemented to be more primitive.
- The reset value of counter overflows for profiling can now be adjusted.
It is calculated by default from the CPU clock (speed of cycle counter) and
TPROF_HZ, but for some events the value may be too large to be sufficient for
profiling. The event counter can be specified as a ratio to the default or as
an absolute value when configuring the event counter.
- Due to overall changes, API and ABI have been changed. TPROF_VERSION and
TPROF_BACKEND_VERSION were updated.
 1.16 25-May-2022  msaitoh Add note about tprof(4) for people like me who forget to load tprof_x86.
 1.15 11-Oct-2019  jmcneill Add AMD Family 15h to supported model list
 1.14 29-May-2019  maxv branches: 1.14.2;
Add support for AMD Family 17h.
 1.13 26-Nov-2018  knakahara tprof: Add goldmont plus support. Tested by msaitoh@n.o, thanks.
 1.12 26-Nov-2018  knakahara tprof: Add goldmont support.

I tested on Atom C3558 (Denverton).
 1.11 20-Nov-2018  maxv Note support for Intel Silvermont/Airmont.
 1.10 24-Jul-2018  maxv Add a "support" section.
 1.9 18-Jul-2018  wiz Various improvements to man page. Sync usage.
 1.8 13-Jul-2018  maxv Ask for a file path with the "analyze" command, instead of reading stdin.
 1.7 13-Jul-2018  maxv Remove tpfmt(1). Its code was merged into tprof(8).
 1.6 13-Jul-2018  maxv Merge tpfmt(1) into tprof(8). We want to have access to everything with
only one tool. The code is copied mostly as-is, and the functionality is
available via the "analyze" command.

Eg:
tprof monitor -e llc-misses:k -o myfile.out sleep 20
tprof analyze < myfile.out

Will move soon, I don't like the reading via stdin.
 1.5 13-Jul-2018  maxv Change the arguments of the tprof tool, to match the behavior of pmc(1) and
cpuctl(8). They become:

tprof list
tprof monitor -e name:option [-o outfile] command
 1.4 13-Jul-2018  maxv Revamp tprof.

Rewrite the Intel backend to use the generic PMC interface, which is
available on all Intel CPUs. Synchronize the AMD backend with the new
interface.

The kernel identifies the PMC interface, and gives its id to userland.
Userland then queries the events itself (via cpuid etc). These events
depend on the PMC interface.

The tprof utility is rewritten to allow the user to choose which event
to count (which was not possible until now, the event was hardcoded in
the backend). The command line format is based on usr.bin/pmc, eg:

tprof -e llc-misses:k -o output sleep 20

The man page is updated too, but the arguments will likely change soon
anyway so it doesn't matter a lot.

The tprof utility has three tables:

Intel Architectural Version 1
Intel Skylake/Kabylake
AMD Family 10h

A CPU can support a combination of tables. For example Kabylake has
Intel-Architectural-Version-1 and its own Intel-Kabylake table.

For now the Intel Skylake/Kabylake table contains only one event, just
to demonstrate that the combination of tables works. Tested on an
Intel Core i5 Kabylake.

The code for AMD Family 10h is taken from the code I had written for
usr.bin/pmc. I haven't tested it yet, but it's the same as pmc(1), so
I guess it works as-is.

The whole thing is written in such a way that (I think) it is not
complicated to add more CPU models, and more architectures (other than
x86).
 1.3 09-Dec-2011  yamt branches: 1.3.4; 1.3.40; 1.3.42;
- add a CAVEATS
- fix a warning
 1.2 26-Nov-2011  wiz Improve wording, sort sections, remove ls(1) escapee.
 1.1 26-Nov-2011  yamt man page
 1.3.42.2 13-Apr-2020  martin Mostly merge changes from HEAD upto 20200411
 1.3.42.1 10-Jun-2019  christos Sync with HEAD
 1.3.40.3 26-Dec-2018  pgoyette Sync with HEAD, resolve a few conflicts
 1.3.40.2 26-Nov-2018  pgoyette Sync with HEAD, resolve a couple of conflicts
 1.3.40.1 28-Jul-2018  pgoyette Sync with HEAD
 1.3.4.2 17-Apr-2012  yamt sync with head
 1.3.4.1 09-Dec-2011  yamt file tprof.8 was added on branch yamt-pagecache on 2012-04-17 00:09:54 +0000
 1.14.2.2 01-Aug-2023  martin Pull up the following revisions, requested by msaitoh in ticket #1697:

usr.sbin/tprof/tprof.8 1.16,1.22,1.25,1.29 via patch
usr.sbin/tprof/tprof_analyze.c 1.4
usr.sbin/tprof/arch/tprof_x86.c 1.13-1.19
sys/dev/tprof/tprof.c 1.23 via patch
sys/dev/tprof/tprof_x86_amd.c 1.7-1.8 via patch
sys/dev/tprof/tprof_x86_intel.c 1.8 via patch

- Add AMD family 19h (zen3 and zen4) support.
- Add Intel Comet Lake support.
- Add support for Intel Skylake-X and Cascade Lake.
- Print the path that we failed to open on error.
- Use lowercase consistently for hexadecimal numbers.
- KNF
 1.14.2.1 12-Oct-2019  martin Pull up following revision(s) (requested by jmcneill in ticket #301):

usr.sbin/tprof/tprof.8: revision 1.15
sys/dev/tprof/tprof_x86_amd.c: revision 1.5
usr.sbin/tprof/arch/tprof_x86.c: revision 1.9

Match Family 15h

-

Add support for AMD Family 15h

-

Add AMD Family 15h to supported model list
 1.24.2.1 21-Jun-2023  martin Pull up following revision(s) (requested by msaitoh in ticket #210):

usr.sbin/tprof/tprof.8: revision 1.30
sys/dev/tprof/tprof_x86_amd.c: revision 1.8
sys/dev/tprof/tprof_armv8.c: revision 1.20
sys/dev/tprof/tprof_types.h: revision 1.7
sys/dev/tprof/tprof_x86_intel.c: revision 1.6
sys/dev/tprof/tprof_x86_intel.c: revision 1.7
sys/dev/tprof/tprof_x86_intel.c: revision 1.8
sys/dev/tprof/tprof.c: revision 1.23
usr.sbin/tprof/tprof.8: revision 1.25
usr.sbin/tprof/tprof.8: revision 1.26
usr.sbin/tprof/arch/tprof_x86.c: revision 1.16
usr.sbin/tprof/tprof.8: revision 1.27
usr.sbin/tprof/arch/tprof_x86.c: revision 1.17
usr.sbin/tprof/tprof.8: revision 1.28
usr.sbin/tprof/tprof.h: revision 1.5
usr.sbin/tprof/tprof.8: revision 1.29
sys/dev/tprof/tprof_armv7.c: revision 1.13
usr.sbin/tprof/tprof_top.c: revision 1.9
usr.sbin/tprof/tprof.c: revision 1.21

Add Cometlake support.

Obtain the number of general counters from CPUID 0xa.

Test cpuid_level in tprof_intel_ncounters().
This function is called before tprof_intel_ident().

KNF. No functional change.

Add two note to the tprof(8)'s manual page.
- "list" command prints the maximum number of counters that can be used
simultaneously.
- multiple -e arguments can be specified.

Use the default counter if -e argument is not specified.
monitor command:
The default counter is selected if -e argument is not specified.
list command:
Print the name of the default counter for monitor and top command.

tprof.8: new sentence, new line

tprof(8): fix markup nits

tprof.8: fix typo, s/speficied/specified/
 1.21 17-Apr-2023  msaitoh Use the default counter if -e argument is not specified.

monitor command:
The default counter is selected if -e argument is not specified.
list command:
Print the name of the default counter for monitor and top command.
 1.20 26-Dec-2022  ryo fixed parsing of event options.
if event option was specivied, it was stuck in a busy loop.
 1.19 26-Dec-2022  ryoon Reflect recent new options for top operation, add a and c
 1.18 16-Dec-2022  ryo branches: 1.18.2;
the "scale" option can be specified in the event name even in "tprof monitor"
 1.17 05-Dec-2022  ryo fix build error with llvm
 1.16 01-Dec-2022  ryo add "top" subcommand to tprof(8)
 1.15 01-Dec-2022  ryo Improve tprof(8)

- Added "tprof count" subcommand to perform counts only.
- Event options (u,k) are now optional. The default value is both userland and kernel. (:uk)
- Event counters can be displayed with SIGINFO during `tprof monitor' or `tprof count'.
 1.14 01-Dec-2022  ryo Improve tprof(4)

- Multiple events can now be handled simultaneously.
- Counters should be configured with TPROF_IOC_CONFIGURE_EVENT in advance,
instead of being configured at TPROF_IOC_START.
- The configured counters can be started and stopped repeatedly by
PROF_IOC_START/TPROF_IOC_STOP.
- The value of the performance counter can be obtained at any timing as a 64bit
value with TPROF_IOC_GETCOUNTS.
- Backend common parts are handled in tprof.c as much as possible, and functions
on the tprof_backend side have been reimplemented to be more primitive.
- The reset value of counter overflows for profiling can now be adjusted.
It is calculated by default from the CPU clock (speed of cycle counter) and
TPROF_HZ, but for some events the value may be too large to be sufficient for
profiling. The event counter can be specified as a ratio to the default or as
an absolute value when configuring the event counter.
- Due to overall changes, API and ABI have been changed. TPROF_VERSION and
TPROF_BACKEND_VERSION were updated.
 1.13 24-Jul-2018  maxv Use errx, there is no errno.
 1.12 18-Jul-2018  wiz Various improvements to man page. Sync usage.
 1.11 14-Jul-2018  jmcneill Fix a crash when running tprof with no arguments; check argc before accessing argv[0]
 1.10 13-Jul-2018  joerg Mark tprof_monitor as dead
 1.9 13-Jul-2018  maxv Ask for a file path with the "analyze" command, instead of reading stdin.
 1.8 13-Jul-2018  maxv Merge tpfmt(1) into tprof(8). We want to have access to everything with
only one tool. The code is copied mostly as-is, and the functionality is
available via the "analyze" command.

Eg:
tprof monitor -e llc-misses:k -o myfile.out sleep 20
tprof analyze < myfile.out

Will move soon, I don't like the reading via stdin.
 1.7 13-Jul-2018  maxv Change the arguments of the tprof tool, to match the behavior of pmc(1) and
cpuctl(8). They become:

tprof list
tprof monitor -e name:option [-o outfile] command
 1.6 13-Jul-2018  maxv Revamp tprof.

Rewrite the Intel backend to use the generic PMC interface, which is
available on all Intel CPUs. Synchronize the AMD backend with the new
interface.

The kernel identifies the PMC interface, and gives its id to userland.
Userland then queries the events itself (via cpuid etc). These events
depend on the PMC interface.

The tprof utility is rewritten to allow the user to choose which event
to count (which was not possible until now, the event was hardcoded in
the backend). The command line format is based on usr.bin/pmc, eg:

tprof -e llc-misses:k -o output sleep 20

The man page is updated too, but the arguments will likely change soon
anyway so it doesn't matter a lot.

The tprof utility has three tables:

Intel Architectural Version 1
Intel Skylake/Kabylake
AMD Family 10h

A CPU can support a combination of tables. For example Kabylake has
Intel-Architectural-Version-1 and its own Intel-Kabylake table.

For now the Intel Skylake/Kabylake table contains only one event, just
to demonstrate that the combination of tables works. Tested on an
Intel Core i5 Kabylake.

The code for AMD Family 10h is taken from the code I had written for
usr.bin/pmc. I haven't tested it yet, but it's the same as pmc(1), so
I guess it works as-is.

The whole thing is written in such a way that (I think) it is not
complicated to add more CPU models, and more architectures (other than
x86).
 1.5 10-Jan-2012  joerg branches: 1.5.38; 1.5.40;
Use __dead
 1.4 26-Jan-2009  yamt branches: 1.4.8;
fix an error message.
 1.3 03-Jan-2009  yamt fix exit status values.
 1.2 03-Jan-2008  yamt branches: 1.2.2;
usage: be a little more understandable.
 1.1 01-Jan-2008  yamt a dumb program to talk with the tprof driver.
 1.2.2.2 09-Jan-2008  matt sync with HEAD
 1.2.2.1 03-Jan-2008  matt file tprof.c was added on branch matt-armv6 on 2008-01-09 02:02:35 +0000
 1.4.8.1 17-Apr-2012  yamt sync with head
 1.5.40.1 10-Jun-2019  christos Sync with HEAD
 1.5.38.1 28-Jul-2018  pgoyette Sync with HEAD
 1.18.2.2 21-Jun-2023  martin Pull up following revision(s) (requested by msaitoh in ticket #210):

usr.sbin/tprof/tprof.8: revision 1.30
sys/dev/tprof/tprof_x86_amd.c: revision 1.8
sys/dev/tprof/tprof_armv8.c: revision 1.20
sys/dev/tprof/tprof_types.h: revision 1.7
sys/dev/tprof/tprof_x86_intel.c: revision 1.6
sys/dev/tprof/tprof_x86_intel.c: revision 1.7
sys/dev/tprof/tprof_x86_intel.c: revision 1.8
sys/dev/tprof/tprof.c: revision 1.23
usr.sbin/tprof/tprof.8: revision 1.25
usr.sbin/tprof/tprof.8: revision 1.26
usr.sbin/tprof/arch/tprof_x86.c: revision 1.16
usr.sbin/tprof/tprof.8: revision 1.27
usr.sbin/tprof/arch/tprof_x86.c: revision 1.17
usr.sbin/tprof/tprof.8: revision 1.28
usr.sbin/tprof/tprof.h: revision 1.5
usr.sbin/tprof/tprof.8: revision 1.29
sys/dev/tprof/tprof_armv7.c: revision 1.13
usr.sbin/tprof/tprof_top.c: revision 1.9
usr.sbin/tprof/tprof.c: revision 1.21

Add Cometlake support.

Obtain the number of general counters from CPUID 0xa.

Test cpuid_level in tprof_intel_ncounters().
This function is called before tprof_intel_ident().

KNF. No functional change.

Add two note to the tprof(8)'s manual page.
- "list" command prints the maximum number of counters that can be used
simultaneously.
- multiple -e arguments can be specified.

Use the default counter if -e argument is not specified.
monitor command:
The default counter is selected if -e argument is not specified.
list command:
Print the name of the default counter for monitor and top command.

tprof.8: new sentence, new line

tprof(8): fix markup nits

tprof.8: fix typo, s/speficied/specified/
 1.18.2.1 26-Dec-2022  martin Pull up following revision(s) (requested by ryo in ticket #24):

usr.sbin/tprof/tprof.c: revision 1.19
usr.sbin/tprof/tprof.c: revision 1.20

Reflect recent new options for top operation, add a and c

fixed parsing of event options.
if event option was specivied, it was stuck in a busy loop.
 1.5 17-Apr-2023  msaitoh Use the default counter if -e argument is not specified.

monitor command:
The default counter is selected if -e argument is not specified.
list command:
Print the name of the default counter for monitor and top command.
 1.4 16-Dec-2022  ryo branches: 1.4.2;
the "scale" option can be specified in the event name even in "tprof monitor"
 1.3 01-Dec-2022  ryo add "top" subcommand to tprof(8)
 1.2 13-Jul-2018  maxv branches: 1.2.2; 1.2.4;
Merge tpfmt(1) into tprof(8). We want to have access to everything with
only one tool. The code is copied mostly as-is, and the functionality is
available via the "analyze" command.

Eg:
tprof monitor -e llc-misses:k -o myfile.out sleep 20
tprof analyze < myfile.out

Will move soon, I don't like the reading via stdin.
 1.1 13-Jul-2018  maxv Revamp tprof.

Rewrite the Intel backend to use the generic PMC interface, which is
available on all Intel CPUs. Synchronize the AMD backend with the new
interface.

The kernel identifies the PMC interface, and gives its id to userland.
Userland then queries the events itself (via cpuid etc). These events
depend on the PMC interface.

The tprof utility is rewritten to allow the user to choose which event
to count (which was not possible until now, the event was hardcoded in
the backend). The command line format is based on usr.bin/pmc, eg:

tprof -e llc-misses:k -o output sleep 20

The man page is updated too, but the arguments will likely change soon
anyway so it doesn't matter a lot.

The tprof utility has three tables:

Intel Architectural Version 1
Intel Skylake/Kabylake
AMD Family 10h

A CPU can support a combination of tables. For example Kabylake has
Intel-Architectural-Version-1 and its own Intel-Kabylake table.

For now the Intel Skylake/Kabylake table contains only one event, just
to demonstrate that the combination of tables works. Tested on an
Intel Core i5 Kabylake.

The code for AMD Family 10h is taken from the code I had written for
usr.bin/pmc. I haven't tested it yet, but it's the same as pmc(1), so
I guess it works as-is.

The whole thing is written in such a way that (I think) it is not
complicated to add more CPU models, and more architectures (other than
x86).
 1.2.4.2 10-Jun-2019  christos Sync with HEAD
 1.2.4.1 13-Jul-2018  christos file tprof.h was added on branch phil-wifi on 2019-06-10 22:10:43 +0000
 1.2.2.2 28-Jul-2018  pgoyette Sync with HEAD
 1.2.2.1 13-Jul-2018  pgoyette file tprof.h was added on branch pgoyette-compat on 2018-07-28 04:38:15 +0000
 1.4.2.1 21-Jun-2023  martin Pull up following revision(s) (requested by msaitoh in ticket #210):

usr.sbin/tprof/tprof.8: revision 1.30
sys/dev/tprof/tprof_x86_amd.c: revision 1.8
sys/dev/tprof/tprof_armv8.c: revision 1.20
sys/dev/tprof/tprof_types.h: revision 1.7
sys/dev/tprof/tprof_x86_intel.c: revision 1.6
sys/dev/tprof/tprof_x86_intel.c: revision 1.7
sys/dev/tprof/tprof_x86_intel.c: revision 1.8
sys/dev/tprof/tprof.c: revision 1.23
usr.sbin/tprof/tprof.8: revision 1.25
usr.sbin/tprof/tprof.8: revision 1.26
usr.sbin/tprof/arch/tprof_x86.c: revision 1.16
usr.sbin/tprof/tprof.8: revision 1.27
usr.sbin/tprof/arch/tprof_x86.c: revision 1.17
usr.sbin/tprof/tprof.8: revision 1.28
usr.sbin/tprof/tprof.h: revision 1.5
usr.sbin/tprof/tprof.8: revision 1.29
sys/dev/tprof/tprof_armv7.c: revision 1.13
usr.sbin/tprof/tprof_top.c: revision 1.9
usr.sbin/tprof/tprof.c: revision 1.21

Add Cometlake support.

Obtain the number of general counters from CPUID 0xa.

Test cpuid_level in tprof_intel_ncounters().
This function is called before tprof_intel_ident().

KNF. No functional change.

Add two note to the tprof(8)'s manual page.
- "list" command prints the maximum number of counters that can be used
simultaneously.
- multiple -e arguments can be specified.

Use the default counter if -e argument is not specified.
monitor command:
The default counter is selected if -e argument is not specified.
list command:
Print the name of the default counter for monitor and top command.

tprof.8: new sentence, new line

tprof(8): fix markup nits

tprof.8: fix typo, s/speficied/specified/
 1.9 03-Nov-2024  rillig sbin, usr.bin, usr.sbin: remove redundant getopt declarations

No binary change, except for assertion line numbers in tprof.
 1.8 01-Dec-2022  ryo branches: 1.8.4;
add "top" subcommand to tprof(8)
 1.7 01-Dec-2022  ryo split ksyms stuff into ksyms.[ch]
 1.6 01-Dec-2022  ryo Improve tprof(4)

- Multiple events can now be handled simultaneously.
- Counters should be configured with TPROF_IOC_CONFIGURE_EVENT in advance,
instead of being configured at TPROF_IOC_START.
- The configured counters can be started and stopped repeatedly by
PROF_IOC_START/TPROF_IOC_STOP.
- The value of the performance counter can be obtained at any timing as a 64bit
value with TPROF_IOC_GETCOUNTS.
- Backend common parts are handled in tprof.c as much as possible, and functions
on the tprof_backend side have been reimplemented to be more primitive.
- The reset value of counter overflows for profiling can now be adjusted.
It is calculated by default from the CPU clock (speed of cycle counter) and
TPROF_HZ, but for some events the value may be too large to be sufficient for
profiling. The event counter can be specified as a ratio to the default or as
an absolute value when configuring the event counter.
- Due to overall changes, API and ABI have been changed. TPROF_VERSION and
TPROF_BACKEND_VERSION were updated.
 1.5 14-Oct-2021  skrll Output alignement - give lwp 6 characters
 1.4 30-Jan-2021  jmcneill Print the path that we failed to open on error
 1.3 14-Jul-2018  maxv branches: 1.3.2; 1.3.4; 1.3.6;
Finish the Skylake/Kabylake table, and improve the output of "tprof analyze".
 1.2 13-Jul-2018  maxv Ask for a file path with the "analyze" command, instead of reading stdin.
 1.1 13-Jul-2018  maxv Merge tpfmt(1) into tprof(8). We want to have access to everything with
only one tool. The code is copied mostly as-is, and the functionality is
available via the "analyze" command.

Eg:
tprof monitor -e llc-misses:k -o myfile.out sleep 20
tprof analyze < myfile.out

Will move soon, I don't like the reading via stdin.
 1.3.6.1 01-Aug-2023  martin Pull up the following revisions, requested by msaitoh in ticket #1697:

usr.sbin/tprof/tprof.8 1.16,1.22,1.25,1.29 via patch
usr.sbin/tprof/tprof_analyze.c 1.4
usr.sbin/tprof/arch/tprof_x86.c 1.13-1.19
sys/dev/tprof/tprof.c 1.23 via patch
sys/dev/tprof/tprof_x86_amd.c 1.7-1.8 via patch
sys/dev/tprof/tprof_x86_intel.c 1.8 via patch

- Add AMD family 19h (zen3 and zen4) support.
- Add Intel Comet Lake support.
- Add support for Intel Skylake-X and Cascade Lake.
- Print the path that we failed to open on error.
- Use lowercase consistently for hexadecimal numbers.
- KNF
 1.3.4.2 10-Jun-2019  christos Sync with HEAD
 1.3.4.1 14-Jul-2018  christos file tprof_analyze.c was added on branch phil-wifi on 2019-06-10 22:10:43 +0000
 1.3.2.2 28-Jul-2018  pgoyette Sync with HEAD
 1.3.2.1 14-Jul-2018  pgoyette file tprof_analyze.c was added on branch pgoyette-compat on 2018-07-28 04:38:15 +0000
 1.8.4.1 02-Aug-2025  perseant Sync with HEAD
 1.11 07-Feb-2024  msaitoh Remove ryo@'s mail addresses.
 1.10 02-Jan-2024  kre This needs <stdbool.h> - it used to come from <sys/rbtree.h> (inappropriately)
but no longer (normally). This should unbreak the builds.
 1.9 17-Apr-2023  msaitoh Use the default counter if -e argument is not specified.

monitor command:
The default counter is selected if -e argument is not specified.
list command:
Print the name of the default counter for monitor and top command.
 1.8 23-Dec-2022  christos use malloc instead of alloca so that SSP works.
 1.7 16-Dec-2022  ryo branches: 1.7.2;
the "scale" option can be specified in the event name even in "tprof monitor"
 1.6 16-Dec-2022  ryo - added 'c' command to tprof-top to show/hide event counter.
- column widths were not calculated correctly and sometimes displayed incorrectly.
- use putp() for terminfo str.
- fix build error with llvm.
 1.5 09-Dec-2022  ryo if column width changes, the screen must be updated.
 1.4 09-Dec-2022  ryo mainly fixes around display.

- use terminfo
- dynamically adjust column widths
- mode can be changed while running
 1.3 09-Dec-2022  ryo add accumulative mode. "tprof top -a"
 1.2 01-Dec-2022  ryo fix build error of printf format
 1.1 01-Dec-2022  ryo add "top" subcommand to tprof(8)
 1.7.2.3 14-Oct-2024  martin Additionally pull up

usr.sbin/tprof/tprof_top.c 1.10

for ticket #952: sys/endian.h: PR 57806 + 57807: fix declaration visibility.

This needs <stdbool.h> - it used to come from <sys/rbtree.h> (inappropriately)
but no longer (normally). This should unbreak the builds.
 1.7.2.2 21-Jun-2023  martin Pull up following revision(s) (requested by msaitoh in ticket #210):

usr.sbin/tprof/tprof.8: revision 1.30
sys/dev/tprof/tprof_x86_amd.c: revision 1.8
sys/dev/tprof/tprof_armv8.c: revision 1.20
sys/dev/tprof/tprof_types.h: revision 1.7
sys/dev/tprof/tprof_x86_intel.c: revision 1.6
sys/dev/tprof/tprof_x86_intel.c: revision 1.7
sys/dev/tprof/tprof_x86_intel.c: revision 1.8
sys/dev/tprof/tprof.c: revision 1.23
usr.sbin/tprof/tprof.8: revision 1.25
usr.sbin/tprof/tprof.8: revision 1.26
usr.sbin/tprof/arch/tprof_x86.c: revision 1.16
usr.sbin/tprof/tprof.8: revision 1.27
usr.sbin/tprof/arch/tprof_x86.c: revision 1.17
usr.sbin/tprof/tprof.8: revision 1.28
usr.sbin/tprof/tprof.h: revision 1.5
usr.sbin/tprof/tprof.8: revision 1.29
sys/dev/tprof/tprof_armv7.c: revision 1.13
usr.sbin/tprof/tprof_top.c: revision 1.9
usr.sbin/tprof/tprof.c: revision 1.21

Add Cometlake support.

Obtain the number of general counters from CPUID 0xa.

Test cpuid_level in tprof_intel_ncounters().
This function is called before tprof_intel_ident().

KNF. No functional change.

Add two note to the tprof(8)'s manual page.
- "list" command prints the maximum number of counters that can be used
simultaneously.
- multiple -e arguments can be specified.

Use the default counter if -e argument is not specified.
monitor command:
The default counter is selected if -e argument is not specified.
list command:
Print the name of the default counter for monitor and top command.

tprof.8: new sentence, new line

tprof(8): fix markup nits

tprof.8: fix typo, s/speficied/specified/
 1.7.2.1 24-Dec-2022  martin Pull up following revision(s) (requested by christos in ticket #22):

usr.sbin/tprof/tprof_top.c: revision 1.8

use malloc instead of alloca so that SSP works.
 1.1 15-Jul-2018  jmcneill branches: 1.1.2; 1.1.4;
Add ARMv7 support.
 1.1.4.2 10-Jun-2019  christos Sync with HEAD
 1.1.4.1 15-Jul-2018  christos file tprof_armv7.c was added on branch phil-wifi on 2019-06-10 22:10:43 +0000
 1.1.2.2 28-Jul-2018  pgoyette Sync with HEAD
 1.1.2.1 15-Jul-2018  pgoyette file tprof_armv7.c was added on branch pgoyette-compat on 2018-07-28 04:38:15 +0000
 1.1 15-Jul-2018  jmcneill branches: 1.1.2; 1.1.4;
Add ARMv8 support.
 1.1.4.2 10-Jun-2019  christos Sync with HEAD
 1.1.4.1 15-Jul-2018  christos file tprof_armv8.c was added on branch phil-wifi on 2019-06-10 22:10:43 +0000
 1.1.2.2 28-Jul-2018  pgoyette Sync with HEAD
 1.1.2.1 15-Jul-2018  pgoyette file tprof_armv8.c was added on branch pgoyette-compat on 2018-07-28 04:38:15 +0000
 1.3 14-Jul-2018  jmcneill branches: 1.3.2; 1.3.4;
Mark tprof_event_init, tprof_event_list, tprof_event_lookup as dead
 1.2 14-Jul-2018  maxv specialreg.h is x86-specific, don't include it
 1.1 13-Jul-2018  maxv Revamp tprof.

Rewrite the Intel backend to use the generic PMC interface, which is
available on all Intel CPUs. Synchronize the AMD backend with the new
interface.

The kernel identifies the PMC interface, and gives its id to userland.
Userland then queries the events itself (via cpuid etc). These events
depend on the PMC interface.

The tprof utility is rewritten to allow the user to choose which event
to count (which was not possible until now, the event was hardcoded in
the backend). The command line format is based on usr.bin/pmc, eg:

tprof -e llc-misses:k -o output sleep 20

The man page is updated too, but the arguments will likely change soon
anyway so it doesn't matter a lot.

The tprof utility has three tables:

Intel Architectural Version 1
Intel Skylake/Kabylake
AMD Family 10h

A CPU can support a combination of tables. For example Kabylake has
Intel-Architectural-Version-1 and its own Intel-Kabylake table.

For now the Intel Skylake/Kabylake table contains only one event, just
to demonstrate that the combination of tables works. Tested on an
Intel Core i5 Kabylake.

The code for AMD Family 10h is taken from the code I had written for
usr.bin/pmc. I haven't tested it yet, but it's the same as pmc(1), so
I guess it works as-is.

The whole thing is written in such a way that (I think) it is not
complicated to add more CPU models, and more architectures (other than
x86).
 1.3.4.2 10-Jun-2019  christos Sync with HEAD
 1.3.4.1 14-Jul-2018  christos file tprof_noarch.c was added on branch phil-wifi on 2019-06-10 22:10:43 +0000
 1.3.2.2 28-Jul-2018  pgoyette Sync with HEAD
 1.3.2.1 14-Jul-2018  pgoyette file tprof_noarch.c was added on branch pgoyette-compat on 2018-07-28 04:38:15 +0000
 1.19 07-Jul-2023  msaitoh tprof(8): Add support for Skylake-X and Cascade Lake.
 1.18 07-Jul-2023  msaitoh Modify comment. No functional change.
 1.17 12-Apr-2023  msaitoh KNF. No functional change.
 1.16 10-Apr-2023  msaitoh Add Cometlake support.
 1.15 08-Dec-2022  msaitoh branches: 1.15.2;
Add AMD family 19h (zen3 and zen4) support to tprof.
 1.14 08-Dec-2022  msaitoh Use lowercase consistently for hexadecimal numbers. No functional change.
 1.13 07-Dec-2022  msaitoh KNF. No functional change.
 1.12 13-Jun-2022  msaitoh Disable the unsupported events from the bit vector length in EAX.
 1.11 13-Jun-2022  msaitoh Add topdown-slots to Intel architectural performance monitoring version 1.
 1.10 17-Apr-2020  knakahara Fix typo in a comment.
 1.9 11-Oct-2019  jmcneill Add support for AMD Family 15h
 1.8 29-May-2019  maxv branches: 1.8.2; 1.8.4;
Add support for AMD Family 17h.
 1.7 26-Nov-2018  knakahara tprof: Add goldmont plus support. Tested by msaitoh@n.o, thanks.
 1.6 26-Nov-2018  knakahara tprof: Add goldmont support.

I tested on Atom C3558 (Denverton).
 1.5 15-Nov-2018  knakahara tprof: Add silvermont, airmont support.

I tested on Atom C2758 (Rangeley).
 1.4 14-Jul-2018  maxv branches: 1.4.2;
Finish the Skylake/Kabylake table, and improve the output of "tprof analyze".
 1.3 13-Jul-2018  maxv Skylake/Kabylake are family 6, so add a check for that. While here improve
the layout of "tprof list".
 1.2 13-Jul-2018  maxv Inline the values in amd_f10h_names[], we're not going to use defines for
each CPU model found in the wild.
 1.1 13-Jul-2018  maxv Revamp tprof.

Rewrite the Intel backend to use the generic PMC interface, which is
available on all Intel CPUs. Synchronize the AMD backend with the new
interface.

The kernel identifies the PMC interface, and gives its id to userland.
Userland then queries the events itself (via cpuid etc). These events
depend on the PMC interface.

The tprof utility is rewritten to allow the user to choose which event
to count (which was not possible until now, the event was hardcoded in
the backend). The command line format is based on usr.bin/pmc, eg:

tprof -e llc-misses:k -o output sleep 20

The man page is updated too, but the arguments will likely change soon
anyway so it doesn't matter a lot.

The tprof utility has three tables:

Intel Architectural Version 1
Intel Skylake/Kabylake
AMD Family 10h

A CPU can support a combination of tables. For example Kabylake has
Intel-Architectural-Version-1 and its own Intel-Kabylake table.

For now the Intel Skylake/Kabylake table contains only one event, just
to demonstrate that the combination of tables works. Tested on an
Intel Core i5 Kabylake.

The code for AMD Family 10h is taken from the code I had written for
usr.bin/pmc. I haven't tested it yet, but it's the same as pmc(1), so
I guess it works as-is.

The whole thing is written in such a way that (I think) it is not
complicated to add more CPU models, and more architectures (other than
x86).
 1.4.2.4 26-Dec-2018  pgoyette Sync with HEAD, resolve a few conflicts
 1.4.2.3 26-Nov-2018  pgoyette Sync with HEAD, resolve a couple of conflicts
 1.4.2.2 28-Jul-2018  pgoyette Sync with HEAD
 1.4.2.1 14-Jul-2018  pgoyette file tprof_x86.c was added on branch pgoyette-compat on 2018-07-28 04:38:15 +0000
 1.8.4.3 01-Aug-2023  martin Pull up the following revisions, requested by msaitoh in ticket #1697:

usr.sbin/tprof/tprof.8 1.16,1.22,1.25,1.29 via patch
usr.sbin/tprof/tprof_analyze.c 1.4
usr.sbin/tprof/arch/tprof_x86.c 1.13-1.19
sys/dev/tprof/tprof.c 1.23 via patch
sys/dev/tprof/tprof_x86_amd.c 1.7-1.8 via patch
sys/dev/tprof/tprof_x86_intel.c 1.8 via patch

- Add AMD family 19h (zen3 and zen4) support.
- Add Intel Comet Lake support.
- Add support for Intel Skylake-X and Cascade Lake.
- Print the path that we failed to open on error.
- Use lowercase consistently for hexadecimal numbers.
- KNF
 1.8.4.2 15-Oct-2022  martin Pull up following revision(s) (requested by msaitoh in ticket #1543):

sys/dev/tprof/tprof_x86_intel.c: revision 1.4
usr.sbin/tprof/arch/tprof_x86.c: revision 1.10
usr.sbin/tprof/arch/tprof_x86.c: revision 1.11
usr.sbin/tprof/arch/tprof_x86.c: revision 1.12

Fix typo in a comment.

Use CPUID_PERF_* macros defined in specialreg.h. No functional change.

Add topdown-slots to Intel architectural performance monitoring version 1.

Disable the unsupported events from the bit vector length in EAX.
 1.8.4.1 12-Oct-2019  martin Pull up following revision(s) (requested by jmcneill in ticket #301):

usr.sbin/tprof/tprof.8: revision 1.15
sys/dev/tprof/tprof_x86_amd.c: revision 1.5
usr.sbin/tprof/arch/tprof_x86.c: revision 1.9

Match Family 15h

-

Add support for AMD Family 15h

-

Add AMD Family 15h to supported model list
 1.8.2.4 21-Apr-2020  martin Sync with HEAD
 1.8.2.3 13-Apr-2020  martin Mostly merge changes from HEAD upto 20200411
 1.8.2.2 10-Jun-2019  christos Sync with HEAD
 1.8.2.1 29-May-2019  christos file tprof_x86.c was added on branch phil-wifi on 2019-06-10 22:10:43 +0000
 1.15.2.2 29-Jul-2023  martin Pull up following revision(s) (requested by msaitoh in ticket #255):

usr.sbin/tprof/arch/tprof_x86.c: revision 1.18
usr.sbin/tprof/arch/tprof_x86.c: revision 1.19

Modify comment. No functional change.

tprof(8): Add support for Skylake-X and Cascade Lake.
 1.15.2.1 21-Jun-2023  martin Pull up following revision(s) (requested by msaitoh in ticket #210):

usr.sbin/tprof/tprof.8: revision 1.30
sys/dev/tprof/tprof_x86_amd.c: revision 1.8
sys/dev/tprof/tprof_armv8.c: revision 1.20
sys/dev/tprof/tprof_types.h: revision 1.7
sys/dev/tprof/tprof_x86_intel.c: revision 1.6
sys/dev/tprof/tprof_x86_intel.c: revision 1.7
sys/dev/tprof/tprof_x86_intel.c: revision 1.8
sys/dev/tprof/tprof.c: revision 1.23
usr.sbin/tprof/tprof.8: revision 1.25
usr.sbin/tprof/tprof.8: revision 1.26
usr.sbin/tprof/arch/tprof_x86.c: revision 1.16
usr.sbin/tprof/tprof.8: revision 1.27
usr.sbin/tprof/arch/tprof_x86.c: revision 1.17
usr.sbin/tprof/tprof.8: revision 1.28
usr.sbin/tprof/tprof.h: revision 1.5
usr.sbin/tprof/tprof.8: revision 1.29
sys/dev/tprof/tprof_armv7.c: revision 1.13
usr.sbin/tprof/tprof_top.c: revision 1.9
usr.sbin/tprof/tprof.c: revision 1.21

Add Cometlake support.

Obtain the number of general counters from CPUID 0xa.

Test cpuid_level in tprof_intel_ncounters().
This function is called before tprof_intel_ident().

KNF. No functional change.

Add two note to the tprof(8)'s manual page.
- "list" command prints the maximum number of counters that can be used
simultaneously.
- multiple -e arguments can be specified.

Use the default counter if -e argument is not specified.
monitor command:
The default counter is selected if -e argument is not specified.
list command:
Print the name of the default counter for monitor and top command.

tprof.8: new sentence, new line

tprof(8): fix markup nits

tprof.8: fix typo, s/speficied/specified/

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