Lines Matching refs:d7
60 vldr d7, [ip] /* load from memory */
71 vand d7, d7, d3 /* mask out fill bits */
73 vorr d7, d2, d7 /* merge fill and memory */
79 vstmia ip!, {d7} /* write back to memory */
87 vmov q3, q0 /* put fill in q3 (d6-d7) */
122 vstmia ip!, {d0-d7}
123 vstmia ip!, {d0-d7}
124 vstmia ip!, {d0-d7}
125 vstmia ip!, {d0-d7}
126 vstmia ip!, {d0-d7}
127 vstmia ip!, {d0-d7}
128 vstmia ip!, {d0-d7}
129 vstmia ip!, {d0-d7}
160 vldr d7, [ip, r2] /* load the last partial dword */
170 vand d7, d7, d2 /* keep no-fill bits */
172 vorr d7, d2, d7 /* merge fill and no-fill */
178 vstr d7, [ip]; RET
179 vstmia ip, {d6-d7}; RET
180 vstmia ip, {d5-d7}; RET
181 vstmia ip, {d4-d7}; RET
182 vstmia ip, {d3-d7}; RET
183 vstmia ip, {d2-d7}; RET
184 vstmia ip, {d1-d7}; RET
185 vstmia ip, {d0-d7}; RET