Lines Matching refs:SRCREG
67 #define SRCREG a1
71 #define SRCREG a0
88 sltu t0,SRCREG,DSTREG # t0 == SRCREG < DSTREG
107 andi t0,SRCREG,(SZREG-1) # get last bits of src
116 PTR_ADDU a3,SRCREG,t0 # run fast loop up to this addr
117 sltu AT,SRCREG,a3 # any work to do?
125 REG_L t3,(0*SZREG)(SRCREG)
126 REG_L v1,(1*SZREG)(SRCREG)
127 REG_L t0,(2*SZREG)(SRCREG)
128 REG_L t1,(3*SZREG)(SRCREG)
129 PTR_ADDU SRCREG,SZREG*8
134 REG_L t1,(-1*SZREG)(SRCREG)
135 REG_L t0,(-2*SZREG)(SRCREG)
136 REG_L v1,(-3*SZREG)(SRCREG)
137 REG_L t3,(-4*SZREG)(SRCREG)
142 bne SRCREG,a3,1b
152 PTR_ADDU t0,SRCREG,t2 # stop at t0
155 REG_L t3,0(SRCREG)
156 PTR_ADDU SRCREG,SZREG
158 bne SRCREG,t0,1b
165 lb t3,0(SRCREG)
166 PTR_ADDU SRCREG,1
187 PTR_ADDU a3,SRCREG,a3 # stop point
190 REG_LHI t3,0(SRCREG)
191 REG_LLO t3,SZREG-1(SRCREG)
192 PTR_ADDI SRCREG,SZREG
194 bne SRCREG,a3,1b
201 PTR_ADDU SRCREG,SIZEREG
205 andi t0,SRCREG,SZREG-1 # get last 3 bits of src
215 PTR_SUBU a3,SRCREG,t0
221 REG_L t3,(-4*SZREG)(SRCREG)
222 REG_L v1,(-3*SZREG)(SRCREG)
223 REG_L t0,(-2*SZREG)(SRCREG)
224 REG_L t1,(-1*SZREG)(SRCREG)
225 PTR_SUBU SRCREG,8*SZREG
230 REG_L t1,(3*SZREG)(SRCREG)
231 REG_L t0,(2*SZREG)(SRCREG)
232 REG_L v1,(1*SZREG)(SRCREG)
233 REG_L t3,(0*SZREG)(SRCREG)
238 bne SRCREG,a3,1b
248 PTR_SUBU t0,SRCREG,t2 # stop at t0
251 REG_L t3,-SZREG(SRCREG)
252 PTR_SUBU SRCREG,SZREG
254 bne SRCREG,t0,1b
261 lb t3,-1(SRCREG)
262 PTR_SUBU SRCREG,1
283 PTR_SUBU a3,SRCREG,a3 # stop point
286 REG_LHI t3,-SZREG(SRCREG)
287 REG_LLO t3,-1(SRCREG)
288 PTR_SUBU SRCREG,SZREG
290 bne SRCREG,a3,1b
Indexes created Mon Oct 20 01:09:56 GMT 2025