Lines Matching refs:We
34 * We need to make sure that this doesn't use floating point
35 * before our trap handlers are installed or we could panic
41 * We want to use VIS instructions if we're clearing out more than
42 * 256 bytes, but to do that we need to properly save and restore the
47 * XXXXX To produce more efficient code, we do not allow lengths
87 !! Now we are 64-bit aligned
139 * Here we use VIS instructions to do a block clear of a page.
140 * But before we can do that we need to save and enable the FPU.
145 * Next, allocate an aligned fpstate on the stack. We will properly
148 * Now we grab either curlwp (or if we're on the interrupt stack
149 * lwp0). We stash its existing fpstate in a local register and
150 * put our new fpstate in curlwp->p_md.md_fpstate. We point
153 * If we are ever preempted, our FPU state will be saved in our
154 * fpstate. Then, when we're resumed and we take an FPDISABLED
158 * On exiting this routine we undo the damage: restore the original
166 !! We are now 8-byte aligned. We need to become 64-byte aligned.
201 !! Remember: we were 8 bytes too far
211 * We've saved our possible fpstate, now disable the fpu
Indexes created Sun Oct 19 02:09:48 GMT 2025