Lines Matching defs:ISA
829 bool AsArraySection = isa<OMPArraySectionExpr>(ClausesData[N].Ref);
1488 !isa<llvm::Instruction>(LVal.getPointer(CGF)) ||
3860 if (Init && (!ForDup || (isa<CXXConstructExpr>(Init) &&
3871 assert(isa<ImplicitParamDecl>(OriginalVD) &&
3872 isa<CapturedDecl>(OriginalVD->getDeclContext()) &&
3875 isa<TranslationUnitDecl>(
3901 if (!isa<CXXConstructExpr>(Init) || CGF.isTrivialInitializer(Init)) {
3952 InitRequired = InitRequired || (Init && isa<CXXConstructExpr>(Init) &&
6559 if (isa<AsmStmt>(S) || isa<NullStmt>(S) || isa<OMPFlushDirective>(S) ||
6560 isa<OMPBarrierDirective>(S) || isa<OMPTaskyieldDirective>(S))
6565 if (isa<EmptyDecl>(D) || isa<DeclContext>(D) ||
6566 isa<TypeDecl>(D) || isa<PragmaCommentDecl>(D) ||
6567 isa<PragmaDetectMismatchDecl>(D) || isa<UsingDecl>(D) ||
6568 isa<UsingDirectiveDecl>(D) ||
6569 isa<OMPDeclareReductionDecl>(D) ||
6570 isa<OMPThreadPrivateDecl>(D) || isa<OMPAllocateDecl>(D))
7638 if (isa<MemberExpr>(AssocExpr)) {
7642 } else if ((AE && isa<CXXThisExpr>(AE->getBase()->IgnoreParenImpCasts())) ||
7644 isa<CXXThisExpr>(OASE->getBase()->IgnoreParenImpCasts()))) {
7647 isa<CXXThisExpr>(OAShE->getBase()->IgnoreParenCasts())) {
7777 bool IsMemberReference = isa<MemberExpr>(I->getAssociatedExpression()) &&
7790 isa<MemberExpr>(Next->getAssociatedExpression()) ||
7791 isa<ArraySubscriptExpr>(Next->getAssociatedExpression()) ||
7792 isa<OMPArraySectionExpr>(Next->getAssociatedExpression()) ||
7793 isa<OMPArrayShapingExpr>(Next->getAssociatedExpression()) ||
7794 isa<UnaryOperator>(Next->getAssociatedExpression()) ||
7795 isa<BinaryOperator>(Next->getAssociatedExpression())) &&
8440 auto It = Info.find(isa<MemberExpr>(IE) ? nullptr : VD);
8460 isa<MemberExpr>(IE) ||
8463 isa<MemberExpr>(PrevCI->getAssociatedExpression()) || !VarD ||
8478 if (isa<MemberExpr>(IE)) {
8526 auto It = Info.find(isa<MemberExpr>(IE) ? nullptr : VD);
8551 if (isa<MemberExpr>(IE)) {
8996 if (!isa<MemberExpr>(It->getAssociatedExpression()) ||
9316 if (!isa<llvm::Constant>(S)) {
10352 isa<OMPExecutableDirective>(S) &&
10689 if (isa<FunctionDecl>(GD.getDecl()) ||
10690 isa<OMPDeclareReductionDecl>(GD.getDecl()))
11067 assert((isa<OMPTargetEnterDataDirective>(D) ||
11068 isa<OMPTargetExitDataDirective>(D) ||
11069 isa<OMPTargetUpdateDirective>(D)) &&
11266 // register of that ISA for which current vector version is generated. The
11308 char ISA;
11342 Out << "_ZGV" << Data.ISA << Mask;
11520 char ISA, StringRef ParSeq,
11525 Out << Prefix << ISA << LMask << VLEN;
11535 StringRef Prefix, char ISA,
11541 addAArch64VectorName(8, Mask, Prefix, ISA, ParSeq, MangledName,
11543 addAArch64VectorName(16, Mask, Prefix, ISA, ParSeq, MangledName,
11547 addAArch64VectorName(4, Mask, Prefix, ISA, ParSeq, MangledName,
11549 addAArch64VectorName(8, Mask, Prefix, ISA, ParSeq, MangledName,
11553 addAArch64VectorName(2, Mask, Prefix, ISA, ParSeq, MangledName,
11555 addAArch64VectorName(4, Mask, Prefix, ISA, ParSeq, MangledName,
11560 addAArch64VectorName(2, Mask, Prefix, ISA, ParSeq, MangledName,
11573 char ISA, unsigned VecRegSize, llvm::Function *Fn, SourceLocation SLoc) {
11593 if (ISA == 'n' && UserVLEN && !llvm::isPowerOf2_32(UserVLEN)) {
11603 if (ISA == 's' && UserVLEN != 0) {
11620 if (ISA == 's') {
11622 addAArch64VectorName(UserVLEN, "M", Prefix, ISA, ParSeq, MangledName,
11625 assert(ISA == 'n' && "Expected ISA either 's' or 'n'.");
11630 addAArch64VectorName(UserVLEN, "N", Prefix, ISA, ParSeq, MangledName,
11632 addAArch64VectorName(UserVLEN, "M", Prefix, ISA, ParSeq, MangledName,
11636 addAArch64VectorName(UserVLEN, "N", Prefix, ISA, ParSeq, MangledName,
11640 addAArch64VectorName(UserVLEN, "M", Prefix, ISA, ParSeq, MangledName,
11648 if (ISA == 's') {
11650 addAArch64VectorName("x", "M", Prefix, ISA, ParSeq, MangledName,
11653 assert(ISA == 'n' && "Expected ISA either 's' or 'n'.");
11659 addAArch64AdvSIMDNDSNames(NDS, "N", Prefix, ISA, ParSeq, MangledName,
11661 addAArch64AdvSIMDNDSNames(NDS, "M", Prefix, ISA, ParSeq, MangledName,
11665 addAArch64AdvSIMDNDSNames(NDS, "N", Prefix, ISA, ParSeq, MangledName,
11669 addAArch64AdvSIMDNDSNames(NDS, "M", Prefix, ISA, ParSeq, MangledName,
11683 if (isa<CXXMethodDecl>(FD))
11697 if (isa<CXXThisExpr>(E)) {
11712 if (isa<CXXThisExpr>(E)) {
11738 if (isa<CXXThisExpr>(E)) {
12091 isa<CXXThisExpr>(ME->getBase()->IgnoreParenImpCasts())) &&
Indexes created Wed Aug 05 00:25:39 UTC 2026