Lines Matching refs:__v4sf
104 (__v4sf)_mm_andnot_ps(__A, __B),
105 (__v4sf)__W);
111 (__v4sf)_mm_andnot_ps(__A, __B),
112 (__v4sf)_mm_setzero_ps());
160 (__v4sf)_mm_and_ps(__A, __B),
161 (__v4sf)__W);
167 (__v4sf)_mm_and_ps(__A, __B),
168 (__v4sf)_mm_setzero_ps());
216 (__v4sf)_mm_xor_ps(__A, __B),
217 (__v4sf)__W);
223 (__v4sf)_mm_xor_ps(__A, __B),
224 (__v4sf)_mm_setzero_ps());
272 (__v4sf)_mm_or_ps(__A, __B),
273 (__v4sf)__W);
279 (__v4sf)_mm_or_ps(__A, __B),
280 (__v4sf)_mm_setzero_ps());
369 return (__m128i) __builtin_ia32_cvtps2qq128_mask ((__v4sf) __A,
376 return (__m128i) __builtin_ia32_cvtps2qq128_mask ((__v4sf) __A,
383 return (__m128i) __builtin_ia32_cvtps2qq128_mask ((__v4sf) __A,
390 return (__m256i) __builtin_ia32_cvtps2qq256_mask ((__v4sf) __A,
397 return (__m256i) __builtin_ia32_cvtps2qq256_mask ((__v4sf) __A,
404 return (__m256i) __builtin_ia32_cvtps2qq256_mask ((__v4sf) __A,
411 return (__m128i) __builtin_ia32_cvtps2uqq128_mask ((__v4sf) __A,
418 return (__m128i) __builtin_ia32_cvtps2uqq128_mask ((__v4sf) __A,
425 return (__m128i) __builtin_ia32_cvtps2uqq128_mask ((__v4sf) __A,
432 return (__m256i) __builtin_ia32_cvtps2uqq256_mask ((__v4sf) __A,
439 return (__m256i) __builtin_ia32_cvtps2uqq256_mask ((__v4sf) __A,
446 return (__m256i) __builtin_ia32_cvtps2uqq256_mask ((__v4sf) __A,
492 (__v4sf) _mm_setzero_ps(),
499 (__v4sf) __W,
506 (__v4sf) _mm_setzero_ps(),
512 return (__m128)__builtin_convertvector((__v4di)__A, __v4sf);
518 (__v4sf)_mm256_cvtepi64_ps(__A),
519 (__v4sf)__W);
525 (__v4sf)_mm256_cvtepi64_ps(__A),
526 (__v4sf)_mm_setzero_ps());
615 return (__m128i) __builtin_ia32_cvttps2qq128_mask ((__v4sf) __A,
622 return (__m128i) __builtin_ia32_cvttps2qq128_mask ((__v4sf) __A,
629 return (__m128i) __builtin_ia32_cvttps2qq128_mask ((__v4sf) __A,
636 return (__m256i) __builtin_ia32_cvttps2qq256_mask ((__v4sf) __A,
643 return (__m256i) __builtin_ia32_cvttps2qq256_mask ((__v4sf) __A,
650 return (__m256i) __builtin_ia32_cvttps2qq256_mask ((__v4sf) __A,
657 return (__m128i) __builtin_ia32_cvttps2uqq128_mask ((__v4sf) __A,
664 return (__m128i) __builtin_ia32_cvttps2uqq128_mask ((__v4sf) __A,
671 return (__m128i) __builtin_ia32_cvttps2uqq128_mask ((__v4sf) __A,
678 return (__m256i) __builtin_ia32_cvttps2uqq256_mask ((__v4sf) __A,
685 return (__m256i) __builtin_ia32_cvttps2uqq256_mask ((__v4sf) __A,
692 return (__m256i) __builtin_ia32_cvttps2uqq256_mask ((__v4sf) __A,
738 (__v4sf) _mm_setzero_ps(),
745 (__v4sf) __W,
752 (__v4sf) _mm_setzero_ps(),
758 return (__m128)__builtin_convertvector((__v4du)__A, __v4sf);
764 (__v4sf)_mm256_cvtepu64_ps(__A),
765 (__v4sf)__W);
771 (__v4sf)_mm256_cvtepu64_ps(__A),
772 (__v4sf)_mm_setzero_ps());
812 (__m128)__builtin_ia32_rangeps128_mask((__v4sf)(__m128)(A), \
813 (__v4sf)(__m128)(B), (int)(C), \
814 (__v4sf)_mm_setzero_ps(), \
818 __v4sf)(__m128)(A), \
819 (__v4sf)(__m128)(B), (int)(C), \
820 (__v4sf)(__m128)(W), (__mmask8)(U))
823 (__m128)__builtin_ia32_rangeps128_mask((__v4sf)(__m128)(A), \
824 (__v4sf)(__m128)(B), (int)(C), \
825 (__v4sf)_mm_setzero_ps(), \
876 (__m128)__builtin_ia32_reduceps128_mask((__v4sf)(__m128)(A), (int)(B), \
877 (__v4sf)_mm_setzero_ps(), \
881 (__m128)__builtin_ia32_reduceps128_mask((__v4sf)(__m128)(A), (int)(B), \
882 (__v4sf)(__m128)(W), \
886 (__m128)__builtin_ia32_reduceps128_mask((__v4sf)(__m128)(A), (int)(B), \
887 (__v4sf)_mm_setzero_ps(), \
956 return (__m256)__builtin_shufflevector((__v4sf)__A, (__v4sf)__A,
1149 (__mmask8)__builtin_ia32_fpclassps128_mask((__v4sf)(__m128)(A), (int)(imm), \
1153 (__mmask8)__builtin_ia32_fpclassps128_mask((__v4sf)(__m128)(A), (int)(imm), \