Lines Matching refs:writeback
559 unsigned writeback : 1; /* Operand has trailing ! */
915 _("cannot use writeback with PC-relative addressing")
5817 These three may have a trailing ! which causes .writeback to be set also.
5819 Postindexed addressing (.postind=1, .writeback=1):
6048 inst.operands[i].writeback = 1;
6075 inst.operands[i].writeback = 1;
6981 OP_RRnpctw, /* ARM register, not r15 in Thumb-state or with writeback,
7591 inst.operands[i].writeback = 1;
7639 inst.operands[i].writeback = 1;
7814 inst.operands[i].writeback = 1;
7973 && (inst.operands[i].writeback || thumb))
8341 if (inst.operands[i].writeback)
8347 gas_assert (inst.operands[i].writeback);
8379 || (is_pc && inst.operands[i].writeback)),
8404 PC cannot be used in writeback addressing, either. */
8405 constraint ((is_t || inst.operands[i].writeback),
8446 constraint (inst.operands[i].reg == REG_PC && inst.operands[i].writeback,
8455 && inst.operands[i].writeback),
8971 reject use of writeback; if unind_ok is false, reject use of
8997 gas_assert (!inst.operands[i].writeback);
9011 if (inst.operands[i].writeback)
9020 inst.error = _("instruction does not support writeback");
9653 if (inst.operands[1].writeback)
9656 if (inst.operands[0].writeback)
9659 /* Check for unpredictable uses of writeback. */
9665 as_warn (_("writeback of base register is UNPREDICTABLE"));
9668 as_warn (_("writeback of base register when in register list is UNPREDICTABLE"));
9674 as_warn (_("writeback of base register is UNPREDICTABLE"));
9678 as_warn (_("if writeback register is in list, it must be the lowest reg in the list"));
9730 && (inst.operands[2].writeback || inst.operands[2].postind))
9751 || inst.operands[1].postind || inst.operands[1].writeback
9831 inst.operands[1].writeback = 1;
9863 inst.operands[1].writeback = 1;
10230 constraint (inst.operands[0].writeback,
10231 _("writeback used in preload instruction"));
10245 constraint (inst.operands[0].writeback,
10246 _("writeback used in preload instruction"));
10256 constraint (inst.operands[0].writeback,
10261 inst.operands[0].writeback = 1;
10276 if (inst.operands[0].writeback)
10465 if (inst.operands[0].writeback || inst.operands[1].writeback)
10475 || inst.operands[2].postind || inst.operands[2].writeback
10499 || inst.operands[2].postind || inst.operands[2].writeback
10685 if (inst.operands[0].writeback)
10689 _("this addressing mode requires base-register writeback"));
10700 if (inst.operands[0].writeback)
10704 _("this addressing mode requires base-register writeback"));
10982 if (inst.operands[1].writeback)
11163 constraint (inst.operands[i].writeback,
11164 _("Thumb does not support register indexing with writeback"));
11182 constraint (is_pc && inst.operands[i].writeback, BAD_PC_WRITEBACK);
11183 constraint (is_t && inst.operands[i].writeback,
11184 _("cannot use writeback with this instruction"));
11191 if (inst.operands[i].writeback)
11197 if (inst.operands[i].writeback)
11204 gas_assert (inst.operands[i].writeback);
12286 bool writeback)
12298 && writeback)
12321 if (writeback)
12343 else if (writeback)
12359 constraint (inst.operands[1].writeback,
12373 if (inst.operands[0].writeback
12385 if (!inst.operands[0].writeback
12407 if (!inst.operands[0].writeback
12424 /* STMIA must have writeback; LDMIA must have writeback
12428 ? inst.operands[0].writeback
12429 : (inst.operands[0].writeback
12456 inst.operands[0].writeback);
12468 if (!inst.operands[0].writeback)
12477 if (!inst.operands[0].writeback
12480 else if (inst.operands[0].writeback
12495 || inst.operands[1].postind || inst.operands[1].writeback
12547 && !inst.operands[1].writeback
12606 && inst.operands[1].writeback == 1
12622 constraint (inst.operands[1].writeback == 1
12654 || inst.operands[1].writeback,
12724 if (inst.operands[2].writeback
13544 constraint (inst.operands[0].writeback,
14004 || inst.operands[2].postind || inst.operands[2].writeback
16413 inst.operands[0].writeback = 1;
17231 inst.instruction |= inst.operands[1].writeback << 21;
17269 constraint (inst.operands[1].writeback || !inst.operands[1].preind,
17362 else if (inst.operands[1].reg == REG_SP && inst.operands[1].writeback)
17370 inst.instruction |= inst.operands[1].writeback << 21;
17458 else if (inst.operands[1].reg == REG_SP && inst.operands[1].writeback)
17476 inst.instruction |= inst.operands[1].writeback << 21;
20509 constraint (is_dbmode && !inst.operands[0].writeback,
20510 _("writeback (!) must be used for VLDMDB and VSTMDB"));
20517 inst.instruction |= inst.operands[0].writeback << 21;
20984 if (inst.operands[1].writeback)
27898 *4, optional writeback(W)
27955 /* Writeback: 8-bit, +/- offset. */
Indexes created Sat Jun 27 00:24:51 UTC 2026