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Lines Matching defs:fldd

2474 	  const tic6x_insn_field *fldd;
2475 	  fldd = tic6x_field_from_fmt (fmt, opct->fixed_fields[fld].field_id);
2476 	  if (fldd == NULL)
2478 	  opcode_value |= opct->fixed_fields[fld].min_val << fldd->bitfields[0].low_pos;
2484       const tic6x_insn_field *fldd;
2495       fldd = tic6x_field_from_fmt (fmt, opct->variable_fields[fld].field_id);
2496       if (fldd == NULL)
2509 	      || ucexp.X_add_number >= (1 << fldd->bitfields[0].width))
2528 	      if (fldd->bitfields[0].low_pos != 7 || fldd->bitfields[0].width != 16)
2539 	  if (sign_value < -(1 << (fldd->bitfields[0].width - 1))
2540 	      || (sign_value >= (1 << (fldd->bitfields[0].width - 1))))
2548 	  value = sign_value + (1 << (fldd->bitfields[0].width - 1));
2549 	  value ^= (1 << (fldd->bitfields[0].width - 1));
2558 	      || operands[opno].value.exp.X_add_number > (1 << fldd->bitfields[0].width))
2630 	  if (fldd->bitfields[0].low_pos != 8 || fldd->bitfields[0].width != 15)
2657 	      if (fldd->bitfields[0].low_pos != 7 || fldd->bitfields[0].width != 16)
2677 	      if (fldd->bitfields[0].low_pos != 7 || fldd->bitfields[0].width != 16)
2695 	  if (fldd->bitfields[0].low_pos == 7 && fldd->bitfields[0].width == 21)
2697 	  else if (fldd->bitfields[0].low_pos == 16 && fldd->bitfields[0].width == 12)
2699 	  else if (fldd->bitfields[0].low_pos == 13 && fldd->bitfields[0].width == 10)
2701 	  else if (fldd->bitfields[0].low_pos == 16 && fldd->bitfields[0].width == 7)
2819 		  || mem.offset.exp.X_add_number >= (1 << fldd->bitfields[0].width) * scale)
2852 		  || mem.offset.exp.X_add_number >= (1 << fldd->bitfields[0].width))
2925 	  if (fldd->bitfields[0].low_pos != 18)
2980 	  if (fcyc_bits > fldd->bitfields[0].width)
2988 		      >= (1 << (fldd->bitfields[0].width - fcyc_bits))))
2997 	      for (t = 0, i = fcyc_bits; i < fldd->bitfields[0].width; i++)
3048       opcode_value |= value << fldd->bitfields[0].low_pos;