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Lines Matching defs:INS_Z80N

67 #define INS_Z80N     (1 << 5)
77 #define INS_NOT_GBZ80 (INS_Z80 | INS_Z180 | INS_R800 | INS_EZ80 | INS_Z80N)
163 {"z80n", INS_Z80N, 0, 0, "Z80 Next" }
474 {"f", REG_F, INS_IN_F_C | INS_Z80N | INS_R800 },
479 {"ixh", REG_H | R_IX, INS_IDX_HALF | INS_EZ80 | INS_R800 | INS_Z80N },
480 {"ixl", REG_L | R_IX, INS_IDX_HALF | INS_EZ80 | INS_R800 | INS_Z80N },
482 {"iyh", REG_H | R_IY, INS_IDX_HALF | INS_EZ80 | INS_R800 | INS_Z80N },
483 {"iyl", REG_L | R_IY, INS_IDX_HALF | INS_EZ80 | INS_R800 | INS_Z80N },
562 case INS_Z80N:
1329 if (!(ins_ok & (INS_EZ80|INS_R800|INS_Z80N)))
1419 if (!(ins_ok & INS_Z80N))
1507 if (!(ins_ok & INS_Z80N))
1607 else if (addr.X_op == O_register && rnum == REG_C && (ins_ok & INS_Z80N))
1694 if (arg.X_md || arg.X_op == O_md1 || !(ins_ok & INS_Z80N))
1799 if (!(ins_ok & INS_Z80N))
1824 else if (!(lhs & R_INDEX) && (ins_ok & INS_Z80N))
2034 else if (reg.X_add_number == REG_F && !(ins_ok & (INS_R800|INS_Z80N)))
2102 if (!(ins_ok & INS_Z80N))
2478 else if (!(ins_ok & (INS_EZ80|INS_R800|INS_Z80N)))
2639 if (ii_halves && !(ins_ok & (INS_EZ80|INS_R800|INS_Z80N)))
3025 if (ins_ok & INS_Z80N)
3171 if (ins_ok & INS_Z80N)
3527 { ".z80n", set_inss, INS_Z80N},
3552 { "brlc", 0xED, 0x2C, emit_bshft,INS_Z80N },
3553 { "bsla", 0xED, 0x28, emit_bshft,INS_Z80N },
3554 { "bsra", 0xED, 0x29, emit_bshft,INS_Z80N },
3555 { "bsrf", 0xED, 0x2B, emit_bshft,INS_Z80N },
3556 { "bsrl", 0xED, 0x2A, emit_bshft,INS_Z80N },
3596 { "lddrx",0xED, 0xBC, emit_insn, INS_Z80N },
3597 { "lddx", 0xED, 0xAC, emit_insn, INS_Z80N },
3602 { "ldirx",0xED, 0xB4, emit_insn, INS_Z80N },
3603 { "ldix", 0xED, 0xA4, emit_insn, INS_Z80N },
3604 { "ldpirx",0xED,0xB7, emit_insn, INS_Z80N },
3605 { "ldws", 0xED, 0xA5, emit_insn, INS_Z80N },
3607 { "mirror",0xED,0x24, emit_insn, INS_Z80N },
3608 { "mlt", 0xED, 0x4C, emit_mlt, INS_Z180|INS_EZ80|INS_Z80N },
3609 { "mul", 0xED, 0x30, emit_mul, INS_Z80N },
3613 { "nextreg",0xED,0x91,emit_nextreg,INS_Z80N },
3632 { "outinb",0xED,0x90, emit_insn, INS_Z80N },
3634 { "pixelad",0xED,0x94,emit_insn, INS_Z80N },
3635 { "pixeldn",0xED,0x93,emit_insn, INS_Z80N },
3657 { "setae",0xED, 0x95, emit_insn, INS_Z80N },
3658 { "sl1", 0xCB, 0x30, emit_mr, INS_SLI|INS_Z80N },
3660 { "sli", 0xCB, 0x30, emit_mr, INS_SLI|INS_Z80N },
3661 { "sll", 0xCB, 0x30, emit_mr, INS_SLI|INS_Z80N },
3668 { "swap", 0xCB, 0x30, emit_swap, INS_GBZ80|INS_Z80N },
3669 { "swapnib",0xED,0x23,emit_insn, INS_Z80N },
3670 { "test", 0xED, 0x27, emit_insn_n, INS_Z80N },
3671 { "tst", 0xED, 0x04, emit_tst, INS_Z180|INS_EZ80|INS_Z80N },