Lines Matching refs:IMMEDIATE
499 immediate operand to ease the operand encoding/decoding and qualifier
1603 /* The third operand is an index (e.g. immediate or bit)
1611 /* The third operand is an index (e.g. immediate or bit)
3484 /* Add/subtract (immediate). */
3611 /* AdvSIMD modified immediate. */
3858 /* AdvSIMD shift by immediate. */
4087 /* AdvSIMD scalar shift by immediate. */
4135 /* Unconditional branch (immediate). */
4156 /* Compare & branch (immediate). */
4159 /* Conditional branch (immediate). */
4172 /* Compare register with immediate and branch. */
4205 /* Conditional compare (immediate). */
4445 /* Floating-point immediate. */
4451 /* Load/store register (immediate indexed). */
4472 /* Load/store register (unsigned immediate). */
4508 /* Load/store register (unscaled immediate). */
4522 /* Load/store register (scaled signed immediate). */
4590 /* Logical (immediate). */
4868 /* Move wide (immediate). */
4965 /* Test & branch (immediate). */
7576 Y(IMMEDIATE, imm, "CRn", 0, F(FLD_CRn), \
7578 Y(IMMEDIATE, imm, "CRm", 0, F(FLD_CRm), \
7580 Y(IMMEDIATE, imm, "IDX", 0, F(FLD_imm4_11), \
7581 "an immediate as the index of the least significant byte") \
7582 Y(IMMEDIATE, imm, "MASK", 0, F(FLD_imm4_0), \
7583 "an immediate as the index of the least significant byte") \
7584 Y(IMMEDIATE, advsimd_imm_shift, "IMM_VLSL", 0, F(), \
7586 Y(IMMEDIATE, advsimd_imm_shift, "IMM_VLSR", 0, F(), \
7588 Y(IMMEDIATE, advsimd_imm_modified, "SIMD_IMM", 0, F(), \
7589 "an immediate") \
7590 Y(IMMEDIATE, advsimd_imm_modified, "SIMD_IMM_SFT", 0, F(), \
7591 "an 8-bit unsigned immediate with optional shift") \
7592 Y(IMMEDIATE, advsimd_imm_modified, "SIMD_FPIMM", 0, F(), \
7594 X(IMMEDIATE, 0, ext_shll_imm, "SHLL_IMM", 0, F(), \
7595 "an immediate shift amount of 8, 16 or 32") \
7596 X(IMMEDIATE, 0, 0, "IMM0", 0, F(), "0") \
7597 X(IMMEDIATE, 0, 0, "FPIMM0", 0, F(), "0.0") \
7598 Y(IMMEDIATE, fpimm, "FPIMM", 0, F(FLD_imm8), \
7600 Y(IMMEDIATE, imm, "IMMR", 0, F(FLD_immr), \
7602 Y(IMMEDIATE, imm, "IMMS", 0, F(FLD_imm6_10), \
7604 Y(IMMEDIATE, imm, "WIDTH", 0, F(FLD_imm6_10), \
7606 Y(IMMEDIATE, imm, "IMM", 0, F(FLD_imm6_10), "an immediate") \
7607 Y(IMMEDIATE, imm, "IMM_2", 0, F(FLD_imm6_15), "an immediate") \
7608 Y(IMMEDIATE, imm, "IMMP1_2", 0, F(FLD_imm6_15), "an immediate plus 1") \
7609 Y(IMMEDIATE, imm, "IMMS1_2", 0, F(FLD_imm6_15), "an immediate minus 1") \
7610 Y(IMMEDIATE, imm, "UIMM3_OP1", 0, F(FLD_op1), \
7611 "a 3-bit unsigned immediate") \
7612 Y(IMMEDIATE, imm, "UIMM3_OP2", 0, F(FLD_op2), \
7613 "a 3-bit unsigned immediate") \
7614 Y(IMMEDIATE, imm, "UIMM4", 0, F(FLD_CRm), \
7615 "a 4-bit unsigned immediate") \
7616 Y(IMMEDIATE, imm, "UIMM4_ADDG", 0, F(FLD_imm4_10), \
7618 Y(IMMEDIATE, imm, "UIMM7", 0, F(FLD_CRm, FLD_op2), \
7619 "a 7-bit unsigned immediate") \
7620 Y(IMMEDIATE, imm, "UIMM10", OPD_F_SHIFT_BY_4, F(FLD_immr), \
7622 Y(IMMEDIATE, imm, "BIT_NUM", 0, F(FLD_b5, FLD_b40), \
7624 Y(IMMEDIATE, imm, "EXCEPTION", 0, F(FLD_imm16_5), \
7625 "a 16-bit unsigned immediate") \
7626 Y(IMMEDIATE, imm, "UNDEFINED", 0, F(FLD_imm16_0), \
7627 "a 16-bit unsigned immediate") \
7628 Y(IMMEDIATE, imm, "CCMP_IMM", 0, F(FLD_imm5), \
7629 "a 5-bit unsigned immediate") \
7630 Y(IMMEDIATE, imm, "SIMM5", OPD_F_SEXT, F(FLD_imm5), \
7631 "a 5-bit signed immediate") \
7632 Y(IMMEDIATE, imm, "NZCV", 0, F(FLD_nzcv), \
7634 Y(IMMEDIATE, limm, "LIMM", 0, F(FLD_N,FLD_immr,FLD_imms), \
7635 "Logical immediate") \
7636 Y(IMMEDIATE, aimm, "AIMM", 0, F(FLD_shift,FLD_imm12), \
7637 "a 12-bit unsigned immediate with optional left shift of 12 bits")\
7638 Y(IMMEDIATE, imm_half, "HALF", 0, F(FLD_imm16_5), \
7639 "a 16-bit immediate with optional left shift") \
7640 Y(IMMEDIATE, fbits, "FBITS", 0, F(FLD_scale), \
7642 X(IMMEDIATE, 0, 0, "IMM_MOV", 0, F(), "an immediate") \
7643 Y(IMMEDIATE, imm_rotate2, "IMM_ROT1", 0, F(FLD_rotate1), \
7645 Y(IMMEDIATE, imm_rotate2, "IMM_ROT2", 0, F(FLD_rotate2), \
7647 Y(IMMEDIATE, imm_rotate1, "IMM_ROT3", 0, F(FLD_rotate3), \
7669 "an address with 7-bit signed immediate offset") \
7671 "an address with 9-bit signed immediate offset") \
7673 "an address with 9-bit negative or unaligned immediate offset") \
7675 "an address with an optional 10-bit scaled, signed immediate offset") \
7677 "an address with 11-bit signed immediate (multiple of 16) offset")\
7679 "an address with scaled, unsigned immediate offset") \
7681 "an address with 13-bit signed immediate (multiple of 16) offset")\
7685 "an address with an optional 8-bit signed immediate offset") \
7687 "a post-indexed address with immediate or register increment") \
7707 "the DSB nXS option qualifier name SY, ISH, NSH, OSH or an optional 5-bit unsigned immediate") \
7709 "the ISB option name SY or an optional 4-bit unsigned immediate") \
7858 Y(IMMEDIATE, sve_aimm, "SVE_AIMM", 0, F(FLD_SVE_imm9), \
7860 Y(IMMEDIATE, sve_asimm, "SVE_ASIMM", 0, F(FLD_SVE_imm9), \
7862 Y(IMMEDIATE, fpimm, "SVE_FPIMM8", 0, F(FLD_SVE_imm8), \
7863 "an 8-bit floating-point immediate") \
7864 Y(IMMEDIATE, sve_float_half_one, "SVE_I1_HALF_ONE", 0, \
7866 Y(IMMEDIATE, sve_float_half_two, "SVE_I1_HALF_TWO", 0, \
7868 Y(IMMEDIATE, sve_float_zero_one, "SVE_I1_ZERO_ONE", 0, \
7870 Y(IMMEDIATE, imm_rotate1, "SVE_IMM_ROT1", 0, F(FLD_SVE_rot1), \
7872 Y(IMMEDIATE, imm_rotate2, "SVE_IMM_ROT2", 0, F(FLD_SVE_rot2), \
7874 Y(IMMEDIATE, imm_rotate1, "SVE_IMM_ROT3", 0, F(FLD_SVE_rot3), \
7876 Y(IMMEDIATE, inv_limm, "SVE_INV_LIMM", 0, \
7878 "an inverted 13-bit logical immediate") \
7879 Y(IMMEDIATE, limm, "SVE_LIMM", 0, \
7881 "a 13-bit logical immediate") \
7882 Y(IMMEDIATE, sve_limm_mov, "SVE_LIMM_MOV", 0, \
7884 "a 13-bit logical move immediate") \
7885 Y(IMMEDIATE, imm, "SVE_PATTERN", 0, F(FLD_SVE_pattern), \
7887 Y(IMMEDIATE, sve_scale, "SVE_PATTERN_SCALED", 0, \
7889 Y(IMMEDIATE, imm, "SVE_PRFOP", 0, F(FLD_SVE_prfop), \
7919 Y(IMMEDIATE, sve_shlimm, "SVE_SHLIMM_PRED", 0, \
7920 F(FLD_SVE_tszh,FLD_SVE_imm5), "a shift-left immediate operand") \
7921 Y(IMMEDIATE, sve_shlimm, "SVE_SHLIMM_UNPRED", 0, \
7922 F(FLD_SVE_tszh,FLD_imm5), "a shift-left immediate operand") \
7923 Y(IMMEDIATE, sve_shlimm, "SVE_SHLIMM_UNPRED_22", 0, \
7925 "a shift-left immediate operand") \
7926 Y(IMMEDIATE, sve_shrimm, "SVE_SHRIMM_PRED", 1 << OPD_F_OD_LSB, \
7927 F(FLD_SVE_tszh,FLD_SVE_imm5), "a shift-right immediate operand") \
7928 Y(IMMEDIATE, sve_shrimm, "SVE_SHRIMM_UNPRED", 1 << OPD_F_OD_LSB, \
7929 F(FLD_SVE_tszh,FLD_imm5), "a shift-right immediate operand") \
7930 Y(IMMEDIATE, sve_shrimm, "SVE_SHRIMM_UNPRED_22", 2 << OPD_F_OD_LSB, \
7932 "a shift-right immediate operand") \
7933 Y(IMMEDIATE, imm, "SVE_SIMM5", OPD_F_SEXT, F(FLD_SVE_imm5), \
7934 "a 5-bit signed immediate") \
7935 Y(IMMEDIATE, imm, "SVE_SIMM5B", OPD_F_SEXT, F(FLD_SVE_imm5b), \
7936 "a 5-bit signed immediate") \
7937 Y(IMMEDIATE, imm, "SVE_SIMM6", OPD_F_SEXT, F(FLD_SVE_imms), \
7938 "a 6-bit signed immediate") \
7939 Y(IMMEDIATE, imm, "SVE_SIMM8", OPD_F_SEXT, F(FLD_SVE_imm8), \
7940 "an 8-bit signed immediate") \
7941 Y(IMMEDIATE, imm, "SVE_UIMM3", 0, F(FLD_SVE_imm3), \
7942 "a 3-bit unsigned immediate") \
7943 Y(IMMEDIATE, imm, "SVE_UIMM7", 0, F(FLD_SVE_imm7), \
7944 "a 7-bit unsigned immediate") \
7945 Y(IMMEDIATE, imm, "SVE_UIMM8", 0, F(FLD_SVE_imm8), \
7946 "an 8-bit unsigned immediate") \
7947 Y(IMMEDIATE, imm, "SVE_UIMM8_53", 0, F(FLD_imm5,FLD_imm3_10), \
7948 "an 8-bit unsigned immediate") \
7949 Y(IMMEDIATE, imm, "SVE_UIMM4", 0, F(FLD_SVE_imm4), \
7950 "a 4-bit unsigned immediate") \
8114 Y(IMMEDIATE, plain_shrimm, "SME_SHRIMM4", 0, F(FLD_SVE_imm4), \
8115 "a shift-right immediate operand") \
8116 Y(IMMEDIATE, sve_shrimm, "SME_SHRIMM5", 1 << OPD_F_OD_LSB, \
8117 F(FLD_SVE_tszh,FLD_SVE_imm5b), "a shift-right immediate operand") \
8185 Y(IMMEDIATE, imm, "SME_VLxN_10", 0, F(FLD_SME_VL_10), \
8187 Y(IMMEDIATE, imm, "SME_VLxN_13", 0, F(FLD_SME_VL_13), \
8190 Y(IMMEDIATE, imm, "SME_ZT0_INDEX", OPD_F_SHIFT_BY_3, \
8192 Y(IMMEDIATE, imm, "SME_ZT0_INDEX_MUL_VL", 0, \
8195 Y(IMMEDIATE, imm, "TME_UIMM16", 0, F(FLD_imm16_5), \
8196 "a 16-bit unsigned immediate for TME tcancel") \
8198 "an indexed SM3 vector immediate") \
8207 Y(IMMEDIATE, imm, "CSSC_SIMM8", OPD_F_SEXT, F(FLD_CSSC_imm8), \
8208 "an 8-bit signed immediate") \
8209 Y(IMMEDIATE, imm, "CSSC_UIMM8", 0, F(FLD_CSSC_imm8), \
8210 "an 8-bit unsigned immediate") \
8224 "an address with an optional 8-bit signed immediate offset")
Indexes created Tue Aug 18 00:25:06 UTC 2026