Lines Matching defs:rsrc
420 /** 0000 0110 mx00 00ss rsrc rdst sub %2%S2, %1 */
426 int rsrc AU = (op[2] >> 4) & 0x0f;
432 "/** 0000 0110 mx00 00ss rsrc rdst sub %2%S2, %1 */",
436 printf (" rsrc = 0x%x,", rsrc);
441 ID(sub); S2Pm(ss, rsrc, mx); SR(rdst); DR(rdst); F_OSZC;
481 /** 0000 0110 mx00 01ss rsrc rdst cmp %2%S2, %1 */
487 int rsrc AU = (op[2] >> 4) & 0x0f;
493 "/** 0000 0110 mx00 01ss rsrc rdst cmp %2%S2, %1 */",
497 printf (" rsrc = 0x%x,", rsrc);
502 ID(sub); S2Pm(ss, rsrc, mx); SR(rdst); F_OSZC;
545 /** 0000 0110 mx00 10ss rsrc rdst add %1%S1, %0 */
551 int rsrc AU = (op[2] >> 4) & 0x0f;
557 "/** 0000 0110 mx00 10ss rsrc rdst add %1%S1, %0 */",
561 printf (" rsrc = 0x%x,", rsrc);
566 ID(add); SPm(ss, rsrc, mx); DR(rdst); F_OSZC;
606 /** 0000 0110 mx00 11ss rsrc rdst mul %1%S1, %0 */
612 int rsrc AU = (op[2] >> 4) & 0x0f;
618 "/** 0000 0110 mx00 11ss rsrc rdst mul %1%S1, %0 */",
622 printf (" rsrc = 0x%x,", rsrc);
627 ID(mul); SPm(ss, rsrc, mx); DR(rdst); F_____;
667 /** 0000 0110 mx01 00ss rsrc rdst and %1%S1, %0 */
673 int rsrc AU = (op[2] >> 4) & 0x0f;
679 "/** 0000 0110 mx01 00ss rsrc rdst and %1%S1, %0 */",
683 printf (" rsrc = 0x%x,", rsrc);
688 ID(and); SPm(ss, rsrc, mx); DR(rdst); F__SZ_;
728 /** 0000 0110 mx01 01ss rsrc rdst or %1%S1, %0 */
734 int rsrc AU = (op[2] >> 4) & 0x0f;
740 "/** 0000 0110 mx01 01ss rsrc rdst or %1%S1, %0 */",
744 printf (" rsrc = 0x%x,", rsrc);
749 ID(or); SPm(ss, rsrc, mx); DR(rdst); F__SZ_;
793 /** 0000 0110 mx10 00sp 0000 0000 rsrc rdst sbb %1%S1, %0 */
799 int rsrc AU = (op[3] >> 4) & 0x0f;
805 "/** 0000 0110 mx10 00sp 0000 0000 rsrc rdst sbb %1%S1, %0 */",
809 printf (" rsrc = 0x%x,", rsrc);
814 ID(sbb); SPm(sp, rsrc, mx); DR(rdst); F_OSZC;
830 /** 0000 0110 mx10 00ss 0000 0100 rsrc rdst max %1%S1, %0 */
836 int rsrc AU = (op[3] >> 4) & 0x0f;
842 "/** 0000 0110 mx10 00ss 0000 0100 rsrc rdst max %1%S1, %0 */",
846 printf (" rsrc = 0x%x,", rsrc);
851 ID(max); SPm(ss, rsrc, mx); DR(rdst);
867 /** 0000 0110 mx10 00ss 0000 0101 rsrc rdst min %1%S1, %0 */
873 int rsrc AU = (op[3] >> 4) & 0x0f;
879 "/** 0000 0110 mx10 00ss 0000 0101 rsrc rdst min %1%S1, %0 */",
883 printf (" rsrc = 0x%x,", rsrc);
888 ID(min); SPm(ss, rsrc, mx); DR(rdst);
904 /** 0000 0110 mx10 00ss 0000 0110 rsrc rdst emul %1%S1, %0 */
910 int rsrc AU = (op[3] >> 4) & 0x0f;
916 "/** 0000 0110 mx10 00ss 0000 0110 rsrc rdst emul %1%S1, %0 */",
920 printf (" rsrc = 0x%x,", rsrc);
925 ID(emul); SPm(ss, rsrc, mx); DR(rdst);
941 /** 0000 0110 mx10 00ss 0000 0111 rsrc rdst emulu %1%S1, %0 */
947 int rsrc AU = (op[3] >> 4) & 0x0f;
953 "/** 0000 0110 mx10 00ss 0000 0111 rsrc rdst emulu %1%S1, %0 */",
957 printf (" rsrc = 0x%x,", rsrc);
962 ID(emulu); SPm(ss, rsrc, mx); DR(rdst);
978 /** 0000 0110 mx10 00ss 0000 1000 rsrc rdst div %1%S1, %0 */
984 int rsrc AU = (op[3] >> 4) & 0x0f;
990 "/** 0000 0110 mx10 00ss 0000 1000 rsrc rdst div %1%S1, %0 */",
994 printf (" rsrc = 0x%x,", rsrc);
999 ID(div); SPm(ss, rsrc, mx); DR(rdst); F_O___;
1015 /** 0000 0110 mx10 00ss 0000 1001 rsrc rdst divu %1%S1, %0 */
1021 int rsrc AU = (op[3] >> 4) & 0x0f;
1027 "/** 0000 0110 mx10 00ss 0000 1001 rsrc rdst divu %1%S1, %0 */",
1031 printf (" rsrc = 0x%x,", rsrc);
1036 ID(divu); SPm(ss, rsrc, mx); DR(rdst); F_O___;
1052 /** 0000 0110 mx10 00ss 0000 1100 rsrc rdst tst %1%S1, %2 */
1058 int rsrc AU = (op[3] >> 4) & 0x0f;
1064 "/** 0000 0110 mx10 00ss 0000 1100 rsrc rdst tst %1%S1, %2 */",
1068 printf (" rsrc = 0x%x,", rsrc);
1073 ID(and); SPm(ss, rsrc, mx); S2R(rdst); F__SZ_;
1089 /** 0000 0110 mx10 00ss 0000 1101 rsrc rdst xor %1%S1, %0 */
1095 int rsrc AU = (op[3] >> 4) & 0x0f;
1101 "/** 0000 0110 mx10 00ss 0000 1101 rsrc rdst xor %1%S1, %0 */",
1105 printf (" rsrc = 0x%x,", rsrc);
1110 ID(xor); SPm(ss, rsrc, mx); DR(rdst); F__SZ_;
1126 /** 0000 0110 mx10 00ss 0001 0000 rsrc rdst xchg %1%S1, %0 */
1132 int rsrc AU = (op[3] >> 4) & 0x0f;
1138 "/** 0000 0110 mx10 00ss 0001 0000 rsrc rdst xchg %1%S1, %0 */",
1142 printf (" rsrc = 0x%x,", rsrc);
1147 ID(xchg); DR(rdst); SPm(ss, rsrc, mx);
1163 /** 0000 0110 mx10 00sd 0001 0001 rsrc rdst itof %1%S1, %0 */
1169 int rsrc AU = (op[3] >> 4) & 0x0f;
1175 "/** 0000 0110 mx10 00sd 0001 0001 rsrc rdst itof %1%S1, %0 */",
1179 printf (" rsrc = 0x%x,", rsrc);
1184 ID(itof); DR (rdst); SPm(sd, rsrc, mx); F__SZ_;
1200 /** 0000 0110 mx10 00sd 0001 0101 rsrc rdst utof %1%S1, %0 */
1206 int rsrc AU = (op[3] >> 4) & 0x0f;
1212 "/** 0000 0110 mx10 00sd 0001 0101 rsrc rdst utof %1%S1, %0 */",
1216 printf (" rsrc = 0x%x,", rsrc);
1221 ID(utof); DR (rdst); SPm(sd, rsrc, mx); F__SZ_;
2490 /** 0000 0110 1010 00ss 0000 0010 rsrc rdst adc %1%S1, %0 */
2494 int rsrc AU = (op[3] >> 4) & 0x0f;
2500 "/** 0000 0110 1010 00ss 0000 0010 rsrc rdst adc %1%S1, %0 */",
2503 printf (" rsrc = 0x%x,", rsrc);
2508 ID(adc); SPm(ss, rsrc, 2); DR(rdst); F_OSZC;
3917 /** 0100 00ss rsrc rdst sub %2%S2, %1 */
3921 int rsrc AU = (op[1] >> 4) & 0x0f;
3927 "/** 0100 00ss rsrc rdst sub %2%S2, %1 */",
3930 printf (" rsrc = 0x%x,", rsrc);
3935 ID(sub); S2P(ss, rsrc); SR(rdst); DR(rdst); F_OSZC;
3975 /** 0100 01ss rsrc rdst cmp %2%S2, %1 */
3979 int rsrc AU = (op[1] >> 4) & 0x0f;
3985 "/** 0100 01ss rsrc rdst cmp %2%S2, %1 */",
3988 printf (" rsrc = 0x%x,", rsrc);
3993 ID(sub); S2P(ss, rsrc); SR(rdst); F_OSZC;
4033 /** 0100 10ss rsrc rdst add %1%S1, %0 */
4037 int rsrc AU = (op[1] >> 4) & 0x0f;
4043 "/** 0100 10ss rsrc rdst add %1%S1, %0 */",
4046 printf (" rsrc = 0x%x,", rsrc);
4051 ID(add); SP(ss, rsrc); DR(rdst); F_OSZC;
4091 /** 0100 11ss rsrc rdst mul %1%S1, %0 */
4095 int rsrc AU = (op[1] >> 4) & 0x0f;
4101 "/** 0100 11ss rsrc rdst mul %1%S1, %0 */",
4104 printf (" rsrc = 0x%x,", rsrc);
4109 ID(mul); SP(ss, rsrc); DR(rdst); F_____;
4149 /** 0101 00ss rsrc rdst and %1%S1, %0 */
4153 int rsrc AU = (op[1] >> 4) & 0x0f;
4159 "/** 0101 00ss rsrc rdst and %1%S1, %0 */",
4162 printf (" rsrc = 0x%x,", rsrc);
4167 ID(and); SP(ss, rsrc); DR(rdst); F__SZ_;
4207 /** 0101 01ss rsrc rdst or %1%S1, %0 */
4211 int rsrc AU = (op[1] >> 4) & 0x0f;
4217 "/** 0101 01ss rsrc rdst or %1%S1, %0 */",
4220 printf (" rsrc = 0x%x,", rsrc);
4225 ID(or); SP(ss, rsrc); DR(rdst); F__SZ_;
4265 /** 0101 1 s ss rsrc rdst movu%s %1, %0 */
4271 int rsrc AU = (op[1] >> 4) & 0x0f;
4277 "/** 0101 1 s ss rsrc rdst movu%s %1, %0 */",
4281 rsrc = 0x%x,", rsrc);
4286 ID(mov); uBW(s); SD(ss, rsrc, s); DR(rdst); F_____;
4749 /** 0111 00im rsrc rdst add #%1, %2, %0 */
4753 int rsrc AU = (op[1] >> 4) & 0x0f;
4759 "/** 0111 00im rsrc rdst add #%1, %2, %0 */",
4762 printf (" rsrc = 0x%x,", rsrc);
4767 ID(add); SC(IMMex(im)); S2R(rsrc); DR(rdst); F_OSZC;
4807 /** 0111 01im 0000 rsrc cmp #%2, %1%S1 */
4811 int rsrc AU = op[1] & 0x0f;
4815 "/** 0111 01im 0000 rsrc cmp #%2, %1%S1 */",
4818 printf (" rsrc = 0x%x\n", rsrc);
4822 ID(sub); SR(rsrc); S2C(IMMex(im)); F_OSZC;
5040 /** 0111 0101 0101 rsrc cmp #%2, %1 */
5042 int rsrc AU = op[1] & 0x0f;
5046 "/** 0111 0101 0101 rsrc cmp #%2, %1 */",
5048 printf (" rsrc = 0x%x\n", rsrc);
5052 ID(sub); SR(rsrc); S2C(IMM(1)); F_OSZC;
5471 /** 0111 0110 1001 0000 rsrc 1100 rdst 0000 dmov.d %1, %0 */
5473 int rsrc AU = (op[2] >> 4) & 0x0f;
5479 "/** 0111 0110 1001 0000 rsrc 1100 rdst 0000 dmov.d %1, %0 */",
5481 printf (" rsrc = 0x%x,", rsrc);
5486 ID(dmov); DDR(rdst); SDR(rsrc); F_____;
5493 /** 0111 0110 1001 0000 rsrc 1100 rdst 0001 dabs %1, %0 */
5495 int rsrc AU = (op[2] >> 4) & 0x0f;
5501 "/** 0111 0110 1001 0000 rsrc 1100 rdst 0001 dabs %1, %0 */",
5503 printf (" rsrc = 0x%x,", rsrc);
5508 ID(dabs); DDR(rdst); SDR(rsrc); F_____;
5515 /** 0111 0110 1001 0000 rsrc 1100 rdst 0010 dneg %1, %0 */
5517 int rsrc AU = (op[2] >> 4) & 0x0f;
5523 "/** 0111 0110 1001 0000 rsrc 1100 rdst 0010 dneg %1, %0 */",
5525 printf (" rsrc = 0x%x,", rsrc);
5530 ID(dneg); DDR(rdst); SDR(rsrc); F_____;
5544 /** 0111 0110 1001 0000 rsrc 1101 rdst 0000 dsqrt %1, %0 */
5546 int rsrc AU = (op[2] >> 4) & 0x0f;
5552 "/** 0111 0110 1001 0000 rsrc 1101 rdst 0000 dsqrt %1, %0 */",
5554 printf (" rsrc = 0x%x,", rsrc);
5559 ID(dsqrt); DDR(rdst); SDR(rsrc); F_____;
5566 /** 0111 0110 1001 0000 rsrc 1101 rdst 1000 dtoi %1, %0 */
5568 int rsrc AU = (op[2] >> 4) & 0x0f;
5574 "/** 0111 0110 1001 0000 rsrc 1101 rdst 1000 dtoi %1, %0 */",
5576 printf (" rsrc = 0x%x,", rsrc);
5581 ID(dtoi); DDR(rdst); SDR(rsrc); F_____;
5588 /** 0111 0110 1001 0000 rsrc 1101 rdst 1001 dtou %1, %0 */
5590 int rsrc AU = (op[2] >> 4) & 0x0f;
5596 "/** 0111 0110 1001 0000 rsrc 1101 rdst 1001 dtou %1, %0 */",
5598 printf (" rsrc = 0x%x,", rsrc);
5603 ID(dtou); DDR(rdst); SDR(rsrc); F_____;
5610 /** 0111 0110 1001 0000 rsrc 1101 rdst 1100 dtof %1, %0 */
5612 int rsrc AU = (op[2] >> 4) & 0x0f;
5618 "/** 0111 0110 1001 0000 rsrc 1101 rdst 1100 dtof %1, %0 */",
5620 printf (" rsrc = 0x%x,", rsrc);
5625 ID(dtof); DDR(rdst); SDR(rsrc); F_____;
5632 /** 0111 0110 1001 0000 rsrc 1101 rdst 1101 dround %1, %0 */
5634 int rsrc AU = (op[2] >> 4) & 0x0f;
5640 "/** 0111 0110 1001 0000 rsrc 1101 rdst 1101 dround %1, %0 */",
5642 printf (" rsrc = 0x%x,", rsrc);
5647 ID(dround); DDR(rdst); SDR(rsrc); F_____;
7163 /** 0111 1110 10sz rsrc push%s %1 */
7167 int rsrc AU = op[1] & 0x0f;
7171 "/** 0111 1110 10sz rsrc push%s %1 */",
7174 printf (" rsrc = 0x%x\n", rsrc);
7178 ID(mov); BWL(sz); OP(0, RX_Operand_Predec, 0, 0); SR(rsrc); F_____;
7262 /** 0111 1111 0000 rsrc jmp %0 */
7264 int rsrc AU = op[1] & 0x0f;
7268 "/** 0111 1111 0000 rsrc jmp %0 */",
7270 printf (" rsrc = 0x%x\n", rsrc);
7274 ID(branch); DR(rsrc);
7295 /** 0111 1111 0001 rsrc jsr %0 */
7297 int rsrc AU = op[1] & 0x0f;
7301 "/** 0111 1111 0001 rsrc jsr %0 */",
7303 printf (" rsrc = 0x%x\n", rsrc);
7307 ID(jsr); DR(rsrc);
7328 /** 0111 1111 0100 rsrc bra.l %0 */
7330 int rsrc AU = op[1] & 0x0f;
7334 "/** 0111 1111 0100 rsrc bra.l %0 */",
7336 printf (" rsrc = 0x%x\n", rsrc);
7340 ID(branchrel); DR(rsrc);
7362 /** 0111 1111 0101 rsrc bsr.l %0 */
7364 int rsrc AU = op[1] & 0x0f;
7368 "/** 0111 1111 0101 rsrc bsr.l %0 */",
7370 printf (" rsrc = 0x%x\n", rsrc);
7374 ID(jsrrel); DR(rsrc);
8335 /** 11sz sd ss rsrc rdst mov%s %1, %0 */
8343 int rsrc AU = (op[1] >> 4) & 0x0f;
8349 "/** 11sz sd ss rsrc rdst mov%s %1, %0 */",
8354 printf (" rsrc = 0x%x,", rsrc);
8359 if (sd == 3 && ss == 3 && sz == 2 && rsrc == 0 && rdst == 0)
8369 SD(ss, rdst, sz); DD(sd, rsrc, sz);
8373 SD(ss, rsrc, sz); DD(sd, rdst, sz);
8929 /** 1111 01ss rsrc 10sz push%s %1 */
8933 int rsrc AU = (op[1] >> 4) & 0x0f;
8939 "/** 1111 01ss rsrc 10sz push%s %1 */",
8942 printf (" rsrc = 0x%x,", rsrc);
8947 ID(mov); BWL(sz); OP(0, RX_Operand_Predec, 0, 0); SD(ss, rsrc, sz); F_____;
9322 /** 1111 1100 0000 0011 rsrc rdst sbb %1, %0 */
9324 int rsrc AU = (op[2] >> 4) & 0x0f;
9330 "/** 1111 1100 0000 0011 rsrc rdst sbb %1, %0 */",
9332 printf (" rsrc = 0x%x,", rsrc);
9337 ID(sbb); SR (rsrc); DR(rdst); F_OSZC;
9350 /** 1111 1100 0000 0111 rsrc rdst neg %2, %0 */
9352 int rsrc AU = (op[2] >> 4) & 0x0f;
9358 "/** 1111 1100 0000 0111 rsrc rdst neg %2, %0 */",
9360 printf (" rsrc = 0x%x,", rsrc);
9365 ID(sub); DR(rdst); SC(0); S2R(rsrc); F_OSZC;
9380 /** 1111 1100 0000 1011 rsrc rdst adc %1, %0 */
9382 int rsrc AU = (op[2] >> 4) & 0x0f;
9388 "/** 1111 1100 0000 1011 rsrc rdst adc %1, %0 */",
9390 printf (" rsrc = 0x%x,", rsrc);
9395 ID(adc); SR(rsrc); DR(rdst); F_OSZC;
9407 /** 1111 1100 0000 1111 rsrc rdst abs %1, %0 */
9409 int rsrc AU = (op[2] >> 4) & 0x0f;
9415 "/** 1111 1100 0000 1111 rsrc rdst abs %1, %0 */",
9417 printf (" rsrc = 0x%x,", rsrc);
9422 ID(abs); DR(rdst); SR(rsrc); F_OSZ_;
9438 /** 1111 1100 0001 00ss rsrc rdst max %1%S1, %0 */
9442 int rsrc AU = (op[2] >> 4) & 0x0f;
9448 "/** 1111 1100 0001 00ss rsrc rdst max %1%S1, %0 */",
9451 printf (" rsrc = 0x%x,", rsrc);
9456 if (ss == 3 && rsrc == 0 && rdst == 0)
9463 ID(max); SP(ss, rsrc); DR(rdst);
9504 /** 1111 1100 0001 01ss rsrc rdst min %1%S1, %0 */
9508 int rsrc AU = (op[2] >> 4) & 0x0f;
9514 "/** 1111 1100 0001 01ss rsrc rdst min %1%S1, %0 */",
9517 printf (" rsrc = 0x%x,", rsrc);
9522 ID(min); SP(ss, rsrc); DR(rdst);
9562 /** 1111 1100 0001 10ss rsrc rdst emul %1%S1, %0 */
9566 int rsrc AU = (op[2] >> 4) & 0x0f;
9572 "/** 1111 1100 0001 10ss rsrc rdst emul %1%S1, %0 */",
9575 printf (" rsrc = 0x%x,", rsrc);
9580 ID(emul); SP(ss, rsrc); DR(rdst);
9620 /** 1111 1100 0001 11ss rsrc rdst emulu %1%S1, %0 */
9624 int rsrc AU = (op[2] >> 4) & 0x0f;
9630 "/** 1111 1100 0001 11ss rsrc rdst emulu %1%S1, %0 */",
9633 printf (" rsrc = 0x%x,", rsrc);
9638 ID(emulu); SP(ss, rsrc); DR(rdst);
9678 /** 1111 1100 0010 00ss rsrc rdst div %1%S1, %0 */
9682 int rsrc AU = (op[2] >> 4) & 0x0f;
9688 "/** 1111 1100 0010 00ss rsrc rdst div %1%S1, %0 */",
9691 printf (" rsrc = 0x%x,", rsrc);
9696 ID(div); SP(ss, rsrc); DR(rdst); F_O___;
9736 /** 1111 1100 0010 01ss rsrc rdst divu %1%S1, %0 */
9740 int rsrc AU = (op[2] >> 4) & 0x0f;
9746 "/** 1111 1100 0010 01ss rsrc rdst divu %1%S1, %0 */",
9749 printf (" rsrc = 0x%x,", rsrc);
9754 ID(divu); SP(ss, rsrc); DR(rdst); F_O___;
9794 /** 1111 1100 0011 00ss rsrc rdst tst %1%S1, %2 */
9798 int rsrc AU = (op[2] >> 4) & 0x0f;
9804 "/** 1111 1100 0011 00ss rsrc rdst tst %1%S1, %2 */",
9807 printf (" rsrc = 0x%x,", rsrc);
9812 ID(and); SP(ss, rsrc); S2R(rdst); F__SZ_;
9852 /** 1111 1100 0011 01ss rsrc rdst xor %1%S1, %0 */
9856 int rsrc AU = (op[2] >> 4) & 0x0f;
9862 "/** 1111 1100 0011 01ss rsrc rdst xor %1%S1, %0 */",
9865 printf (" rsrc = 0x%x,", rsrc);
9870 ID(xor); SP(ss, rsrc); DR(rdst); F__SZ_;
9909 /** 1111 1100 0011 1011 rsrc rdst not %1, %0 */
9911 int rsrc AU = (op[2] >> 4) & 0x0f;
9917 "/** 1111 1100 0011 1011 rsrc rdst not %1, %0 */",
9919 printf (" rsrc = 0x%x,", rsrc);
9924 ID(xor); DR(rdst); SR(rsrc); S2C(~0); F__SZ_;
9940 /** 1111 1100 0100 00ss rsrc rdst xchg %1%S1, %0 */
9944 int rsrc AU = (op[2] >> 4) & 0x0f;
9950 "/** 1111 1100 0100 00ss rsrc rdst xchg %1%S1, %0 */",
9953 printf (" rsrc = 0x%x,", rsrc);
9958 ID(xchg); DR(rdst); SP(ss, rsrc);
9998 /** 1111 1100 0100 01sd rsrc rdst itof %1%S1, %0 */
10002 int rsrc AU = (op[2] >> 4) & 0x0f;
10008 "/** 1111 1100 0100 01sd rsrc rdst itof %1%S1, %0 */",
10011 printf (" rsrc = 0x%x,", rsrc);
10016 ID(itof); DR (rdst); SP(sd, rsrc); F__SZ_;
10055 /** 1111 1100 0100 1011 rsrc rdst stz %1, %0 */
10057 int rsrc AU = (op[2] >> 4) & 0x0f;
10063 "/** 1111 1100 0100 1011 rsrc rdst stz %1, %0 */",
10065 printf (" rsrc = 0x%x,", rsrc);
10070 ID(stcc); SR(rsrc); DR(rdst); S2cc(RXC_z);
10082 /** 1111 1100 0100 1111 rsrc rdst stnz %1, %0 */
10084 int rsrc AU = (op[2] >> 4) & 0x0f;
10090 "/** 1111 1100 0100 1111 rsrc rdst stnz %1, %0 */",
10092 printf (" rsrc = 0x%x,", rsrc);
10097 ID(stcc); SR(rsrc); DR(rdst); S2cc(RXC_nz);
10110 /** 1111 1100 0101 01sd rsrc rdst utof %1%S1, %0 */
10114 int rsrc AU = (op[2] >> 4) & 0x0f;
10120 "/** 1111 1100 0101 01sd rsrc rdst utof %1%S1, %0 */",
10123 printf (" rsrc = 0x%x,", rsrc);
10128 ID(utof); DR (rdst); SP(sd, rsrc); F__SZ_;
10167 /** 1111 1100 0101 1010 rsrc rdst bfmovz %bf */
10169 int rsrc AU = (op[2] >> 4) & 0x0f;
10175 "/** 1111 1100 0101 1010 rsrc rdst bfmovz %bf */",
10177 printf (" rsrc = 0x%x,", rsrc);
10182 ID(bfmovz); DR(rdst); SR(rsrc); S2C(IMM(2)); F_____;
10194 /** 1111 1100 0101 1110 rsrc rdst bfmov %bf */
10196 int rsrc AU = (op[2] >> 4) & 0x0f;
10202 "/** 1111 1100 0101 1110 rsrc rdst bfmov %bf */",
10204 printf (" rsrc = 0x%x,", rsrc);
10209 ID(bfmov); DR(rdst); SR(rsrc); S2C(IMM(2)); F_____;
10222 /** 1111 1100 0110 00sd rdst rsrc bset %1, %0%S0 */
10228 int rsrc AU = op[2] & 0x0f;
10232 "/** 1111 1100 0110 00sd rdst rsrc bset %1, %0%S0 */",
10236 printf (" rsrc = 0x%x\n", rsrc);
10240 ID(bset); BWL(BSIZE); SR(rsrc); DD(sd, rdst, BSIZE); F_____;
10282 rsrc bclr %1, %0%S0 */
10288 int rsrc AU = op[2] & 0x0f;
10292 "/** 1111 1100 0110 01sd rdst rsrc bclr %1, %0%S0 */",
10296 printf (" rsrc = 0x%x\n", rsrc);
10300 ID(bclr); BWL(BSIZE); SR(rsrc); DD(sd, rdst, BSIZE); F_____;
10342 /** 1111 1100 0110 10sd rdst rsrc btst %2, %1%S1 */
10348 int rsrc AU = op[2] & 0x0f;
10352 "/** 1111 1100 0110 10sd rdst rsrc btst %2, %1%S1 */",
10356 printf (" rsrc = 0x%x\n", rsrc);
10360 ID(btst); BWL(BSIZE); S2R(rsrc); SD(sd, rdst, BSIZE); F___ZC;
10402 /** 1111 1100 0110 11sd rdst rsrc bnot %1, %0%S0 */
10408 int rsrc AU = op[2] & 0x0f;
10412 "/** 1111 1100 0110 11sd rdst rsrc bnot %1, %0%S0 */",
10416 printf (" rsrc = 0x%x\n", rsrc);
10420 ID(bnot); BWL(BSIZE); SR(rsrc); DD(sd, rdst, BSIZE);
10477 int rsrc;
10479 rsrc = GETBYTE();
10480 if (rsrc & 0x0f)
10483 ID(dmov); SDR(rsrc >> 4); F_____;
10518 /** 1111 1100 1000 00sd rsrc rdst fsub %1%S1, %0 */
10522 int rsrc AU = (op[2] >> 4) & 0x0f;
10528 "/** 1111 1100 1000 00sd rsrc rdst fsub %1%S1, %0 */",
10531 printf (" rsrc = 0x%x,", rsrc);
10536 ID(fsub); DR(rdst); SD(sd, rsrc, LSIZE); F__SZ_;
10576 /** 1111 1100 1000 01sd rsrc rdst fcmp %1%S1, %0 */
10580 int rsrc AU = (op[2] >> 4) & 0x0f;
10586 "/** 1111 1100 1000 01sd rsrc rdst fcmp %1%S1, %0 */",
10589 printf (" rsrc = 0x%x,", rsrc);
10594 ID(fcmp); DR(rdst); SD(sd, rsrc, LSIZE); F_OSZ_;
10634 /** 1111 1100 1000 10sd rsrc rdst fadd %1%S1, %0 */
10638 int rsrc AU = (op[2] >> 4) & 0x0f;
10644 "/** 1111 1100 1000 10sd rsrc rdst fadd %1%S1, %0 */",
10647 printf (" rsrc = 0x%x,", rsrc);
10652 ID(fadd); DR(rdst); SD(sd, rsrc, LSIZE); F__SZ_;
10692 /** 1111 1100 1000 11sd rsrc rdst fmul %1%S1, %0 */
10696 int rsrc AU = (op[2] >> 4) & 0x0f;
10702 "/** 1111 1100 1000 11sd rsrc rdst fmul %1%S1, %0 */",
10705 printf (" rsrc = 0x%x,", rsrc);
10710 ID(fmul); DR(rdst); SD(sd, rsrc, LSIZE); F__SZ_;
10750 /** 1111 1100 1001 00sd rsrc rdst fdiv %1%S1, %0 */
10754 int rsrc AU = (op[2] >> 4) & 0x0f;
10760 "/** 1111 1100 1001 00sd rsrc rdst fdiv %1%S1, %0 */",
10763 printf (" rsrc = 0x%x,", rsrc);
10768 ID(fdiv); DR(rdst); SD(sd, rsrc, LSIZE); F__SZ_;
10808 /** 1111 1100 1001 01sd rsrc rdst ftoi %1%S1, %0 */
10812 int rsrc AU = (op[2] >> 4) & 0x0f;
10818 "/** 1111 1100 1001 01sd rsrc rdst ftoi %1%S1, %0 */",
10821 printf (" rsrc = 0x%x,", rsrc);
10826 ID(ftoi); DR(rdst); SD(sd, rsrc, LSIZE); F__SZ_;
10866 /** 1111 1100 1001 10sd rsrc rdst round %1%S1, %0 */
10870 int rsrc AU = (op[2] >> 4) & 0x0f;
10876 "/** 1111 1100 1001 10sd rsrc rdst round %1%S1, %0 */",
10879 printf (" rsrc = 0x%x,", rsrc);
10884 ID(round); DR(rdst); SD(sd, rsrc, LSIZE); F__SZ_;
10924 /** 1111 1100 1010 00sd rsrc rdst fsqrt %1%S1, %0 */
10928 int rsrc AU = (op[2] >> 4) & 0x0f;
10934 "/** 1111 1100 1010 00sd rsrc rdst fsqrt %1%S1, %0 */",
10937 printf (" rsrc = 0x%x,", rsrc);
10942 ID(fsqrt); DR(rdst); SD(sd, rsrc, LSIZE); F__SZ_;
10982 /** 1111 1100 1010 01sd rsrc rdst ftou %1%S1, %0 */
10986 int rsrc AU = (op[2] >> 4) & 0x0f;
10992 "/** 1111 1100 1010 01sd rsrc rdst ftou %1%S1, %0 */",
10995 printf (" rsrc = 0x%x,", rsrc);
11000 ID(ftou); DR(rdst); SD(sd, rsrc, LSIZE); F__SZ_;
11040 /** 1111 1100 1100 10sz rsrc 1000 dmov.d %1, %0 */
11044 int rsrc AU = (op[2] >> 4) & 0x0f;
11048 "/** 1111 1100 1100 10sz rsrc 1000 dmov.d %1, %0 */",
11051 printf (" rsrc = 0x%x\n", rsrc);
11056 rx_disp(1, sz, rsrc, RX_Double, ld);
12437 /** 1111 1101 0001 0111 a000 rsrc mvtachi %1, %0 */
12441 int rsrc AU = op[2] & 0x0f;
12445 "/** 1111 1101 0001 0111 a000 rsrc mvtachi %1, %0 */",
12448 printf (" rsrc = 0x%x\n", rsrc);
12452 ID(mvtachi); DR(a+32); SR(rsrc); F_____;
12458 /** 1111 1101 0001 0111 a001 rsrc mvtaclo %1, %0 */
12462 int rsrc AU = op[2] & 0x0f;
12466 "/** 1111 1101 0001 0111 a001 rsrc mvtaclo %1, %0 */",
12469 printf (" rsrc = 0x%x\n", rsrc);
12473 ID(mvtaclo); DR(a+32); SR(rsrc); F_____;
12479 /** 1111 1101 0001 0111 a011 rsrc mvtacgu %1, %0 */
12483 int rsrc AU = op[2] & 0x0f;
12487 "/** 1111 1101 0001 0111 a011 rsrc mvtacgu %1, %0 */",
12490 printf (" rsrc = 0x%x\n", rsrc);
12494 ID(mvtacgu); SR(rsrc); DR(a+32); F_____;
12745 /** 1111 1101 0010 0p sz rdst rsrc mov%s %1, %0 */
12753 int rsrc AU = op[2] & 0x0f;
12757 "/** 1111 1101 0010 0p sz rdst rsrc mov%s %1, %0 */",
12762 printf (" rsrc = 0x%x\n", rsrc);
12766 ID(mov); sBWL (sz); SR(rsrc); F_____;
12824 /** 1111 1101 0010 0111 rdst rsrc movco %1, [%0] */
12828 int rsrc AU = op[2] & 0x0f;
12832 "/** 1111 1101 0010 0111 rdst rsrc movco %1, [%0] */",
12835 printf (" rsrc = 0x%x\n", rsrc);
12839 ID(movco); SR(rsrc); DR(rdst); F_____;
12852 /** 1111 1101 0010 1p sz rsrc rdst mov%s %1, %0 */
12858 int rsrc AU = (op[2] >> 4) & 0x0f;
12864 "/** 1111 1101 0010 1p sz rsrc rdst mov%s %1, %0 */",
12868 printf (" rsrc = 0x%x,", rsrc);
12874 OP(1, p ? RX_Operand_Predec : RX_Operand_Postinc, rsrc, 0);
12931 /** 1111 1101 0010 1111 rsrc rdst movli [%1], %0 */
12933 int rsrc AU = (op[2] >> 4) & 0x0f;
12939 "/** 1111 1101 0010 1111 rsrc rdst movli [%1], %0 */",
12941 printf (" rsrc = 0x%x,", rsrc);
12946 ID(movli); SR(rsrc); DR(rdst); F_____;
12959 /** 1111 1101 0011 1p sz rsrc rdst movu%s %1, %0 */
12965 int rsrc AU = (op[2] >> 4) & 0x0f;
12971 "/** 1111 1101 0011 1p sz rsrc rdst movu%s %1, %0 */",
12975 printf (" rsrc = 0x%x,", rsrc);
12981 OP(1, p ? RX_Operand_Predec : RX_Operand_Postinc, rsrc, 0);
13201 /** 1111 1101 0110 0000 rsrc rdst shlr %2, %0 */
13203 int rsrc AU = (op[2] >> 4) & 0x0f;
13209 "/** 1111 1101 0110 0000 rsrc rdst shlr %2, %0 */",
13211 printf (" rsrc = 0x%x,", rsrc);
13216 ID(shlr); S2R(rsrc); SR(rdst); DR(rdst); F__SZC;
13228 /** 1111 1101 0110 0001 rsrc rdst shar %2, %0 */
13230 int rsrc AU = (op[2] >> 4) & 0x0f;
13236 "/** 1111 1101 0110 0001 rsrc rdst shar %2, %0 */",
13238 printf (" rsrc = 0x%x,", rsrc);
13243 ID(shar); S2R(rsrc); SR(rdst); DR(rdst); F_0SZC;
13255 /** 1111 1101 0110 0010 rsrc rdst shll %2, %0 */
13257 int rsrc AU = (op[2] >> 4) & 0x0f;
13263 "/** 1111 1101 0110 0010 rsrc rdst shll %2, %0 */",
13265 printf (" rsrc = 0x%x,", rsrc);
13270 ID(shll); S2R(rsrc); SR(rdst); DR(rdst); F_OSZC;
13282 /** 1111 1101 0110 0100 rsrc rdst rotr %1, %0 */
13284 int rsrc AU = (op[2] >> 4) & 0x0f;
13290 "/** 1111 1101 0110 0100 rsrc rdst rotr %1, %0 */",
13292 printf (" rsrc = 0x%x,", rsrc);
13297 ID(rotr); SR(rsrc); DR(rdst); F__SZC;
13309 rsrc rdst revw %1, %0 */
13311 int rsrc AU = (op[2] >> 4) & 0x0f;
13317 "/** 1111 1101 0110 0101 rsrc rdst revw %1, %0 */",
13319 printf (" rsrc = 0x%x,", rsrc);
13324 ID(revw); SR(rsrc); DR(rdst);
13336 /** 1111 1101 0110 0110 rsrc rdst rotl %1, %0 */
13338 int rsrc AU = (op[2] >> 4) & 0x0f;
13344 "/** 1111 1101 0110 0110 rsrc rdst rotl %1, %0 */",
13346 printf (" rsrc = 0x%x,", rsrc);
13351 ID(rotl); SR(rsrc); DR(rdst); F__SZC;
13363 /** 1111 1101 0110 0111 rsrc rdst revl %1, %0 */
13365 int rsrc AU = (op[2] >> 4) & 0x0f;
13371 "/** 1111 1101 0110 0111 rsrc rdst revl %1, %0 */",
13373 printf (" rsrc = 0x%x,", rsrc);
13378 ID(revl); SR(rsrc); DR(rdst);
13394 /** 1111 1101 0110 100c rsrc rdst mvtc %1, %0 */
13398 int rsrc AU = (op[2] >> 4) & 0x0f;
13404 "/** 1111 1101 0110 100c rsrc rdst mvtc %1, %0 */",
13407 printf (" rsrc = 0x%x,", rsrc);
13412 ID(mov); SR(rsrc); DR(c*16+rdst + 16);
13434 /** 1111 1101 0110 101s rsrc rdst mvfc %1, %0 */
13438 int rsrc AU = (op[2] >> 4) & 0x0f;
13444 "/** 1111 1101 0110 101s rsrc rdst mvfc %1, %0 */",
13447 printf (" rsrc = 0x%x,", rsrc);
13452 ID(mov); SR((s*16+rsrc) + 16); DR(rdst);
13989 /** 1111 1101 0111 0101 1000 rdst rsrc 0000 dmov.l %1, %0 */
13993 int rsrc AU = (op[3] >> 4) & 0x0f;
13997 "/** 1111 1101 0111 0101 1000 rdst rsrc 0000 dmov.l %1, %0 */",
14000 printf (" rsrc = 0x%x\n", rsrc);
14004 ID(dmov); DR(rdst); SDRL(rsrc); F_____;
14011 /** 1111 1101 0111 0101 1000 rdst rsrc 0010 dmov.l %1, %0 */
14015 int rsrc AU = (op[3] >> 4) & 0x0f;
14019 "/** 1111 1101 0111 0101 1000 rdst rsrc 0010 dmov.l %1, %0 */",
14022 printf (" rsrc = 0x%x\n", rsrc);
14026 ID(dmov); DR(rdst); SDRH(rsrc); F_____;
14033 /** 1111 1101 0111 0101 1000 rdst rsrc 0100 mvfdc %1, %0 */
14037 int rsrc AU = (op[3] >> 4) & 0x0f;
14041 "/** 1111 1101 0111 0101 1000 rdst rsrc 0100 mvfdc %1, %0 */",
14044 printf (" rsrc = 0x%x\n", rsrc);
14048 ID(mvfdc); DR(rdst); SCR(rsrc); F_____;
14309 /** 1111 1101 0111 0110 1100 rsrc 0000 0000 save %1 */
14311 int rsrc AU = op[2] & 0x0f;
14315 "/** 1111 1101 0111 0110 1100 rsrc 0000 0000 save %1 */",
14317 printf (" rsrc = 0x%x\n", rsrc);
14321 ID(save); SR(rsrc); F_____;
14485 /** 1111 1101 0111 0110 1101 rsrc 0000 0000 rstr %1 */
14487 int rsrc AU = op[2] & 0x0f;
14491 "/** 1111 1101 0111 0110 1101 rsrc 0000 0000 rstr %1 */",
14493 printf (" rsrc = 0x%x\n", rsrc);
14497 ID(rstr); SR(rsrc); F_____;
14732 /** 1111 1101 0111 0111 1000 rsrc rdst 0000 dmov.l %1, %0 */
14734 int rsrc AU = op[2] & 0x0f;
14740 "/** 1111 1101 0111 0111 1000 rsrc rdst 0000 dmov.l %1, %0 */",
14742 printf (" rsrc = 0x%x,", rsrc);
14747 ID(dmov); DDRL(rdst); SR(rsrc); F_____;
14755 /** 1111 1101 0111 0111 1000 rsrc rdst 001s dmov%s %1, %0 */
14757 int rsrc AU = op[2] & 0x0f;
14765 "/** 1111 1101 0111 0111 1000 rsrc rdst 001s dmov%s %1, %0 */",
14767 printf (" rsrc = 0x%x,", rsrc);
14773 ID(dmov); DDRH(rdst); SR(rsrc); DL(s); F_____;
14780 /** 1111 1101 0111 0111 1000 rdst rsrc 0100 mvtdc %1, %0 */
14784 int rsrc AU = (op[3] >> 4) & 0x0f;
14788 "/** 1111 1101 0111 0111 1000 rdst rsrc 0100 mvtdc %1, %0 */",
14791 printf (" rsrc = 0x%x\n", rsrc);
14795 ID(mvtdc); DCR(rdst); SR(rsrc); F_____;
14802 /** 1111 1101 0111 0111 1000 rsrc rdst 1001 itod %1, %0 */
14804 int rsrc AU = op[2] & 0x0f;
14810 "/** 1111 1101 0111 0111 1000 rsrc rdst 1001 itod %1, %0 */",
14812 printf (" rsrc = 0x%x,", rsrc);
14817 ID(itod); DDR(rdst); SR(rsrc); F_____;
14824 /** 1111 1101 0111 0111 1000 rsrc rdst 1010 ftod %1, %0 */
14826 int rsrc AU = op[2] & 0x0f;
14832 "/** 1111 1101 0111 0111 1000 rsrc rdst 1010 ftod %1, %0 */",
14834 printf (" rsrc = 0x%x,", rsrc);
14839 ID(ftod); DDR(rdst); SR(rsrc); F_____;
14846 /** 1111 1101 0111 0111 1000 rsrc rdst 1101 utod %1, %0 */
14848 int rsrc AU = op[2] & 0x0f;
14854 "/** 1111 1101 0111 0111 1000 rsrc rdst 1101 utod %1, %0 */",
14856 printf (" rsrc = 0x%x,", rsrc);
14861 ID(dsqrt); DDR(rdst); SR(rsrc); F_____;
15368 /** 1111 1101 100immmm rsrc rdst shlr #%2, %1, %0 */
15372 int rsrc AU = (op[2] >> 4) & 0x0f;
15378 "/** 1111 1101 100immmm rsrc rdst shlr #%2, %1, %0 */",
15381 printf (" rsrc = 0x%x,", rsrc);
15386 ID(shlr); S2C(immmm); SR(rsrc); DR(rdst); F__SZC;
15681 /** 1111 1101 101immmm rsrc rdst shar #%2, %1, %0 */
15685 int rsrc AU = (op[2] >> 4) & 0x0f;
15691 "/** 1111 1101 101immmm rsrc rdst shar #%2, %1, %0 */",
15694 printf (" rsrc = 0x%x,", rsrc);
15699 ID(shar); S2C(immmm); SR(rsrc); DR(rdst); F_0SZC;
15992 /** 1111 1101 110immmm rsrc rdst shll #%2, %1, %0 */
15996 int rsrc AU = (op[2] >> 4) & 0x0f;
16002 "/** 1111 1101 110immmm rsrc rdst shll #%2, %1, %0 */",
16005 printf (" rsrc = 0x%x,", rsrc);
16010 ID(shll); S2C(immmm); SR(rsrc); DR(rdst); F_OSZC;
Indexes created Wed Mar 04 15:26:31 UTC 2026