Home | History | Annotate | Download | only in config

Lines Matching refs:writeback

4060      .pcrel=0; .preind=1; .postind=0; .writeback=0
4062      .pcrel=0; .preind=1; .postind=0; .writeback=1
4064      .pcrel=0; .preind=0; .postind=1; .writeback=1
4066      .pcrel=1; .preind=1; .postind=0; .writeback=0
4314       operand->addr.writeback = 1;
4320       operand->addr.writeback = 1;
4357       if (operand->addr.writeback)
7652 	  if (info->addr.writeback)
7670 		 && info->addr.writeback && info->addr.preind)
7672 		     && info->addr.writeback && info->addr.postind))
7683 		|| info->addr.writeback)
7705 		|| info->addr.writeback)
7737 	      || info->addr.writeback)
7779 		  && info->addr.writeback))
7819 	      || info->addr.writeback)
7838 	      || !info->addr.preind || info->addr.writeback)
7861 	  if (!info->addr.postind || !info->addr.writeback)
7873 		    (_("writeback value must be an immediate constant"));
7922 	      || !info->addr.preind || info->addr.writeback)
8039 	      || !info->addr.preind || info->addr.writeback
8682       /* Loading/storing the base register is unpredictable if writeback.  */
8689 	  && opnds[1].addr.writeback)
8690 	as_warn (_("unpredictable transfer with writeback -- `%s'"), str);
8700       /* Loading/storing the base register is unpredictable if writeback.  */
8708 	  && opnds[2].addr.writeback)
8709 	    as_warn (_("unpredictable transfer with writeback -- `%s'"), str);