Lines Matching refs:V5
9282 /* ARM V5
9342 /* ARM V5 branch-link-exchange instruction (argument parse)
11891 /* ARM V5 Thumb BLX (argument parse)
23442 /* bx is allowed on v5 cores, and sometimes on v4 cores. */
23471 /* Arm mode bx is marked as both v4T and v5 because it's still required
23472 on a hypothetical non-thumb v5 core. */
23660 REGDEF(v5,8,RN), REGDEF(v6,9,RN), REGDEF(v7,10,RN), REGDEF(v8,11,RN),
23664 REGDEF(V5,8,RN), REGDEF(V6,9,RN), REGDEF(V7,10,RN), REGDEF(V8,11,RN),
24401 /* Note: bx (and blx) are required on V5, even if the processor does
30670 /* For V5 or later processors we default to using VFP; but the user