Lines Matching refs:operand
483 If the user also specifies the operand's size, store that size
495 as_bad (_("missing operand"));
503 /* If SRC starts with an explicit operand size, skip it and store the size
530 as_bad (_("invalid operand size requested"));
538 /* The many forms of operand:
554 constant_fits_width_p (struct h8_op *operand, offsetT width)
558 num = ((operand->exp.X_add_number & 0xffffffff) ^ 0x80000000) - 0x80000000;
563 constant_fits_size_p (struct h8_op *operand, int size, int no_symbols)
568 && (operand->exp.X_add_symbol != 0 || operand->exp.X_op_symbol != 0))
570 num = operand->exp.X_add_number & 0xffffffff;
768 ambiguous, so we should try whether it's a DISP operand
891 get_operands (unsigned int noperands, char *op_end, struct h8_op *operand)
902 get_operand (&ptr, operand + 0, SRC);
906 get_operand (&ptr, operand + 1, DST);
912 get_operand (&ptr, operand + 0, SRC);
915 get_operand (&ptr, operand + 1, DST);
920 get_operand (&ptr, operand + 0, SRC);
923 get_operand (&ptr, operand + 1, DST);
926 get_operand (&ptr, operand + 2, OP3);
939 get_mova_operands (char *op_end, struct h8_op *operand)
946 operand[0].mode = 0;
947 ptr = parse_exp (ptr, &operand[0]);
952 get_operand (&ptr, operand + 1, DST);
960 operand[0].mode = (operand[0].mode & ~MODE) | INDEXB;
963 operand[0].mode = (operand[0].mode & ~MODE) | INDEXW;
966 operand[0].mode = (operand[0].mode & ~MODE) | INDEXL;
972 else if ((operand[1].mode & MODE) == LOWREG)
974 switch (operand[1].mode & SIZE)
977 operand[0].mode = (operand[0].mode & ~MODE) | INDEXB;
980 operand[0].mode = (operand[0].mode & ~MODE) | INDEXW;
983 operand[0].mode = (operand[0].mode & ~MODE) | INDEXL;
994 get_operand (&ptr, operand + 2, OP3);
996 if (((operand[1].mode & MODE) == REG || (operand[1].mode & MODE) == LOWREG)
997 && (operand[2].mode & MODE) == REG
998 && (operand[1].reg & 7) == (operand[2].reg & 7))
1000 operand[1].mode = operand[2].mode = 0;
1001 operand[0].reg = operand[2].reg & 7;
1010 get_rtsl_operands (char *ptr, struct h8_op *operand)
1052 operand[0].mode = RS32;
1053 operand[1].mode = RD32;
1054 operand[0].reg = num;
1055 operand[1].reg = num2;
1108 as_warn (_("can't use high part of register in operand %d"), i);
1265 as_warn (_("Opcode `%s' with these operand types not available in %s mode"),
1274 as_warn (_("mismatch between opcode size and operand size"));
1281 check_operand (struct h8_op *operand, unsigned int width, const char *string)
1283 if (operand->exp.X_add_symbol == 0
1284 && operand->exp.X_op_symbol == 0)
1291 if (! constant_fits_width_p (operand, width))
1294 && (operand->exp.X_add_number & 0xff00) == 0xff00)
1302 && (operand->exp.X_add_number & 0xff8000) == 0xff8000)
1310 as_warn (_("operand %s0x%lx out of range."), string,
1311 (unsigned long) operand->exp.X_add_number);
1328 do_a_fix_imm (int offset, int nibble, struct h8_op *operand, int relaxmode, const struct h8_instruction *this_try)
1335 const char *t = ((operand->mode & MODE) == IMM) ? "#" : "@";
1337 if (operand->exp.X_add_symbol == 0)
1339 switch (operand->mode & SIZE)
1342 check_operand (operand, 0x3, t);
1343 bytes[0] |= (operand->exp.X_add_number & 3) << (nibble ? 0 : 4);
1347 check_operand (operand, 0x7, t);
1348 bytes[0] |= (operand->exp.X_add_number & 7) << (nibble ? 0 : 4);
1351 check_operand (operand, 0xF, t);
1352 bytes[0] |= (operand->exp.X_add_number & 15) << (nibble ? 0 : 4);
1355 check_operand (operand, 0x1F, t);
1356 bytes[0] |= operand->exp.X_add_number & 31;
1360 check_operand (operand, 0xff, t);
1361 bytes[0] |= operand->exp.X_add_number;
1365 check_operand (operand, 0xffff, t);
1366 bytes[0] |= operand->exp.X_add_number >> 8;
1367 bytes[1] |= operand->exp.X_add_number >> 0;
1368 /* MOVA needs both relocs to relax the second operand properly. */
1375 fix_new_exp (frag_now, offset, 2, &operand->exp, 0, idx);
1379 check_operand (operand, 0xffffff, t);
1380 bytes[0] |= operand->exp.X_add_number >> 16;
1381 bytes[1] |= operand->exp.X_add_number >> 8;
1382 bytes[2] |= operand->exp.X_add_number >> 0;
1387 bytes[0] |= operand->exp.X_add_number >> 24;
1388 bytes[1] |= operand->exp.X_add_number >> 16;
1389 bytes[2] |= operand->exp.X_add_number >> 8;
1390 bytes[3] |= operand->exp.X_add_number >> 0;
1393 if ((operand->mode & MODE) == DISP && relaxmode == 1)
1397 fix_new_exp (frag_now, offset, 4, &operand->exp, 0, idx);
1404 switch (operand->mode & SIZE)
1409 where = (operand->mode & SIZE) == L_24 ? -1 : 0;
1410 if ((operand->mode & MODE) == DISP && relaxmode == 1)
1420 as_bad (_("Can't work out size of operand.\n"));
1430 operand->exp.X_add_number =
1431 ((operand->exp.X_add_number & 0xffff) ^ 0x8000) - 0x8000;
1432 operand->exp.X_add_number |= (bytes[0] << 8) | bytes[1];
1438 operand->exp.X_add_number =
1439 ((operand->exp.X_add_number & 0xff) ^ 0x80) - 0x80;
1440 operand->exp.X_add_number |= bytes[0];
1446 &operand->exp,
1455 build_bytes (const struct h8_instruction *this_try, struct h8_op *operand)
1470 as_warn (_("Opcode `%s' with these operand types not available in H8/300 mode"),
1475 as_warn (_("Opcode `%s' with these operand types not available in H8/300H mode"),
1481 as_warn (_("Opcode `%s' with these operand types not available in H8/300S mode"),
1503 nib = operand[d].reg;
1508 else if (c & CTRL) /* Control reg operand. */
1509 nib = operand[d].reg;
1513 nib = operand[d].reg;
1517 operand[d].mode = c;
1524 operand[d].mode = c;
1533 switch (operand[0].exp.X_add_number)
1547 switch (operand[0].exp.X_add_number)
1566 operand[0].mode = 0;
1570 operand[d].mode |= MEMRELAX;
1586 if (operand[0].mode == MACREG)
1587 /* stmac has mac[hl] as the first operand. */
1588 nib = 2 + operand[0].reg;
1590 /* ldmac has mac[hl] as the second operand. */
1591 nib = 2 + operand[1].reg;
1603 high = (operand[1].reg >> 8) & 0xf;
1604 low = (operand[1].reg) & 0xf;
1610 high = (operand[0].reg >> 8) & 0xf;
1611 low = (operand[0].reg) & 0xf;
1641 int x = operand[i].mode;
1646 op_at[i] & 1, operand + i, (x & MEMRELAX) != 0,
1650 op_at[i] & 1, operand + i,
1661 check_operand (operand + i, size16 ? 0x7fff : 0x7f, "@");
1663 if (operand[i].exp.X_add_number & 1)
1664 as_warn (_("branch operand has odd offset (%lx)\n"),
1665 (unsigned long) operand->exp.X_add_number);
1668 operand[i].exp.X_add_number =
1669 ((operand[i].exp.X_add_number & 0xffff) ^ 0x8000) - 0x8000;
1673 operand[i].exp.X_add_number =
1674 ((operand[i].exp.X_add_number & 0xff) ^ 0x80) - 0x80;
1679 operand[i].exp.X_add_number |= output[op_at[i] / 2];
1684 &operand[i].exp,
1691 check_operand (operand + i, 0xff, "@@");
1695 &operand[i].exp,
1701 check_operand (operand + i, 0x7f, "@@");
1704 operand[i].exp.X_add_number |= 0x80;
1708 &operand[i].exp,
1721 if ((operand->mode & SIZE) == L_32)
1731 check_operand (operand + i,
1735 if (operand[i].exp.X_add_number & 1)
1736 as_warn (_("branch operand has odd offset (%lx)\n"),
1737 (unsigned long) operand->exp.X_add_number);
1740 operand[i].exp.X_add_number =
1741 ((operand[i].exp.X_add_number & 0xffff) ^ 0x8000) - 0x8000;
1745 &operand[i].exp,
1757 struct h8_op *operand)
1765 /* Only one opcode of this flavour, try to guess which operand
1772 if (operand[argn].mode != RD16)
1774 as_bad (_("destination operand must be 16 bit register"));
1781 if (operand[argn].mode != RS8)
1783 as_bad (_("source operand must be 8 bit register"));
1789 if (operand[argn].mode != ABS16DST)
1791 as_bad (_("destination operand must be 16bit absolute address"));
1796 if (operand[argn].mode != RD8)
1798 as_bad (_("destination operand must be 8 bit register"));
1804 if (operand[argn].mode != ABS16SRC)
1806 as_bad (_("source operand must be 16bit absolute address"));
1818 /* If OPERAND is part of an address, adjust its size and value given
1823 displacement in an @(d:2,ERn) operand. */
1826 fix_operand_size (struct h8_op *operand, int size)
1828 if (SXmode && (operand->mode & MODE) == DISP)
1830 /* If the user didn't specify an operand width, see if we
1832 if ((operand->mode & SIZE) == 0
1833 && operand->exp.X_add_symbol == 0
1834 && operand->exp.X_op_symbol == 0
1835 && (operand->exp.X_add_number == size
1836 || operand->exp.X_add_number == size * 2
1837 || operand->exp.X_add_number == size * 3))
1838 operand->mode |= L_2;
1840 /* Scale down the displacement in an @(d:2,ERn) operand.
1842 if ((operand->mode & SIZE) == L_2)
1844 if (operand->exp.X_add_number % size != 0)
1845 as_warn (_("operand/size mis-match"));
1846 operand->exp.X_add_number /= size;
1850 if ((operand->mode & SIZE) == 0)
1851 switch (operand->mode & MODE)
1863 && ((((addressT) operand->exp.X_add_number + 0x8000)
1865 || operand->exp.X_add_symbol != 0
1866 || operand->exp.X_op_symbol != 0))
1867 operand->mode |= L_24;
1869 operand->mode |= L_16;
1873 if ((((addressT) operand->exp.X_add_number + 0x80)
1876 if (operand->exp.X_add_symbol != NULL)
1877 operand->mode |= bsize;
1879 operand->mode |= L_8;
1882 operand->mode |= L_16;
1897 struct h8_op operand[3];
1951 operand[0].mode = 0;
1952 operand[1].mode = 0;
1953 operand[2].mode = 0;
1958 get_mova_operands (op_end, operand);
1961 get_rtsl_operands (op_end, operand);
1963 get_operands (instruction->noperands, op_end, operand);
1972 /* The first operand
1973 second operand must be a register pair. */
1974 if ((operand[0].mode != RSINC)
1975 || (operand[0].reg != 7)
1976 || ((operand[1].reg & 0x80000000) == 0))
1977 as_bad (_("invalid operand in ldm"));
1981 /* The first operand must be a register pair,
1982 and the second operand must be @-er7. */
1983 if (((operand[0].reg & 0x80000000) == 0)
1984 || (operand[1].mode != RDDEC)
1985 || (operand[1].reg != 7))
1986 as_bad (_("invalid operand in stm"));
2011 switch (operand[0].mode & MODE)
2015 fix_operand_size (&operand[1], 1);
2018 fix_operand_size (&operand[1], 2);
2021 fix_operand_size (&operand[1], 4);
2027 for (i = 0; i < 3 && operand[i].mode != 0; i++)
2033 fix_operand_size (&operand[i], 1);
2036 fix_operand_size (&operand[i], 2);
2039 fix_operand_size (&operand[i], 4);
2044 instruction = get_specific (instruction, operand, size);
2053 clever_message (prev_instruction, operand);
2058 build_bytes (instruction, operand);
Indexes created Tue Mar 31 00:22:50 UTC 2026