Lines Matching defs:INS_EZ80
66 #define INS_EZ80 (1 << 4)
77 #define INS_NOT_GBZ80 (INS_Z80 | INS_Z180 | INS_R800 | INS_EZ80 | INS_Z80N)
159 {"ez80", INS_EZ80, 0, 0, "Zilog eZ80" },
479 {"ixh", REG_H | R_IX, INS_IDX_HALF | INS_EZ80 | INS_R800 | INS_Z80N },
480 {"ixl", REG_L | R_IX, INS_IDX_HALF | INS_EZ80 | INS_R800 | INS_Z80N },
482 {"iyh", REG_H | R_IY, INS_IDX_HALF | INS_EZ80 | INS_R800 | INS_Z80N },
483 {"iyl", REG_L | R_IY, INS_IDX_HALF | INS_EZ80 | INS_R800 | INS_Z80N },
485 {"mb", REG_MB, INS_EZ80 },
503 if (ins_ok & INS_EZ80) /* if select EZ80 cpu then */
559 case INS_EZ80:
1329 if (!(ins_ok & (INS_EZ80|INS_R800|INS_Z80N)))
2007 if (port.X_add_number == REG_BC && !(ins_ok & INS_EZ80))
2102 if (port.X_add_number == REG_BC && !(ins_ok & INS_EZ80))
2283 if (!(ins_ok & INS_EZ80)) /* 16-bit indirect load group is supported by eZ80 only */
2453 else if (!(ins_ok & (INS_EZ80|INS_R800|INS_Z80N)))
2484 if (!(ins_ok & INS_EZ80))
2497 if (!(ins_ok & INS_EZ80))
2513 if (!(ins_ok & INS_EZ80) || (src->X_add_number != REG_A))
2544 if (!(ins_ok & INS_EZ80))
2614 if (ii_halves && !(ins_ok & (INS_EZ80|INS_R800|INS_Z80N)))
2616 if (prefix == 0 && (ins_ok & INS_EZ80))
2656 if (!(ins_ok & INS_EZ80))
3117 if (!(ins_ok & INS_EZ80))
3262 if (ins_ok & INS_EZ80)
3493 { ".ez80", set_inss, INS_EZ80},
3550 { "in0", 0xED, 0x00, emit_in0, INS_Z180|INS_EZ80 },
3553 { "ind2", 0xED, 0x8C, emit_insn, INS_EZ80 },
3554 { "ind2r",0xED, 0x9C, emit_insn, INS_EZ80 },
3555 { "indm", 0xED, 0x8A, emit_insn, INS_EZ80 },
3556 { "indmr",0xED, 0x9A, emit_insn, INS_EZ80 },
3558 { "indrx",0xED, 0xCA, emit_insn, INS_EZ80 },
3560 { "ini2", 0xED, 0x84, emit_insn, INS_EZ80 },
3561 { "ini2r",0xED, 0x94, emit_insn, INS_EZ80 },
3562 { "inim", 0xED, 0x82, emit_insn, INS_EZ80 },
3563 { "inimr",0xED, 0x92, emit_insn, INS_EZ80 },
3565 { "inirx",0xED, 0xC2, emit_insn, INS_EZ80 },
3581 { "lea", 0xED, 0x02, emit_lea, INS_EZ80 },
3583 { "mlt", 0xED, 0x4C, emit_mlt, INS_Z180|INS_EZ80|INS_Z80N },
3591 { "otd2r",0xED, 0xBC, emit_insn, INS_EZ80 },
3592 { "otdm", 0xED, 0x8B, emit_insn, INS_Z180|INS_EZ80 },
3593 { "otdmr",0xED, 0x9B, emit_insn, INS_Z180|INS_EZ80 },
3595 { "otdrx",0xED, 0xCB, emit_insn, INS_EZ80 },
3596 { "oti2r",0xED, 0xB4, emit_insn, INS_EZ80 },
3597 { "otim", 0xED, 0x83, emit_insn, INS_Z180|INS_EZ80 },
3598 { "otimr",0xED, 0x93, emit_insn, INS_Z180|INS_EZ80 },
3600 { "otirx",0xED, 0xC3, emit_insn, INS_EZ80 },
3602 { "out0", 0xED, 0x01, emit_out0, INS_Z180|INS_EZ80 },
3604 { "outd2",0xED, 0xAC, emit_insn, INS_EZ80 },
3606 { "outi2",0xED, 0xA4, emit_insn, INS_EZ80 },
3608 { "pea", 0xED, 0x65, emit_pea, INS_EZ80 },
3627 { "rsmix",0xED, 0x7E, emit_insn, INS_EZ80 },
3637 { "slp", 0xED, 0x76, emit_insn, INS_Z180|INS_EZ80 },
3640 { "stmix",0xED, 0x7D, emit_insn, INS_EZ80 },
3646 { "tst", 0xED, 0x04, emit_tst, INS_Z180|INS_EZ80|INS_Z80N },
3647 { "tstio",0xED, 0x74, emit_insn_n,INS_Z180|INS_EZ80 },
3677 if (*p != '.' || !(ins_ok & INS_EZ80) || !assemble_suffix (&p))
Indexes created Wed May 06 00:24:28 UTC 2026