Lines Matching refs:IMMEDIATE
499 immediate operand to ease the operand encoding/decoding and qualifier
1609 /* The third operand is an index (e.g. immediate or bit)
1617 /* The third operand is an index (e.g. immediate or bit)
3704 /* Add/subtract (immediate). */
3831 /* AdvSIMD modified immediate. */
4078 /* AdvSIMD shift by immediate. */
4307 /* AdvSIMD scalar shift by immediate. */
4355 /* Unconditional branch (immediate). */
4376 /* Compare & branch (immediate). */
4379 /* Conditional branch (immediate). */
4392 /* Compare register with immediate and branch. */
4425 /* Conditional compare (immediate). */
4665 /* Floating-point immediate. */
4671 /* Load/store register (immediate indexed). */
4692 /* Load/store register (unsigned immediate). */
4728 /* Load/store register (unscaled immediate). */
4742 /* Load/store register (scaled signed immediate). */
4814 /* Logical (immediate). */
5092 /* Move wide (immediate). */
5192 /* Test & branch (immediate). */
8028 Y(IMMEDIATE, imm, "CRn", 0, F(FLD_CRn), \
8030 Y(IMMEDIATE, imm, "CRm", 0, F(FLD_CRm), \
8032 Y(IMMEDIATE, imm, "IDX", 0, F(FLD_imm4_11), \
8033 "an immediate as the index of the least significant byte") \
8034 Y(IMMEDIATE, imm, "MASK", 0, F(FLD_imm4_0), \
8035 "an immediate as the index of the least significant byte") \
8036 Y(IMMEDIATE, advsimd_imm_shift, "IMM_VLSL", 0, F(), \
8038 Y(IMMEDIATE, advsimd_imm_shift, "IMM_VLSR", 0, F(), \
8040 Y(IMMEDIATE, advsimd_imm_modified, "SIMD_IMM", 0, F(), \
8041 "an immediate") \
8042 Y(IMMEDIATE, advsimd_imm_modified, "SIMD_IMM_SFT", 0, F(), \
8043 "an 8-bit unsigned immediate with optional shift") \
8044 Y(IMMEDIATE, advsimd_imm_modified, "SIMD_FPIMM", 0, F(), \
8046 X(IMMEDIATE, 0, ext_shll_imm, "SHLL_IMM", 0, F(), \
8047 "an immediate shift amount of 8, 16 or 32") \
8048 X(IMMEDIATE, 0, 0, "IMM0", 0, F(), "0") \
8049 X(IMMEDIATE, 0, 0, "FPIMM0", 0, F(), "0.0") \
8050 Y(IMMEDIATE, fpimm, "FPIMM", 0, F(FLD_imm8), \
8052 Y(IMMEDIATE, imm, "IMMR", 0, F(FLD_immr), \
8054 Y(IMMEDIATE, imm, "IMMS", 0, F(FLD_imm6_10), \
8056 Y(IMMEDIATE, imm, "WIDTH", 0, F(FLD_imm6_10), \
8058 Y(IMMEDIATE, imm, "IMM", 0, F(FLD_imm6_10), "an immediate") \
8059 Y(IMMEDIATE, imm, "IMM_2", 0, F(FLD_imm6_15), "an immediate") \
8060 Y(IMMEDIATE, imm, "IMMP1_2", 0, F(FLD_imm6_15), "an immediate plus 1") \
8061 Y(IMMEDIATE, imm, "IMMS1_2", 0, F(FLD_imm6_15), "an immediate minus 1") \
8062 Y(IMMEDIATE, imm, "UIMM3_OP1", 0, F(FLD_op1), \
8063 "a 3-bit unsigned immediate") \
8064 Y(IMMEDIATE, imm, "UIMM3_OP2", 0, F(FLD_op2), \
8065 immediate") \
8066 Y(IMMEDIATE, imm, "UIMM4", 0, F(FLD_CRm), \
8067 "a 4-bit unsigned immediate") \
8068 Y(IMMEDIATE, imm, "UIMM4_ADDG", 0, F(FLD_imm4_10), \
8070 Y(IMMEDIATE, imm, "UIMM7", 0, F(FLD_CRm, FLD_op2), \
8071 "a 7-bit unsigned immediate") \
8072 Y(IMMEDIATE, imm, "UIMM10", OPD_F_SHIFT_BY_4, F(FLD_immr), \
8074 Y(IMMEDIATE, imm, "BIT_NUM", 0, F(FLD_b5, FLD_b40), \
8076 Y(IMMEDIATE, imm, "EXCEPTION", 0, F(FLD_imm16_5), \
8077 "a 16-bit unsigned immediate") \
8078 Y(IMMEDIATE, imm, "UNDEFINED", 0, F(FLD_imm16_0), \
8079 "a 16-bit unsigned immediate") \
8080 Y(IMMEDIATE, imm, "CCMP_IMM", 0, F(FLD_imm5), \
8081 "a 5-bit unsigned immediate") \
8082 Y(IMMEDIATE, imm, "SIMM5", OPD_F_SEXT, F(FLD_imm5), \
8083 "a 5-bit signed immediate") \
8084 Y(IMMEDIATE, imm, "NOT_BALANCED_10", 0, F(FLD_imm1_10), \
8086 Y(IMMEDIATE, imm, "NOT_BALANCED_17", 0, F(FLD_imm17_1), \
8088 Y(IMMEDIATE, imm, "NZCV", 0, F(FLD_nzcv), \
8090 Y(IMMEDIATE, limm, "LIMM", 0, F(FLD_N,FLD_immr,FLD_imms), \
8091 "Logical immediate") \
8092 Y(IMMEDIATE, aimm, "AIMM", 0, F(FLD_shift,FLD_imm12), \
8093 "a 12-bit unsigned immediate with optional left shift of 12 bits")\
8094 Y(IMMEDIATE, imm_half, "HALF", 0, F(FLD_imm16_5), \
8095 "a 16-bit immediate with optional left shift") \
8096 Y(IMMEDIATE, fbits, "FBITS", 0, F(FLD_scale), \
8098 X(IMMEDIATE, 0, 0, "IMM_MOV", 0, F(), "an immediate") \
8099 Y(IMMEDIATE, imm_rotate2, "IMM_ROT1", 0, F(FLD_rotate1), \
8101 Y(IMMEDIATE, imm_rotate2, "IMM_ROT2", 0, F(FLD_rotate2), \
8103 Y(IMMEDIATE, imm_rotate1, "IMM_ROT3", 0, F(FLD_rotate3), \
8125 "an address with 7-bit signed immediate offset") \
8127 "an address with 9-bit signed immediate offset") \
8129 "an address with 9-bit negative or unaligned immediate offset") \
8131 "an address with an optional 10-bit scaled, signed immediate offset") \
8133 "an address with 11-bit signed immediate (multiple of 16) offset")\
8135 "an address with scaled, unsigned immediate offset") \
8137 "an address with 13-bit signed immediate (multiple of 16) offset")\
8141 "an address with an optional 8-bit signed immediate offset") \
8143 "a post-indexed address with immediate or register increment") \
8167 "the DSB nXS option qualifier name SY, ISH, NSH, OSH or an optional 5-bit unsigned immediate") \
8169 "the ISB option name SY or an optional 4-bit unsigned immediate") \
8320 Y(IMMEDIATE, sve_aimm, "SVE_AIMM", 0, F(FLD_SVE_imm9), \
8322 Y(IMMEDIATE, sve_asimm, "SVE_ASIMM", 0, F(FLD_SVE_imm9), \
8324 Y(IMMEDIATE, fpimm, "SVE_FPIMM8", 0, F(FLD_SVE_imm8), \
8325 "an 8-bit floating-point immediate") \
8326 Y(IMMEDIATE, sve_float_half_one, "SVE_I1_HALF_ONE", 0, \
8328 Y(IMMEDIATE, sve_float_half_two, "SVE_I1_HALF_TWO", 0, \
8330 Y(IMMEDIATE, sve_float_zero_one, "SVE_I1_ZERO_ONE", 0, \
8332 Y(IMMEDIATE, imm_rotate1, "SVE_IMM_ROT1", 0, F(FLD_SVE_rot1), \
8334 Y(IMMEDIATE, imm_rotate2, "SVE_IMM_ROT2", 0, F(FLD_SVE_rot2), \
8336 Y(IMMEDIATE, imm_rotate1, "SVE_IMM_ROT3", 0, F(FLD_SVE_rot3), \
8338 Y(IMMEDIATE, inv_limm, "SVE_INV_LIMM", 0, \
8340 "an inverted 13-bit logical immediate") \
8341 Y(IMMEDIATE, limm, "SVE_LIMM", 0, \
8343 "a 13-bit logical immediate") \
8344 Y(IMMEDIATE, sve_limm_mov, "SVE_LIMM_MOV", 0, \
8346 immediate") \
8347 Y(IMMEDIATE, imm, "SVE_PATTERN", 0, F(FLD_SVE_pattern), \
8349 Y(IMMEDIATE, sve_scale, "SVE_PATTERN_SCALED", 0, \
8351 Y(IMMEDIATE, imm, "SVE_PRFOP", 0, F(FLD_SVE_prfop), \
8381 Y(IMMEDIATE, sve_shlimm, "SVE_SHLIMM_PRED", 0, \
8382 F(FLD_SVE_tszh,FLD_SVE_imm5), "a shift-left immediate operand") \
8383 Y(IMMEDIATE, sve_shlimm, "SVE_SHLIMM_UNPRED", 0, \
8384 F(FLD_SVE_tszh,FLD_imm5), "a shift-left immediate operand") \
8385 Y(IMMEDIATE, sve_shlimm, "SVE_SHLIMM_UNPRED_22", 0, \
8387 "a shift-left immediate operand") \
8388 Y(IMMEDIATE, sve_shrimm, "SVE_SHRIMM_PRED", 1 << OPD_F_OD_LSB, \
8389 F(FLD_SVE_tszh,FLD_SVE_imm5), "a shift-right immediate operand") \
8390 Y(IMMEDIATE, sve_shrimm, "SVE_SHRIMM_UNPRED", 1 << OPD_F_OD_LSB, \
8391 F(FLD_SVE_tszh,FLD_imm5), "a shift-right immediate operand") \
8392 Y(IMMEDIATE, sve_shrimm, "SVE_SHRIMM_UNPRED_22", 2 << OPD_F_OD_LSB, \
8394 "a shift-right immediate operand") \
8395 Y(IMMEDIATE, imm, "SVE_SIMM5", OPD_F_SEXT, F(FLD_SVE_imm5), \
8396 "a 5-bit signed immediate") \
8397 Y(IMMEDIATE, imm, "SVE_SIMM5B", OPD_F_SEXT, F(FLD_SVE_imm5b), \
8398 "a 5-bit signed immediate") \
8399 Y(IMMEDIATE, imm, "SVE_SIMM6", OPD_F_SEXT, F(FLD_SVE_imms), \
8400 "a 6-bit signed immediate") \
8401 Y(IMMEDIATE, imm, "SVE_SIMM8", OPD_F_SEXT, F(FLD_SVE_imm8), \
8402 "an 8-bit signed immediate") \
8403 Y(IMMEDIATE, imm, "SVE_UIMM3", 0, F(FLD_SVE_imm3), \
8404 "a 3-bit unsigned immediate") \
8405 Y(IMMEDIATE, imm, "SVE_UIMM7", 0, F(FLD_SVE_imm7), \
8406 "a 7-bit unsigned immediate") \
8407 Y(IMMEDIATE, imm, "SVE_UIMM8", 0, F(FLD_SVE_imm8), \
8408 "an 8-bit unsigned immediate") \
8409 Y(IMMEDIATE, imm, "SVE_UIMM8_53", 0, F(FLD_imm5,FLD_imm3_10), \
8410 "an 8-bit unsigned immediate") \
8411 Y(IMMEDIATE, imm, "SVE_UIMM4", 0, F(FLD_SVE_imm4), \
8412 "a 4-bit unsigned immediate") \
8592 Y(IMMEDIATE, plain_shrimm, "SME_SHRIMM3", 0, F(FLD_SVE_imm3), \
8593 "a shift-right immediate operand") \
8594 Y(IMMEDIATE, plain_shrimm, "SME_SHRIMM4", 0, F(FLD_SVE_imm4), \
8595 "a shift-right immediate operand") \
8596 Y(IMMEDIATE, sve_shrimm, "SME_SHRIMM5", 1 << OPD_F_OD_LSB, \
8597 F(FLD_SVE_tszh,FLD_SVE_imm5b), "a shift-right immediate operand") \
8670 Y(IMMEDIATE, imm, "SME_VLxN_10", 0, F(FLD_SME_VL_10), \
8672 Y(IMMEDIATE, imm, "SME_VLxN_13", 0, F(FLD_SME_VL_13), \
8675 Y(IMMEDIATE, imm, "SME_ZT0_INDEX", OPD_F_SHIFT_BY_3, \
8677 Y(IMMEDIATE, imm, "SME_ZT0_INDEX_MUL_VL", 0, \
8680 Y(IMMEDIATE, imm, "TME_UIMM16", 0, F(FLD_imm16_5), \
8681 "a 16-bit unsigned immediate for TME tcancel") \
8683 "an indexed SM3 vector immediate") \
8692 Y(IMMEDIATE, imm, "CSSC_SIMM8", OPD_F_SEXT, F(FLD_CSSC_imm8), \
8693 "an 8-bit signed immediate") \
8694 Y(IMMEDIATE, imm, "CSSC_UIMM8", 0, F(FLD_CSSC_imm8), \
8695 "an 8-bit unsigned immediate") \
8709 "an address with an optional 8-bit signed immediate offset") \
Indexes created Tue Aug 18 00:25:06 UTC 2026