Lines Matching defs:modrm
208 modrm;
249 /* Record whether the modrm byte has been skipped. */
368 ins->modrm.mod = (*ins->codep >> 6) & 3;
369 ins->modrm.reg = (*ins->codep >> 3) & 7;
370 ins->modrm.rm = *ins->codep & 7;
9073 dp = ®_table[dp->op[1].bytemode][ins->modrm.reg];
9077 vindex = ins->modrm.mod == 0x3 ? 1 : 0;
9082 dp = &rm_table[dp->op[1].bytemode][ins->modrm.rm];
9176 if (ins->modrm.mod == 3)
9390 /* There is no MODRM byte for VEX0F 77. */
9425 /* There is no MODRM byte for VEX 77. */
9552 if (ins->modrm.mod == 3 && (ins->rex2 & REX_X))
9558 if (ins->modrm.mod == 3 && ins->vex.b && ins->evex_type != evex_from_legacy)
9596 /* If modrm.mod == 3, operand must be register. */
9599 && ins->modrm.mod != 3
9600 && ins->modrm.rm == 4)
10035 if (ins.modrm.mod == 3 && ins.vex.b && ins.evex_type == evex_default
10739 if (ins->modrm.mod != 3)
10741 int fp_indx = (floatop - 0xd8) * 8 + ins->modrm.reg;
10752 dp = &float_reg[floatop - 0xd8][ins->modrm.reg];
10755 putop (ins, fgrps[dp->op[0].bytemode][ins->modrm.rm], sizeflag);
10793 int res = snprintf (scratch, ARRAY_SIZE (scratch), "%%st(%d)", ins->modrm.rm);
10869 if ((ins->need_modrm && ins->modrm.mod != 3 && !ins->vex.nd)
10964 if (ins->modrm.mod == 3)
10986 if (ins->modrm.mod != 3)
10992 || (ins->modrm.mod == 3 && (ins->rex & REX_X))
11200 if ((ins->modrm.mod == 3 || !cond)
11244 if ((ins->need_modrm && ins->modrm.mod != 3 && !ins->vex.nd)
11263 if (cond ? ins->modrm.mod == 3 && !(sizeflag & SUFFIX_ALWAYS)
11446 || ((ins->modrm.mod == 3 || ins->vex.b)
11470 ins->modrm.mod = 3;
11479 || ((ins->modrm.mod == 3 || ins->vex.b)
12163 if (ins->modrm.mod != 3)
12311 base = ins->modrm.rm;
12388 switch (ins->modrm.mod)
12448 if (ins->modrm.mod != 0 || base == 5)
12517 && (disp || ins->modrm.mod != 0 || base == 5))
12532 int modrm_reg = ins->modrm.reg;
12544 if (ins->modrm.mod != 0 || base == 5)
12571 switch (ins->modrm.mod)
12574 if (ins->modrm.rm == 6)
12590 if (ins->modrm.mod != 0 || ins->modrm.rm == 6)
12593 if (ins->modrm.mod != 0 || ins->modrm.rm != 6)
12596 oappend (ins, ins->intel_syntax ? intel_index16[ins->modrm.rm]
12597 : att_index16[ins->modrm.rm]);
12599 && (disp || ins->modrm.mod != 0 || ins->modrm.rm == 6))
12707 if (ins->modrm.mod == 3)
12715 print_register (ins, ins->modrm.rm, REX_B, bytemode, sizeflag);
12731 if (ins->modrm.mod == 3 && bytemode == f_mode)
12742 print_register (ins, ins->modrm.reg, REX_R, bytemode, sizeflag);
13034 oappend_register (ins, att_names_seg[ins->modrm.reg]);
13037 return OP_E (ins, ins->modrm.mod == 3 ? bytemode : w_mode, sizeflag);
13229 ins->modrm.reg + add);
13250 ins->modrm.reg + add);
13264 res = snprintf (scratch, ARRAY_SIZE (scratch), "%%tr%d", ins->modrm.reg);
13275 int reg = ins->modrm.reg;
13371 unsigned int reg = ins->modrm.reg;
13383 ins->modrm.reg = reg;
13397 if (ins->modrm.mod != 3)
13415 reg = ins->modrm.rm;
13437 if (ins->modrm.mod != 3)
13451 oappend_register (ins, att_names_mm[ins->modrm.rm]);
13460 oappend_register (ins, att_names_mm[ins->modrm.reg]);
13476 if (ins->modrm.mod != 3)
13479 reg = ins->modrm.rm;
13501 ins->modrm.rm = reg;
13510 if (ins->modrm.mod != 3)
13538 if (ins->modrm.mod == 3)
13539 /* bad bound,lea,lds,les,lfs,lgs,lss,cmpxchg8b,vmptrst modrm */
13551 if (ins->modrm.mod != 3 || ins->modrm.rm != 0)
13556 /* montmul instruction need display repz and skip modrm */
13561 if (ins->modrm.mod != 3 || ins->modrm.rm != 0)
13674 /* Since a variable sized ins->modrm/ins->sib chunk is between the start
13676 all the ins->modrm processing first, and don't know until now that
13892 if (ins->modrm.mod != 3
13911 if (ins->modrm.mod != 3)
13928 if (ins->modrm.mod != 3
14049 modrm_reg = ins->modrm.reg;
14053 if (ins->has_sib && ins->modrm.rm == 4)
14079 if (reg == ins->modrm.reg || reg == ins->modrm.rm)
14083 if (ins->modrm.reg == ins->modrm.rm || ins->modrm.reg == reg
14084 || ins->modrm.rm == reg)
14086 if (ins->modrm.reg <= 8
14087 && (ins->modrm.reg == ins->modrm.rm || ins->modrm.reg == reg))
14089 if (ins->modrm.rm <= 8
14090 && (ins->modrm.rm == ins->modrm.reg || ins->modrm.rm == reg))
14175 if (ins->modrm.mod == 3)
14418 unsigned int modrm_reg = ins->modrm.reg;
14419 unsigned int modrm_rm = ins->modrm.rm;
14434 if (ins->modrm.mod == 3)
14445 || (ins->modrm.mod == 3
14457 if (ins->modrm.mod != 3 || !ins->vex.b)
14483 if (ins->modrm.mod != 0 || ins->modrm.rm != 5)
14512 if (ins->modrm.mod != 3)
14517 unsigned int rm_reg = ins->modrm.rm + (ins->rex & REX_B ? 8 : 0)
14522 || (!ins->modrm.reg