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Lines Matching defs:v_mode

429 #define Ev { OP_E, v_mode }
451 #define Mv { OP_M, v_mode }
459 #define Gv { OP_G, v_mode }
469 #define Iv { OP_I, v_mode }
470 #define sIv { OP_sI, v_mode }
471 #define Iv64 { OP_I64, v_mode }
476 #define Jv { OP_J, v_mode }
517 #define Sv { OP_SEG, v_mode }
520 #define Ov { OP_OFF64, v_mode }
544 #define EM { OP_EM, v_mode }
596 #define VexGv { OP_VEX, v_mode }
632 #define Evh1 { HLE_Fixup1, v_mode }
634 #define Evh2 { HLE_Fixup2, v_mode }
636 #define Evh3 { HLE_Fixup3, v_mode }
658   v_mode,
720   /* pair of v_mode operands */
730   /* Displacements like v_mode without considering Intel64 ISA.  */
739   /* v_mode for indirect branch opcodes.  */
741   /* v_mode for stack-related opcodes.  */
2147   { "mov%LS",		{ { JMPABS_Fixup, eAX_reg }, { JMPABS_Fixup, v_mode } }, PREFIX_REX2_ILLEGAL },
11735     case v_mode:
12007       bytemode = v_mode;
12009     case v_mode:
12015       else if (bytemode != v_mode && bytemode != v_swap_mode)
12867     case v_mode:
12912   if (bytemode != v_mode || ins->address_mode != mode_64bit
12959     case v_mode:
12991     case v_mode:
13163 	  intel_operand_size (ins, v_mode, sizeflag);
13193 	  intel_operand_size (ins, v_mode, sizeflag);
13400 	  && (bytemode == v_mode || bytemode == v_swap_mode))
13439       if (ins->intel_syntax && bytemode == v_mode)
14096     case v_mode:
14100       else if (bytemode == v_mode
14503       bytemode = v_mode;
14575       return OP_G (ins, v_mode, sizeflag);
14583     return OP_G (ins, v_mode, sizeflag);
14584   return OP_E (ins, v_mode, sizeflag);