Lines Matching refs:advsimd
761 &generic_advsimd_vector_cost, /* advsimd */
831 &a64fx_advsimd_vector_cost, /* advsimd */
869 &qdf24xx_advsimd_vector_cost, /* advsimd */
908 &thunderx_advsimd_vector_cost, /* advsimd */
945 &tsv110_advsimd_vector_cost, /* advsimd */
983 &cortexa57_advsimd_vector_cost, /* advsimd */
1020 &exynosm1_advsimd_vector_cost, /* advsimd */
1058 &xgene1_advsimd_vector_cost, /* advsimd */
1096 &thunderx2t99_advsimd_vector_cost, /* advsimd */
1133 &thunderx3t110_advsimd_vector_cost, /* advsimd */
1171 &ere1_advsimd_vector_cost, /* advsimd */
2104 &neoversev1_advsimd_vector_cost, /* advsimd */
2241 &neoversev1_advsimd_vector_cost, /* advsimd */
2429 &neoversen2_advsimd_vector_cost, /* advsimd */
2618 &neoversev2_advsimd_vector_cost, /* advsimd */
10786 /* On LE, for AdvSIMD, don't support anything other than POST_INC or
15140 /* When AdvSIMD instructions are disabled it is not possible to move
15678 return m_issue_info->advsimd;
15934 return costs->advsimd;
15944 return costs->advsimd;
23395 /* Returns the string with the instruction for AdvSIMD MOVI, MVNI, ORR or BIC
23412 a AdvSIMD MOVI instruction (or, implicitly, MVNI), ORR or BIC immediate.