Lines Matching defs:TARGET_32BIT
131 && TARGET_32BIT)
144 #define TARGET_REALLY_IWMMXT (TARGET_IWMMXT && TARGET_32BIT \
146 #define TARGET_REALLY_IWMMXT2 (TARGET_IWMMXT2 && TARGET_32BIT \
148 #define TARGET_IWMMXT_ABI (TARGET_32BIT && arm_abi == ARM_ABI_IWMMXT)
164 #define TARGET_32BIT (TARGET_ARM || arm_arch_thumb2)
219 revealed via __ARM_NEON__ so we add extra guards upon TARGET_32BIT
223 (TARGET_32BIT && TARGET_HARD_FLOAT \
241 (TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP5 && arm_fp16_inst)
257 #define TARGET_BF16_FP (TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP5 \
264 (TARGET_32BIT && arm_arch5te && (arm_arch_notm || arm_arch7))
267 (TARGET_32BIT && arm_arch6 && (arm_arch_notm || arm_arch7))
270 (TARGET_32BIT && arm_arch5te && (arm_arch_notm || arm_arch7em))
273 (TARGET_32BIT && arm_arch6 && (arm_arch_notm || arm_arch7em))
313 && TARGET_32BIT \
1408 :(TARGET_32BIT ? CORE_REGS \
1449 : TARGET_32BIT \
1461 (TARGET_32BIT ? \
1792 (TARGET_32BIT ? use_return_insn (ISCOND, NULL) : 0)
1833 #define TRAMPOLINE_SIZE (TARGET_FDPIC ? 32 : (TARGET_32BIT ? 16 : 20))
1841 #define HAVE_PRE_INCREMENT TARGET_32BIT
1842 #define HAVE_POST_DECREMENT TARGET_32BIT
1843 #define HAVE_PRE_DECREMENT TARGET_32BIT
1844 #define HAVE_PRE_MODIFY_DISP TARGET_32BIT
1845 #define HAVE_POST_MODIFY_DISP TARGET_32BIT
1846 #define HAVE_PRE_MODIFY_REG TARGET_32BIT
1847 #define HAVE_POST_MODIFY_REG TARGET_32BIT
1858 (TARGET_32BIT && arm_autoinc_modes_ok_p (mode, code))