1 /* $NetBSD: cpu.c,v 1.24 2023/12/05 19:19:26 andvar Exp $ */ 2 3 /* 4 * Copyright 2000, 2001 5 * Broadcom Corporation. All rights reserved. 6 * 7 * This software is furnished under license and may be used and copied only 8 * in accordance with the following terms and conditions. Subject to these 9 * conditions, you may download, copy, install, use, modify and distribute 10 * modified or unmodified copies of this software in source and/or binary 11 * form. No title or ownership is transferred hereby. 12 * 13 * 1) Any source code used, modified or distributed must reproduce and 14 * retain this copyright notice and list of conditions as they appear in 15 * the source file. 16 * 17 * 2) No right is granted to use any trade name, trademark, or logo of 18 * Broadcom Corporation. The "Broadcom Corporation" name may not be 19 * used to endorse or promote products derived from this software 20 * without the prior written permission of Broadcom Corporation. 21 * 22 * 3) THIS SOFTWARE IS PROVIDED "AS-IS" AND ANY EXPRESS OR IMPLIED 23 * WARRANTIES, INCLUDING BUT NOT LIMITED TO, ANY IMPLIED WARRANTIES OF 24 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR 25 * NON-INFRINGEMENT ARE DISCLAIMED. IN NO EVENT SHALL BROADCOM BE LIABLE 26 * FOR ANY DAMAGES WHATSOEVER, AND IN PARTICULAR, BROADCOM SHALL NOT BE 27 * LIABLE FOR DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 28 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 29 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR 30 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 31 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE 32 * OR OTHERWISE), EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 33 */ 34 35 #include <sys/cdefs.h> 36 __KERNEL_RCSID(0, "$NetBSD: cpu.c,v 1.24 2023/12/05 19:19:26 andvar Exp $"); 37 38 #include "opt_multiprocessor.h" 39 40 #include <sys/param.h> 41 #include <sys/cpu.h> 42 #include <sys/device.h> 43 #include <sys/kernel.h> 44 #include <sys/systm.h> 45 46 #include <mips/locore.h> 47 #include <mips/cache.h> 48 49 #include <sbmips/cpuvar.h> 50 51 #include <mips/sibyte/include/zbbusvar.h> 52 #include <mips/sibyte/include/sb1250_regs.h> 53 #include <mips/sibyte/include/sb1250_scd.h> 54 #include <mips/sibyte/dev/sbscdvar.h> 55 #include <mips/cfe/cfe_api.h> 56 57 #define READ_REG(rp) mips3_ld((register_t)(rp)) 58 59 static int cpu_match(device_t, cfdata_t, void *); 60 static void cpu_attach(device_t, device_t, void *); 61 62 CFATTACH_DECL_NEW(cpu, sizeof(struct cpu_softc), 63 cpu_match, cpu_attach, NULL, NULL); 64 65 static u_int found = 0; 66 67 static int 68 cpu_match(device_t parent, cfdata_t match, void *aux) 69 { 70 struct zbbus_attach_args *zap = aux; 71 int part; 72 73 if (zap->za_locs.za_type != ZBBUS_ENTTYPE_CPU) 74 return (0); 75 76 /* 77 * The 3rd hex digit of the part number is the number of CPUs; 78 * ref Table 26, p38 1250-UM101-R. 79 */ 80 part = G_SYS_PART(READ_REG(MIPS_PHYS_TO_KSEG1(A_SCD_SYSTEM_REVISION))); 81 return (found < ((part >> 8) & 0xf)); 82 } 83 84 static void 85 cpu_attach(device_t parent, device_t self, void *aux) 86 { 87 struct cpu_info *ci; 88 struct cpu_softc * const cpu = device_private(self); 89 const char * const xname = device_xname(self); 90 uint32_t config; 91 int plldiv; 92 93 found++; 94 95 /* XXX this code must run on the target CPU */ 96 config = mips3_cp0_config_read(); 97 __USE(config); 98 KASSERT((config & MIPS3_CONFIG_K0_MASK) == 5); 99 100 /* Determine CPU frequency */ 101 102 /* XXX: We should determine the CPU frequency from a time source 103 * not coupled with the CPU crystal, like the RTC. Unfortunately 104 * we don't attach that yet... 105 */ 106 plldiv = G_SYS_PLL_DIV(READ_REG(MIPS_PHYS_TO_KSEG1(A_SCD_SYSTEM_CFG))); 107 if (plldiv == 0) { 108 aprint_normal(": PLL_DIV of zero found, assuming 6 (300MHz)\n"); 109 plldiv = 6; 110 111 aprint_normal("%s", xname); 112 } 113 114 if (found == 1) { 115 ci = curcpu(); 116 ci->ci_cpu_freq = 50000000 * plldiv; 117 /* Compute the delay divisor. */ 118 ci->ci_divisor_delay = (ci->ci_cpu_freq + 500000) / 1000000; 119 /* Compute clock cycles per hz */ 120 ci->ci_cycles_per_hz = (ci->ci_cpu_freq + hz / 2 ) / hz; 121 122 aprint_normal(": %lu.%02luMHz (hz cycles = %lu, delay divisor = %lu)\n", 123 ci->ci_cpu_freq / 1000000, 124 (ci->ci_cpu_freq % 1000000) / 10000, 125 ci->ci_cycles_per_hz, ci->ci_divisor_delay); 126 127 KASSERT(ci->ci_cpuid == 0); 128 129 cpu->sb1cpu_dev = self; 130 cpu->sb1cpu_ci = ci; 131 ci->ci_softc = cpu; 132 133 sb1250_cpu_init(cpu); 134 } else { 135 #if defined(MULTIPROCESSOR) 136 int status; 137 ci = cpu_info_alloc(NULL, found - 1, 0, found - 1, 0); 138 KASSERT(ci); 139 140 cpu->sb1cpu_dev = self; 141 cpu->sb1cpu_ci = ci; 142 ci->ci_softc = cpu; 143 144 sb1250_cpu_init(cpu); 145 146 status = cfe_cpu_start(ci->ci_cpuid, cpu_trampoline, 147 (long) ci->ci_data.cpu_idlelwp->l_md.md_utf, 0, 148 (long) ci); 149 if (status != 0) { 150 aprint_error(": CFE call to start failed: %d\n", 151 status); 152 } 153 for (size_t i = 0; i < 10000; i++) { 154 if (kcpuset_isset(cpus_hatched, cpu_index(ci))) 155 break; 156 DELAY(100); 157 } 158 if (!kcpuset_isset(cpus_hatched, cpu_index(ci))) { 159 aprint_error(": failed to hatch!\n"); 160 return; 161 } 162 #else 163 aprint_normal_dev(self, 164 "processor off-line; " 165 "multiprocessor support not present in kernel\n"); 166 return; 167 #endif 168 } 169 170 /* 171 * Announce ourselves. 172 */ 173 aprint_normal("%s: ", xname); 174 cpu_identify(self); 175 176 cpu_attach_common(self, ci); 177 } 178
Indexes created Sun Oct 25 00:26:45 UTC 2026