Lines Matching refs:icode
265 enum insn_code icode;
325 icode = find_widening_optab_handler (widen_pattern_optab,
329 icode = optab_handler (widen_pattern_optab, tmode0);
330 gcc_assert (icode != CODE_FOR_nothing);
358 expand_insn (icode, op, eops);
378 enum insn_code icode = optab_handler (ternary_optab, mode);
386 expand_insn (icode, 4, ops);
443 insn_code icode = optab_handler (vec_duplicate_optab, vmode);
444 if (icode != CODE_FOR_nothing)
449 expand_insn (icode, 2, ops);
459 icode = convert_optab_handler (vec_init_optab, vmode,
461 if (icode == CODE_FOR_nothing)
468 emit_insn (GEN_FCN (icode) (ret, gen_rtx_PARALLEL (vmode, vec)));
1357 is an insn ICODE that directly implements the indicated operation.
1360 expand_binop_directly (enum insn_code icode, machine_mode mode, optab binoptab,
1364 machine_mode xmode0 = insn_data[(int) icode].operand[1].mode;
1365 machine_mode xmode1 = insn_data[(int) icode].operand[2].mode;
1434 tmp_mode = insn_data[(int) icode].operand[0].mode;
1445 pat = maybe_gen_insn (icode, 3, ops);
1457 return expand_binop_directly (icode, mode, binoptab, op0, op1,
1487 enum insn_code icode;
1526 icode = find_widening_optab_handler (binoptab, mode, from_mode);
1529 icode = optab_handler (binoptab, mode);
1530 if (icode != CODE_FOR_nothing)
1532 temp = expand_binop_directly (icode, mode, binoptab, op0, op1,
1543 && (icode = optab_handler (rotr_optab, mode)) != CODE_FOR_nothing)
1545 && (icode = optab_handler (rotl_optab, mode)) != CODE_FOR_nothing))
1561 temp = expand_binop_directly (icode, int_mode, otheroptab, op0, newop1,
1614 && (icode = optab_handler (otheroptab, mode)) != CODE_FOR_nothing)
1628 temp = expand_binop_directly (icode, mode, otheroptab, op0, vop1,
2398 enum insn_code icode = optab_handler (unoptab, mode);
2403 if (maybe_expand_insn (icode, 3, ops))
2471 enum insn_code icode = optab_handler (binoptab, mode);
2472 machine_mode mode0 = insn_data[icode].operand[1].mode;
2473 machine_mode mode1 = insn_data[icode].operand[2].mode;
2484 if (maybe_expand_insn (icode, 4, ops))
3189 enum insn_code icode = optab_handler (unoptab, mode);
3195 pat = maybe_gen_insn (icode, 2, ops);
3832 enum insn_code icode;
3841 icode = optab_handler (signbit_optab, mode);
3842 if (icode != CODE_FOR_nothing)
3844 imode = as_a <scalar_int_mode> (insn_data[(int) icode].operand[0].mode);
3846 emit_unop_insn (icode, sign, op1, UNKNOWN);
4063 maybe_emit_unop_insn (enum insn_code icode, rtx target, rtx op0,
4071 pat = maybe_gen_insn (icode, 2, ops);
4093 emit_unop_insn (enum insn_code icode, rtx target, rtx op0, enum rtx_code code)
4095 bool ok = maybe_emit_unop_insn (icode, target, op0, code);
4277 enum insn_code icode;
4280 && (icode = optab_handler (cbranch_optab, mode)) != CODE_FOR_nothing
4281 && insn_operand_matches (icode, 0, test))
4284 && (icode = optab_handler (cstore_optab, mode)) != CODE_FOR_nothing
4285 && insn_operand_matches (icode, 1, test))
4309 operand OPNO of pattern ICODE. */
4312 insn_predicate_matches_p (enum insn_code icode, unsigned int opno,
4319 return insn_operand_matches (icode, opno, test);
4330 enum insn_code icode
4332 if (icode == CODE_FOR_nothing)
4335 return insn_predicate_matches_p (icode, 1, code, mask_mode, value_mode);
4346 enum insn_code icode
4348 if (icode == CODE_FOR_nothing)
4351 return insn_predicate_matches_p (icode, 3, code, value_mode, cmp_op_mode);
4368 enum insn_code icode = optab_handler (vec_set_optab, vec_mode);
4370 return icode != CODE_FOR_nothing && insn_operand_matches (icode, 0, reg1)
4371 && insn_operand_matches (icode, 1, reg2)
4372 && insn_operand_matches (icode, 2, reg3);
4502 enum insn_code icode = optab_handler (cbranch_optab, CCmode);
4504 gcc_assert (icode != CODE_FOR_nothing
4505 && insn_operand_matches (icode, 0, test));
4514 enum insn_code icode;
4515 icode = optab_handler (cbranch_optab, cmp_mode);
4516 if (icode != CODE_FOR_nothing
4517 && insn_operand_matches (icode, 0, test))
4520 rtx op0 = prepare_operand (icode, x, 1, mode, cmp_mode, unsignedp);
4521 rtx op1 = prepare_operand (icode, y, 2, mode, cmp_mode, unsignedp);
4523 && insn_operand_matches (icode, 1, op0)
4524 && insn_operand_matches (icode, 2, op1))
4609 /* Before emitting an insn with code ICODE, make sure that X, which is going
4615 prepare_operand (enum insn_code icode, rtx x, int opnum, machine_mode mode,
4621 if (!insn_operand_matches (icode, opnum, x))
4623 machine_mode op_mode = insn_data[(int) icode].operand[opnum].mode;
4643 enum insn_code icode;
4648 icode = optab_handler (cbranch_optab, optab_mode);
4650 gcc_assert (icode != CODE_FOR_nothing);
4651 gcc_assert (insn_operand_matches (icode, 0, test));
4652 insn = emit_jump_insn (GEN_FCN (icode) (test, XEXP (test, 0),
4885 enum insn_code icode;
4935 icode = direct_optab_handler (movcc_optab, mode);
4937 if (icode == CODE_FOR_nothing)
5016 enum insn_code icode;
5037 icode = direct_optab_handler (movcc_optab, mode);
5039 if (icode == CODE_FOR_nothing)
5052 if (maybe_expand_insn (icode, 4, ops))
5085 insn_code icode = direct_optab_handler (op, mode);
5087 if (icode == CODE_FOR_nothing)
5101 if (maybe_expand_insn (icode, 4, ops))
5133 enum insn_code icode;
5158 icode = optab_handler (addcc_optab, mode);
5160 if (icode == CODE_FOR_nothing)
5188 if (maybe_expand_insn (icode, 4, ops))
5209 enum insn_code icode = optab_handler (add_optab, GET_MODE (x));
5211 gcc_assert (insn_operand_matches (icode, 0, x));
5212 gcc_assert (insn_operand_matches (icode, 1, x));
5213 gcc_assert (insn_operand_matches (icode, 2, y));
5215 return GEN_FCN (icode) (x, x, y);
5224 enum insn_code icode = optab_handler (add_optab, GET_MODE (r0));
5226 if (icode == CODE_FOR_nothing
5227 || !insn_operand_matches (icode, 0, r0)
5228 || !insn_operand_matches (icode, 1, r1)
5229 || !insn_operand_matches (icode, 2, c))
5232 return GEN_FCN (icode) (r0, r1, c);
5238 enum insn_code icode;
5242 icode = optab_handler (add_optab, GET_MODE (x));
5244 if (icode == CODE_FOR_nothing)
5247 if (!insn_operand_matches (icode, 0, x)
5248 || !insn_operand_matches (icode, 1, x)
5249 || !insn_operand_matches (icode, 2, y))
5260 enum insn_code icode = optab_handler (addptr3_optab, GET_MODE (x));
5262 gcc_assert (insn_operand_matches (icode, 0, x));
5263 gcc_assert (insn_operand_matches (icode, 1, y));
5264 gcc_assert (insn_operand_matches (icode, 2, z));
5266 return GEN_FCN (icode) (x, y, z);
5275 enum insn_code icode;
5279 icode = optab_handler (addptr3_optab, GET_MODE (x));
5281 if (icode == CODE_FOR_nothing)
5284 if (!insn_operand_matches (icode, 0, x)
5285 || !insn_operand_matches (icode, 1, y)
5286 || !insn_operand_matches (icode, 2, z))
5297 enum insn_code icode = optab_handler (sub_optab, GET_MODE (x));
5299 gcc_assert (insn_operand_matches (icode, 0, x));
5300 gcc_assert (insn_operand_matches (icode, 1, x));
5301 gcc_assert (insn_operand_matches (icode, 2, y));
5303 return GEN_FCN (icode) (x, x, y);
5312 enum insn_code icode = optab_handler (sub_optab, GET_MODE (r0));
5314 if (icode == CODE_FOR_nothing
5315 || !insn_operand_matches (icode, 0, r0)
5316 || !insn_operand_matches (icode, 1, r1)
5317 || !insn_operand_matches (icode
5320 return GEN_FCN (icode) (r0, r1, c);
5326 enum insn_code icode;
5330 icode = optab_handler (sub_optab, GET_MODE (x));
5332 if (icode == CODE_FOR_nothing)
5335 if (!insn_operand_matches (icode, 0, x)
5336 || !insn_operand_matches (icode, 1, x)
5337 || !insn_operand_matches (icode, 2, y))
5351 enum insn_code icode = can_extend_p (mto, mfrom, unsignedp);
5352 return GEN_FCN (icode) (x, y);
5365 enum insn_code icode;
5389 icode = can_float_p (fmode, imode, unsignedp);
5390 if (icode == CODE_FOR_nothing && unsignedp)
5396 icode = scode, doing_unsigned = 0;
5399 if (icode != CODE_FOR_nothing)
5407 emit_unop_insn (icode, target, from,
5572 enum insn_code icode;
5588 icode = can_fix_p (imode, fmode, unsignedp, &must_trunc);
5589 if (icode == CODE_FOR_nothing && imode != GET_MODE (to) && unsignedp)
5590 icode = can_fix_p (imode, fmode, 0, &must_trunc), doing_unsigned = 0;
5592 if (icode != CODE_FOR_nothing)
5609 if (maybe_emit_unop_insn (icode, target, from1,
5843 enum insn_code icode;
5855 icode = convert_optab_handler (tab, imode, fmode);
5856 if (icode != CODE_FOR_nothing)
5865 if (!maybe_emit_unop_insn (icode, target, from, UNKNOWN))
5939 enum insn_code icode;
5946 icode = optab_handler (ctrap_optab, mode);
5947 if (icode == CODE_FOR_nothing)
5951 if (!insn_operand_matches (icode, 3, tcode))
5961 insn = GEN_FCN (icode) (trap_rtx, XEXP (trap_rtx, 0), XEXP (trap_rtx, 1),
6058 first comparison operand for insn ICODE. Do not generate the
6064 enum insn_code icode, unsigned int opno)
6090 if (!maybe_legitimize_operands (icode, opno, 2, ops))
6156 expand_vec_perm_1 (enum insn_code icode, rtx target,
6172 if (!insn_operand_matches (icode, 1, v0))
6174 gcc_checking_assert (insn_operand_matches (icode, 1, v0));
6175 gcc_checking_assert (insn_operand_matches (icode, 2, v0));
6186 if (maybe_expand_insn (icode, 4, ops))
6324 insn_code icode = direct_optab_handler (vec_perm_optab, mode);
6325 if (icode != CODE_FOR_nothing)
6328 rtx tmp = expand_vec_perm_1 (icode, target, v0, v1, sel_rtx);
6336 icode = direct_optab_handler (vec_perm_optab, qimode);
6337 if (icode != CODE_FOR_nothing)
6340 rtx tmp = expand_vec_perm_1 (icode, target_qi, v0_qi, v1_qi, sel_qi);
6361 enum insn_code icode;
6370 icode = direct_optab_handler (vec_perm_optab, mode);
6371 if (icode != CODE_FOR_nothing)
6373 tmp = expand_vec_perm_1 (icode, target, v0, v1, sel);
6384 icode = direct_optab_handler (vec_perm_optab, qimode);
6385 if (icode == CODE_FOR_nothing)
6423 icode, tmp, gen_lowpart (qimode, v0),
6437 enum insn_code icode;
6440 icode = direct_optab_handler (vec_series_optab, vmode);
6441 gcc_assert (icode != CODE_FOR_nothing);
6447 expand_insn (icode, 3, ops);
6457 enum insn_code icode;
6472 icode = get_vec_cmp_icode (vmode, mask_mode, unsignedp);
6473 if (icode == CODE_FOR_nothing)
6476 icode = get_vec_cmp_eq_icode (vmode, mask_mode);
6477 if (icode == CODE_FOR_nothing)
6482 unsignedp, icode, 2);
6487 expand_insn (icode, 4, ops);
6498 enum insn_code icode;
6527 icode = optab_handler (tab1, mode);
6528 wmode = insn_data[icode].operand[0].mode;
6536 expand_insn (icode, 3, eops);
6645 enum insn_code icode;
6648 icode = direct_optab_handler (atomic_exchange_optab, mode);
6649 if (icode != CODE_FOR_nothing)
6657 if (maybe_expand_insn (icode, 4, ops))
6675 enum insn_code icode;
6678 icode = optab_handler (sync_lock_test_and_set_optab, mode);
6687 if (icode != CODE_FOR_nothing)
6693 if (maybe_expand_insn (icode, 3, ops))
6758 enum insn_code icode = targetm.code_for_atomic_test_and_set;
6759 gcc_checking_assert (insn_data[icode].operand[1].mode == QImode);
6763 pat_bool_mode = insn_data[icode].operand[0].mode;
6768 if (maybe_expand_insn (icode, 3, ops))
6920 enum insn_code icode;
6945 icode = direct_optab_handler (atomic_compare_and_swap_optab, mode);
6946 if (icode != CODE_FOR_nothing)
6948 machine_mode bool_mode = insn_data[icode].operand[0].mode;
6968 if (maybe_expand_insn (icode, 8, ops))
6979 icode = optab_handler (sync_compare_and_swap_optab, mode);
6980 if (icode != CODE_FOR_nothing)
6988 if (!maybe_expand_insn (icode, 4, ops))
7157 enum insn_code icode;
7160 icode = direct_optab_handler (atomic_load_optab, mode);
7161 if (icode != CODE_FOR_nothing)
7171 if (maybe_expand_insn (icode, 3, ops))
7215 enum insn_code icode;
7219 icode = direct_optab_handler (atomic_store_optab, mode);
7220 if (icode != CODE_FOR_nothing)
7228 if (maybe_expand_insn (icode, 3, ops))
7242 icode = direct_optab_handler (sync_lock_release_optab, mode);
7243 if (icode != CODE_FOR_nothing)
7247 if (maybe_expand_insn (icode, 2, ops))
7427 enum insn_code icode;
7436 icode = direct_optab_handler (optab->mem_no_result, mode);
7442 icode = direct_optab_handler (optab->no_result, mode);
7451 icode = direct_optab_handler (after ? optab->mem_fetch_after
7458 icode = optab_handler (after ? optab->fetch_after
7464 if (icode == CODE_FOR_nothing)
7471 if (maybe_expand_insn (icode, num_ops, ops))
7705 instruction ICODE. */
7708 insn_operand_matches (enum insn_code icode, unsigned int opno, rtx operand)
7710 return (!insn_data[(int) icode].operand[opno].predicate
7711 || (insn_data[(int) icode].operand[opno].predicate
7712 (operand, insn_data[(int) icode].operand[opno].mode)));
7753 maybe_legitimize_operand_same_code (enum insn_code icode, unsigned int opno,
7757 if (insn_operand_matches (icode, opno, op->value))
7764 if (insn_data[(int) icode].operand[opno].allows_mem && MEM_P (op->value))
7779 if (insn_operand_matches (icode, opno, mem))
7791 /* Try to make OP match operand OPNO of instruction ICODE. Return true
7795 maybe_legitimize_operand (enum insn_code icode, unsigned int opno,
7806 return maybe_legitimize_operand_same_code (icode, opno, op);
7814 && maybe_legitimize_operand_same_code (icode, opno, op))
7826 if (maybe_legitimize_operand_same_code (icode, opno, op))
7844 imode = insn_data[(int) icode].operand[opno].mode;
7866 mode = insn_data[(int) icode].operand[opno].mode;
7876 return insn_operand_matches (icode, opno, op->value);
7892 ICODE are similar enough for the result of legitimizing OP1 to be
7897 can_reuse_operands_p (enum insn_code icode,
7905 || (insn_data[(int) icode].operand[opno1].mode
7906 != insn_data[(int) icode].operand[opno2].mode))
7930 of instruction ICODE. Return true on success, leaving the new operand
7934 maybe_legitimize_operands (enum insn_code icode, unsigned int opno,
7951 if (can_reuse_operands_p (icode, opno + j, opno + i, &ops[j], &ops[i])
7954 && insn_operand_matches (icode, opno + i, ops[j].value))
7961 if (j == i && !maybe_legitimize_operand (icode, opno + i, &ops[i]))
7970 /* Try to generate instruction ICODE, using operands [OPS, OPS + NOPS)
7976 maybe_gen_insn (enum insn_code icode, unsigned int nops,
7979 gcc_assert (nops == (unsigned int) insn_data[(int) icode].n_generator_args);
7980 if (!maybe_legitimize_operands (icode, 0, nops, ops))
7986 return GEN_FCN (icode) (ops[0].value);
7988 return GEN_FCN (icode) (ops[0].value, ops[1].value);
7990 return GEN_FCN (icode) (ops[0].value, ops[1].value, ops[2].value);
7992 return GEN_FCN (icode) (ops[0].value, ops[1].value, ops[2].value,
7995 return GEN_FCN (icode) (ops[0].value, ops[1].value, ops[2].value,
7998 return GEN_FCN (icode) (ops[0].value, ops[1].value, ops[2].value,
8001 return GEN_FCN (icode) (ops[0].value, ops[1].value, ops[2].value,
8005 return GEN_FCN (icode) (ops[0].value, ops[1].value, ops[2].value,
8009 return GEN_FCN (icode) (ops[0].value, ops[1].value, ops[2].value,
8016 /* Try to emit instruction ICODE, using operands [OPS, OPS + NOPS)
8020 maybe_expand_insn (enum insn_code icode, unsigned int nops,
8023 rtx_insn *pat = maybe_gen_insn (icode, nops, ops);
8035 maybe_expand_jump_insn (enum insn_code icode, unsigned int nops,
8038 rtx_insn *pat = maybe_gen_insn (icode, nops, ops);
8047 /* Emit instruction ICODE, using operands [OPS, OPS + NOPS)
8051 expand_insn (enum insn_code icode, unsigned int nops,
8054 if (!maybe_expand_insn (icode, nops, ops))
8061 expand_jump_insn (enum insn_code icode, unsigned int nops,
8064 if (!maybe_expand_jump_insn (icode, nops, ops))
Indexes created Tue Oct 20 00:27:02 UTC 2026