Lines Matching refs:equiv
1122 rtx equiv = 0;
1126 equiv = reg_equiv_constant (i);
1128 equiv = reg_equiv_invariant (i);
1130 equiv = targetm.delegitimize_address (reg);
1132 equiv = reg;
1134 if (equiv == reg)
1149 if (!equiv)
1157 reg, equiv);
6646 rtx equiv
6651 if (equiv != 0)
6653 if (REG_P (equiv))
6654 regno = REGNO (equiv);
6661 gcc_assert (GET_CODE (equiv) == SUBREG);
6662 regno = subreg_regno (equiv);
6663 equiv = gen_rtx_REG (rld[r].mode, regno);
6664 /* If we choose EQUIV as the reload register, but the
6666 end up reloading EQUIV in rld[r].mode, not the mode
6667 it had originally. That isn't safe when EQUIV isn't
6672 equiv = 0;
6678 if (equiv != 0)
6697 equiv = 0;
6700 if (equiv != 0
6702 equiv = 0;
6709 if (equiv != 0)
6711 if (reg_overlap_mentioned_for_reload_p (equiv,
6715 reload_override_in[r] = equiv;
6716 equiv = 0;
6720 /* If the equiv register we have found is explicitly clobbered
6723 In particular, we then can't use EQUIV for a
6726 if (equiv != 0)
6740 reload_override_in[r] = equiv;
6743 equiv = 0;
6758 reload_override_in[r] = equiv;
6761 equiv = 0;
6768 if (equiv != 0
6774 rld[r].reg_rtx = equiv;
6784 /* If any of the hard registers in EQUIV are spill
Indexes created Thu Jul 23 00:25:05 UTC 2026