Lines Matching refs:R24
217 #define r_arg1 r24 /* multiplier */
258 ;;; R25:R24 = (unsigned int) R22 * (unsigned int) R24
269 ;;; R25:R24 = (signed int) R22 * (signed int) R24
303 ;;; R25:R24 = R23:R22 * R25:R24
704 ;; R24:R22 *= R20:R18
737 ;; R24:R22 *= R20:R18
1102 #define A2 r24
1206 sbc r24, r26
1340 #define r_arg1 r24 /* dividend, quotient */
1397 #define r_arg1L r24 /* dividend Low */
1502 ;; R24:R22 = R24:R24 udiv R20:R18
1503 ;; R20:R18 = R24:R22 umod R20:R18
1549 ;; R24:R22 = R24:R22 div R20:R18
1550 ;; R20:R18 = R24:R22 mod R20:R18
1624 #define r_arg1HL r24
1802 ;; R25:R18 = R24:R18 umod R17:R10
1810 ;; R25:R18 = R24:R18 udiv R17:R10
1960 ;; R25:R18 = R24:R18 mod R17:R10
1968 ;; R25:R18 = R24:R18 div R17:R10
2301 ;; Word address of gs() jumptable entry in R24:Z
2302 rol r24
2303 out __RAMPZ__, r24
2479 mov r24, r16
2488 ldi r24, pm_hh8(__ctors_start)
2489 cpc r16, r24
2507 mov r24, r16
2520 ldi r24, pm_hh8(__dtors_end)
2521 cpc r16, r24
2712 ;; Clobbers: __tmp_reg__, R23, R24, R25, X, Z
2791 ;; r25:r24 = ffs32 (r25:r22)
2801 or r22, r24
2807 1: mov r24, r22
2814 ;; r25:r24 = ffs16 (r25:r24)
2820 tst r24
2823 cpse r24, __zero_reg__
2827 or r24, r25
2835 ;; r25:r24 = r26 + zero_extend16 (ffs8(r24))
2836 ;; r24 must be != 0
2840 lsr r24
2842 mov r24, r26
2856 ;; r25:r24 = ctz32 (r25:r22)
2862 dec r24
2869 ;; r25:r24 = ctz16 (r25:r24)
2875 dec r24
2888 ;; r25:r24 = clz64 (r25:r18)
2892 sbrs r24, 5
2896 mov_l r24, r20
2899 subi r24, -32
2906 ;; r25:r24 = clz32 (r25:r22)
2910 sbrs r24, 4
2912 mov_l r24, r22
2915 subi r24, -16
2922 ;; r25:r24 = clz16 (r25:r24)
2929 or r25, r24
2931 ldi r24, 16
2940 mov r24, r26
2953 ;; r25:r24 = parity64 (r25:r18)
2956 eor r24, r18
2957 eor r24, r19
2958 eor r24, r20
2959 eor r24, r21
2965 ;; r25:r24 = parity32 (r25:r22)
2968 eor r24, r22
2969 eor r24, r23
2975 ;; r25:r24 = parity16 (r25:r24)
2978 eor r24, r25
2982 ;; r25:r24 = parity8 (r24)
2985 ;; parity is in r24[0..7]
2986 mov __tmp_reg__, r24
2988 eor r24, __tmp_reg__
2989 ;; parity is in r24[0..3]
2990 subi r24, -4
2991 andi r24, -5
2992 subi r24, -6
2993 ;; parity is in r24[0,3]
2994 sbrc r24, 3
2995 inc r24
2996 ;; parity is in r24[0]
2997 andi r24, 1
3011 ;; r25:r24 = popcount16 (r25:r24)
3015 push r24
3016 mov r24, r25
3024 add r24, __tmp_reg__
3031 ;; r25:r24 = popcount32 (r25:r22)
3035 push r24
3036 mov_l r24, r22
3045 ;; r25:r24 = popcount64 (r25:r18)
3049 push r24
3052 mov_l r24, r20
3061 ;; r24 = popcount8 (r24)
3064 mov __tmp_reg__, r24
3065 andi r24, 1
3068 adc r24, __zero_reg__
3070 adc r24, __zero_reg__
3072 adc r24, __zero_reg__
3074 adc r24, __zero_reg__
3076 adc r24, __zero_reg__
3078 adc r24, __tmp_reg__
3101 bswap r23, r24
3111 bswap r19, r24
3149 mov r23, r24
3150 mov r24, r25
3155 ror r24
3181 mov r25, r24
3182 mov r24, r23
3197 rol r24
3215 mov r25, r24
3216 mov r24, r23
3230 rol r24
3256 ;;; r23:r22 = fmuls (r24, r25) like in FMULS instruction
3257 ;;; Clobbers: r24, r25, __tmp_reg__
3270 ;;; r23:r22 = fmulsu (r24, r25) like in FMULSU instruction
3271 ;;; Clobbers: r24, r25, __tmp_reg__
3300 ;;; r22:r23 = fmul (r24, r25) like in FMUL instruction
3301 ;;; Clobbers: r24, r25, __tmp_reg__