Lines Matching defs:inst1
272 unsigned short inst1;
280 inst1 = self->ops->read_mem_uint (pc, 2, byte_order_for_code);
303 if ((inst1 & 0xff00) == 0xbf00 && (inst1 & 0x000f) != 0)
308 itstate = inst1 & 0x00ff;
309 pc += thumb_insn_size (inst1);
313 inst1 = self->ops->read_mem_uint (pc, 2,byte_order_for_code);
314 pc += thumb_insn_size (inst1);
327 pc += thumb_insn_size (inst1);
332 inst1 = self->ops->read_mem_uint (pc, 2, byte_order_for_code);
334 pc += thumb_insn_size (inst1);
359 pc += thumb_insn_size (inst1);
375 inst1 = self->ops->read_mem_uint (pc, 2, byte_order_for_code);
376 pc += thumb_insn_size (inst1);
396 next_pcs.push_back (MAKE_THUMB_ADDR (pc + thumb_insn_size (inst1)));
404 if ((inst1 & 0xff00) == 0xbd00) /* pop {rlist, pc} */
411 = count_one_bits (bits (inst1, 0, 7)) * ARM_INT_REGISTER_SIZE;
415 else if ((inst1 & 0xf000) == 0xd000) /* conditional branch */
417 unsigned long cond = bits (inst1, 8, 11);
423 nextpc = pc_val + (sbits (inst1, 0, 7) << 1);
425 else if ((inst1 & 0xf800) == 0xe000) /* unconditional branch */
427 nextpc = pc_val + (sbits (inst1, 0, 10) << 1);
429 else if (thumb_insn_size (inst1) == 4) /* 32-bit instruction */
438 if ((inst1 & 0xf800) == 0xf000 && (inst2 & 0x8000) == 0x8000)
447 imm1 = sbits (inst1, 0, 10);
460 else if (inst1 == 0xf3de && (inst2 & 0xff00) == 0x3f00)
466 else if ((inst2 & 0xd000) == 0x8000 && (inst1 & 0x0380) != 0x0380)
469 if (condition_true (bits (inst1, 6, 9), status))
473 sign = sbits (inst1, 10, 10);
474 imm1 = bits (inst1, 0, 5);
487 else if ((inst1 & 0xfe50) == 0xe810)
492 rn = bits (inst1, 0, 3);
493 if (bit (inst1, 7) && !bit (inst1, 8))
500 else if (!bit (inst1, 7) && bit (inst1, 8))
507 else if (bit (inst1, 7) && bit (inst1, 8))
512 else if (!bit (inst1, 7) && !bit (inst1, 8))
526 else if ((inst1 & 0xffef) == 0xea4f && (inst2 & 0xfff0) == 0x0f00)
532 else if ((inst1 & 0xff70) == 0xf850 && (inst2 & 0xf000) == 0xf000)
538 rn = bits (inst1, 0, 3);
543 if (bit (inst1, 7))
548 else if (bit (inst1, 7))
573 else if ((inst1 & 0xfff0) == 0xe8d0 && (inst2 & 0xfff0) == 0xf000)
578 tbl_reg = bits (inst1, 0, 3);
588 else if ((inst1 & 0xfff0) == 0xe8d0 && (inst2 & 0xfff0) == 0xf010)
593 tbl_reg = bits (inst1, 0, 3);
604 else if ((inst1 & 0xff00) == 0x4700) /* bx REG, blx REG */
606 if (bits (inst1, 3, 6) == 0x0f)
609 nextpc = regcache_raw_get_unsigned (regcache, bits (inst1, 3, 6));
611 else if ((inst1 & 0xff87) == 0x4687) /* mov pc, REG */
613 if (bits (inst1, 3, 6) == 0x0f)
616 nextpc = regcache_raw_get_unsigned (regcache, bits (inst1, 3, 6));
620 else if ((inst1 & 0xf500) == 0xb100)
623 int imm = (bit (inst1, 9) << 6) + (bits (inst1, 3, 7) << 1);
624 ULONGEST reg = regcache_raw_get_unsigned (regcache, bits (inst1, 0, 2));
626 if (bit (inst1, 11) && reg != 0)
628 else if (!bit (inst1, 11) && reg == 0)
Indexes created Fri Apr 03 00:24:04 UTC 2026