Lines Matching defs:arm_insn
11209 uint32_t arm_insn; /* Should accommodate thumb. */
11275 arm_insn_r->opcode = bits (arm_insn_r->arm_insn, 21, 24);
11276 arm_insn, 4, 7);
11281 immed_low = bits (arm_insn_r->arm_insn, 0, 3);
11282 immed_high = bits (arm_insn_r->arm_insn, 8, 11);
11283 reg_src1 = bits (arm_insn_r->arm_insn, 16, 19);
11320 reg_src1 = bits (arm_insn_r->arm_insn, 0, 3);
11322 reg_src2 = bits (arm_insn_r->arm_insn, 16, 19);
11359 immed_low = bits (arm_insn_r->arm_insn, 0, 3);
11360 immed_high = bits (arm_insn_r->arm_insn, 8, 11);
11362 reg_src1 = bits (arm_insn_r->arm_insn, 16, 19);
11388 *(record_buf) = bits (arm_insn_r->arm_insn, 16, 19);
11396 reg_src1 = bits (arm_insn_r->arm_insn, 0, 3);
11397 reg_src2 = bits (arm_insn_r->arm_insn, 16, 19);
11424 *(record_buf) = bits (arm_insn_r->arm_insn, 16, 19);
11445 opcode1 = bits (arm_insn_r->arm_insn, 20, 27);
11446 opcode2 = bits (arm_insn_r->arm_insn, 4, 7);
11462 opcode1 = bits (arm_insn_r->arm_insn, 25, 27);
11463 if (3 == opcode1 && bit (arm_insn_r->arm_insn, 4))
11470 opcode1 = bits (arm_insn_r->arm_insn, 24, 27);
11471 opcode2 = bits (arm_insn_r->arm_insn, 4, 7);
11472 insn_op1 = bits (arm_insn_r->arm_insn, 20, 23);
11481 record_buf[0] = bits (arm_insn_r->arm_insn, 12, 15);
11488 record_buf[0] = bits (arm_insn_r->arm_insn, 16, 19);
11489 record_buf[1] = bits (arm_insn_r->arm_insn, 12, 15);
11495 opcode1 = bits (arm_insn_r->arm_insn, 26, 27);
11496 opcode2 = bits (arm_insn_r->arm_insn, 23, 24);
11497 insn_op1 = bits (arm_insn_r->arm_insn, 21, 22);
11501 if (!opcode1 && 2 == opcode2 && !bit (arm_insn_r->arm_insn, 20)
11504 if (!bit (arm_insn_r->arm_insn,25))
11506 if (!bits (arm_insn_r->arm_insn, 4, 7))
11511 record_buf[0] = bits (arm_insn_r->arm_insn, 12, 15);
11527 else if (1 == bits (arm_insn_r->arm_insn, 4, 7))
11538 record_buf[0] = bits (arm_insn_r->arm_insn, 12, 15);
11542 else if (3 == bits (arm_insn_r->arm_insn, 4, 7))
11549 else if (5 == bits (arm_insn_r->arm_insn, 4, 7))
11553 record_buf[1] = bits (arm_insn_r->arm_insn, 12, 15);
11556 else if (7 == bits (arm_insn_r->arm_insn, 4, 7))
11566 else if(8 == bits (arm_insn_r->arm_insn, 4, 7)
11567 || 10 == bits (arm_insn_r->arm_insn, 4, 7)
11568 || 12 == bits (arm_insn_r->arm_insn, 4, 7)
11569 || 14 == bits (arm_insn_r->arm_insn, 4, 7)
11577 record_buf[0] = bits (arm_insn_r->arm_insn, 12, 15);
11584 record_buf[0] = bits (arm_insn_r->arm_insn, 12, 15);
11585 record_buf[1] = bits (arm_insn_r->arm_insn, 16, 19);
11591 record_buf[0] = bits (arm_insn_r->arm_insn, 12, 15);
11614 opcode1 = bits (arm_insn_r->arm_insn, 25, 27);
11615 opcode2 = bits (arm_insn_r->arm_insn, 20, 24);
11616 insn_op1 = bits (arm_insn_r->arm_insn, 5, 6);
11620 if (!opcode1 && bit (arm_insn_r->arm_insn, 7)
11621 && bit (arm_insn_r->arm_insn, 4) && 1 != arm_insn_r->cond
11630 reg_src1 = bits (arm_insn_r->arm_insn, 16, 19);
11644 record_buf[0] = bits (arm_insn_r->arm_insn, 12, 15);
11647 else if (1 == insn_op1 && !bit (arm_insn_r->arm_insn, 20))
11653 else if (2 == insn_op1 && !bit (arm_insn_r->arm_insn, 20))
11656 record_buf[0] = bits (arm_insn_r->arm_insn, 12, 15);
11660 else if (3 == insn_op1 && !bit (arm_insn_r->arm_insn, 20))
11666 else if (bit (arm_insn_r->arm_insn, 20) && insn_op1 <= 3)
11669 record_buf[0] = bits (arm_insn_r->arm_insn, 12, 15);
11675 opcode1 = bits (arm_insn_r->arm_insn, 23, 27);
11676 if (24 == opcode1 && bit (arm_insn_r->arm_insn, 21)
11705 arm_insn_r->opcode = bits (arm_insn_r->arm_insn, 21, 24);
11706 arm_insn_r->decode = bits (arm_insn_r->arm_insn, 4, 7);
11707 opcode1 = bits (arm_insn_r->arm_insn, 20, 24);
11715 record_buf[0] = bits (arm_insn_r->arm_insn, 12, 15);
11724 && sbo_sbz (arm_insn_r->arm_insn, 9, 12, 1))
11753 && sbo_sbz (arm_insn_r->arm_insn, 9, 12, 1))
11761 && sbo_sbz (arm_insn_r->arm_insn, 9, 4, 1)
11762 && sbo_sbz (arm_insn_r->arm_insn, 17, 4, 1))
11765 record_buf[0] = bits (arm_insn_r->arm_insn, 12, 15);
11768 else if (!bit (arm_insn_r->arm_insn, INSN_S_L_BIT_NUM)
11770 && sbo_sbz (arm_insn_r->arm_insn, 17, 4, 1)
11771 && sbo_sbz (arm_insn_r->arm_insn, 1, 12, 0))
11774 record_buf[0] = bits (arm_insn_r->arm_insn, 12, 15);
11787 record_buf[0] = bits (arm_insn_r->arm_insn, 16, 19);
11794 record_buf[0] = bits (arm_insn_r->arm_insn, 16, 19);
11795 record_buf[1] = bits (arm_insn_r->arm_insn, 12, 15);
11808 reg_src1 = bits (arm_insn_r->arm_insn, 16, 19);
11822 record_buf[0] = bits (arm_insn_r->arm_insn, 12, 15);
11836 switch (bits (arm_insn_r->arm_insn, 5, 6))
11848 record_buf[0] = bits (arm_insn_r->arm_insn, 12, 15);
11851 if (bit (arm_insn_r->arm_insn, 21))
11855 = bits (arm_insn_r->arm_insn, 16, 19);
11861 int rn = bits (arm_insn_r->arm_insn, 16, 19);
11863 record_buf[0] = bits (arm_insn_r->arm_insn, 12, 15);
11869 if (bit (arm_insn_r->arm_insn, 21))
11883 record_buf[0] = bits (arm_insn_r->arm_insn, 12, 15);
11887 if (bit (arm_insn_r->arm_insn, 21))
11891 = bits (arm_insn_r->arm_insn, 16, 19);
11897 record_buf[0] = bits (arm_insn_r->arm_insn, 12, 15);
11900 if (bit (arm_insn_r->arm_insn, 21))
11904 = bits (arm_insn_r->arm_insn, 16, 19);
11911 int rn = bits (arm_insn_r->arm_insn, 16, 19);
11913 record_buf[0] = bits (arm_insn_r->arm_insn, 12, 15);
11919 if (bit (arm_insn_r->arm_insn, 21))
11939 record_buf[0] = bits (arm_insn_r->arm_insn, 12, 15);
11942 if (bit (arm_insn_r->arm_insn, 21))
11946 = bits (arm_insn_r->arm_insn, 16, 19);
11958 record_buf[0] = bits (arm_insn_r->arm_insn, 12, 15);
11961 if (bit (arm_insn_r->arm_insn, 21))
11965 = bits (arm_insn_r->arm_insn, 16, 19);
11993 arm_insn_r->opcode = bits (arm_insn_r->arm_insn, 21, 24);
11994 arm_insn_r->decode = bits (arm_insn_r->arm_insn, 4, 7);
11997 && 2 == bits (arm_insn_r->arm_insn, 20, 21)
11998 && sbo_sbz (arm_insn_r->arm_insn, 13, 4, 1)
12018 record_buf[0] = bits (arm_insn_r->arm_insn, 12, 15);
12037 switch (bits (arm_insn_r->arm_insn, 22, 24))
12047 int rd = bits (arm_insn_r->arm_insn, 12, 15);
12057 int rd = bits (arm_insn_r->arm_insn, 16, 19);
12058 unsigned int op1 = bits (arm_insn_r->arm_insn, 20, 22);
12065 = bits (arm_insn_r->arm_insn, 12, 15);
12071 if (bit (arm_insn_r->arm_insn, 21)
12072 && bits (arm_insn_r->arm_insn, 5, 6) == 0x2)
12076 = bits (arm_insn_r->arm_insn, 12, 15);
12078 else if (bits (arm_insn_r->arm_insn, 20, 21) == 0x0
12079 && bits (arm_insn_r->arm_insn, 5, 7) == 0x0)
12083 = bits (arm_insn_r->arm_insn, 16, 19);
12090 if (bits (arm_insn_r->arm_insn, 20, 21) == 0x3
12091 && bits (arm_insn_r->arm_insn, 5, 7) == 0x7)
12100 = bits (arm_insn_r->arm_insn, 12, 15);
12128 wback = (bit (arm_insn_r->arm_insn, 24) == 0)
12129 || (bit (arm_insn_r->arm_insn, 21) == 1);
12132 reg_base = bits (arm_insn_r->arm_insn, 16, 19);
12134 if (bit (arm_insn_r->arm_insn, INSN_S_L_BIT_NUM))
12139 reg_dest = bits (arm_insn_r->arm_insn, 12, 15);
12158 offset_12 = bits (arm_insn_r->arm_insn, 0, 11);
12162 if (bit (arm_insn_r->arm_insn, 23))
12175 if (bit (arm_insn_r->arm_insn, 22))
12187 if (bit (arm_insn_r->arm_insn, 24))
12220 if (bit (arm_insn_r->arm_insn, 4))
12223 arm_insn_r->opcode = bits (arm_insn_r->arm_insn, 21, 24);
12224 arm_insn_r->decode = bits (arm_insn_r->arm_insn, 4, 7);
12231 if (bit (arm_insn_r->arm_insn, INSN_S_L_BIT_NUM))
12233 reg_dest = bits (arm_insn_r->arm_insn, 12, 15);
12240 record_buf[0] = bits (arm_insn_r->arm_insn, 12, 15);
12252 if (! bits (arm_insn_r->arm_insn, 4, 11))
12257 reg_src1 = bits (arm_insn_r->arm_insn, 0, 3);
12259 reg_src2 = bits (arm_insn_r->arm_insn, 16, 19);
12272 if (bit (arm_insn_r->arm_insn, 23))
12337 offset_12 = bits (arm_insn_r->arm_insn, 5, 6);
12339 reg_src1 = bits (arm_insn_r->arm_insn, 0, 3);
12341 reg_src2 = bits (arm_insn_r->arm_insn, 16, 19);
12343 shift_imm = bits (arm_insn_r->arm_insn, 7, 11);
12402 if (bit (arm_insn_r->arm_insn, 23))
12484 register_bits = bits (arm_insn_r->arm_insn, 0, 15);
12489 reg_base = bits (arm_insn_r->arm_insn, 16, 19);
12492 wback = (bit (arm_insn_r->arm_insn, 21) == 1);
12494 if (bit (arm_insn_r->arm_insn, INSN_S_L_BIT_NUM))
12520 addr_mode = bits (arm_insn_r->arm_insn, 23, 24);
12582 if (bit (arm_insn_r->arm_insn, 24))
12598 "0x%0x at address %s.\n"),arm_insn_r->arm_insn,
12612 reg_t = bits (arm_insn_r->arm_insn, 12, 15);
12613 reg_v = bits (arm_insn_r->arm_insn, 21, 23);
12614 bits_a = bits (arm_insn_r->arm_insn, 21, 23);
12615 bit_l = bit (arm_insn_r->arm_insn, 20);
12616 bit_c = bit (arm_insn_r->arm_insn, 8);
12663 record_buf[0] = (reg_v | (bit (arm_insn_r->arm_insn, 7) << 4))
12670 if (bit (arm_insn_r->arm_insn, 21))
12672 reg_v = reg_v | (bit (arm_insn_r->arm_insn, 7) << 4);
12679 reg_v = reg_v | (bit (arm_insn_r->arm_insn, 7) << 4);
12702 opcode = bits (arm_insn_r->arm_insn, 20, 24);
12703 single_reg = !bit (arm_insn_r->arm_insn, 8);
12709 if (bit (arm_insn_r->arm_insn, 20)) /* to_arm_registers bit 20? */
12711 record_buf[0] = bits (arm_insn_r->arm_insn, 12, 15);
12712 record_buf[1] = bits (arm_insn_r->arm_insn, 16, 19);
12717 uint8_t reg_m = bits (arm_insn_r->arm_insn, 0, 3);
12718 uint8_t bit_m = bit (arm_insn_r->arm_insn, 5);
12751 reg_rn = bits (arm_insn_r->arm_insn, 16, 19);
12753 imm_off8 = bits (arm_insn_r->arm_insn, 0, 7);
12757 if (bit (arm_insn_r->arm_insn, 23))
12762 if (bit (arm_insn_r->arm_insn, 21))
12796 uint32_t bit_d = bit (arm_insn_r->arm_insn, 22);
12798 reg_vd = bits (arm_insn_r->arm_insn, 12, 15);
12799 reg_count = bits (arm_insn_r->arm_insn, 0, 7);
12808 if (bit (arm_insn_r->arm_insn, 21) /* write back */)
12809 record_buf[reg_index++] = bits (arm_insn_r->arm_insn, 16, 19);
12836 reg_rn = bits (arm_insn_r->arm_insn, 16, 19);
12838 imm_off8 = bits (arm_insn_r->arm_insn, 0, 7);
12841 if (bit (arm_insn_r->arm_insn, 23))
12864 uint32_t reg_vd = bits (arm_insn_r->arm_insn, 12, 15);
12868 reg_vd = reg_vd | (bit (arm_insn_r->arm_insn, 22) << 4);
12873 reg_vd = (reg_vd << 1) | bit (arm_insn_r->arm_insn, 22);
12895 reg_vd = bits (arm_insn_r->arm_insn, 12, 15);
12896 opc1 = bits (arm_insn_r->arm_insn, 20, 23);
12897 opc2 = bits (arm_insn_r->arm_insn, 16, 19);
12898 opc3 = bits (arm_insn_r->arm_insn, 6, 7);
12899 dp_op_sz = bit (arm_insn_r->arm_insn, 8);
12900 bit_d = bit (arm_insn_r->arm_insn, 22);
12907 if (bit (arm_insn_r->arm_insn, 10))
12909 if (bit (arm_insn_r->arm_insn, 6))
12933 if (bit (arm_insn_r->arm_insn, 10))
12935 if (bit (arm_insn_r->arm_insn, 6))
12951 if (!bit (arm_insn_r->arm_insn, 9))
12953 if (bit (arm_insn_r->arm_insn, 6))
12980 if (bit (arm_insn_r->arm_insn, 4))
12982 if (bit (arm_insn_r->arm_insn, 6))
12999 if (!bit (arm_insn_r->arm_insn, 11))
13001 if (bit (arm_insn_r->arm_insn, 6))
13035 if (!bit (arm_insn_r->arm_insn, 18))
13104 coproc = bits (arm_insn_r->arm_insn, 8, 11);
13105 op1 = bits (arm_insn_r->arm_insn, 20, 25);
13106 op1_ebit = bit (arm_insn_r->arm_insn, 20);
13140 reg_t[0] = bits (arm_insn_r->arm_insn, 12, 15);
13141 reg_t[1] = bits (arm_insn_r->arm_insn, 16, 19);
13161 arm_insn_r->opcode = bits (arm_insn_r->arm_insn, 24, 27);
13162 coproc = bits (arm_insn_r->arm_insn, 8, 11);
13163 op1_ebit = bit (arm_insn_r->arm_insn, 20);
13164 op = bit (arm_insn_r->arm_insn, 4);
13165 bits_24_25 = bits (arm_insn_r->arm_insn, 24, 25);
13174 svc_operand = (0x00ffffff & arm_insn_r->arm_insn);
13205 record_buf[0] = bits (arm_insn_r->arm_insn, 12, 15);
13237 unsigned int op1 = bits (arm_insn_r->arm_insn, 20, 25);
13290 reg_src1 = bits (thumb_insn_r->arm_insn, 0, 2);
13310 reg_src1 = bits (thumb_insn_r->arm_insn, 8, 10);
13334 opcode1 = bits (thumb_insn_r->arm_insn, 10, 12);
13336 if (bit (thumb_insn_r->arm_insn, 12))
13339 uint32_t opB = bits (thumb_insn_r->arm_insn, 9, 11);
13344 reg_src1 = bits (thumb_insn_r->arm_insn,0, 2);
13351 reg_src1 = bits (thumb_insn_r->arm_insn, 3, 5);
13352 reg_src2 = bits (thumb_insn_r->arm_insn, 6, 8);
13365 else if (bit (thumb_insn_r->arm_insn, 11))
13369 reg_src1 = bits (thumb_insn_r->arm_insn, 8, 10);
13376 opcode2 = bits (thumb_insn_r->arm_insn, 8, 9);
13377 opcode3 = bits (thumb_insn_r->arm_insn, 0, 2);
13388 record_buf[1] = (bit (thumb_insn_r->arm_insn, 7) << 3
13389 | bits (thumb_insn_r->arm_insn, 0, 2));
13396 reg_src1 = bits (thumb_insn_r->arm_insn, 0, 2);
13397 if (bit (thumb_insn_r->arm_insn, 7))
13426 opcode = bits (thumb_insn_r->arm_insn, 11, 12);
13431 reg_src1 = bits (thumb_insn_r->arm_insn, 0, 2);
13438 reg_src1 = bits (thumb_insn_r->arm_insn, 3, 5);
13439 immed_5 = bits (thumb_insn_r->arm_insn, 6, 10);
13466 opcode = bits (thumb_insn_r->arm_insn, 11, 12);
13471 reg_src1 = bits (thumb_insn_r->arm_insn, 8, 10);
13478 reg_src1 = bits (thumb_insn_r->arm_insn, 0, 2);
13485 immed_8 = bits (thumb_insn_r->arm_insn, 0, 7);
13494 immed_5 = bits (thumb_insn_r->arm_insn, 6, 10);
13495 reg_src1 = bits (thumb_insn_r->arm_insn, 3, 5);
13524 opcode = bits (thumb_insn_r->arm_insn, 11, 12);
13530 reg_src1 = bits (thumb_insn_r->arm_insn, 8, 10);
13537 uint32_t opcode2 = bits (thumb_insn_r->arm_insn, 8, 11);
13546 reg_src1 = bits (thumb_insn_r->arm_insn, 8, 10);
13558 record_buf[0] = bits (thumb_insn_r->arm_insn, 0, 2);
13567 register_bits = bits (thumb_insn_r->arm_insn, 0, 7);
13589 record_buf[0] = bits (thumb_insn_r->arm_insn, 0, 2);
13595 register_bits = bits (thumb_insn_r->arm_insn, 0, 7);
13622 thumb_insn_r->arm_insn,
13659 opcode1 = bits (thumb_insn_r->arm_insn, 8, 12);
13660 opcode2 = bits (thumb_insn_r->arm_insn, 11, 12);
13666 register_bits = bits (thumb_insn_r->arm_insn, 0, 7);
13668 reg_src1 = bits (thumb_insn_r->arm_insn, 8, 10);
13682 register_bits = bits (thumb_insn_r->arm_insn, 0, 7);
13684 reg_src1 = bits (thumb_insn_r->arm_insn, 8, 10);
13735 bits_h = bits (thumb_insn_r->arm_insn, 11, 12);
13773 reg_rn = bits (thumb2_insn_r->arm_insn, 16, 19);
13774 op = bits (thumb2_insn_r->arm_insn, 23, 24);
13778 if (bit (thumb2_insn_r->arm_insn, INSN_S_L_BIT_NUM))
13792 if (bit (thumb2_insn_r->arm_insn, INSN_S_L_BIT_NUM))
13795 register_bits = bits (thumb2_insn_r->arm_insn, 0, 15);
13811 register_bits = bits (thumb2_insn_r->arm_insn, 0, 15);
13869 op1 = bits (thumb2_insn_r->arm_insn, 23, 24);
13870 op2 = bits (thumb2_insn_r->arm_insn, 20, 21);
13871 op3 = bits (thumb2_insn_r->arm_insn, 4, 7);
13873 if (bit (thumb2_insn_r->arm_insn, INSN_S_L_BIT_NUM))
13877 reg_dest1 = bits (thumb2_insn_r->arm_insn, 12, 15);
13885 reg_dest2 = bits (thumb2_insn_r->arm_insn, 8, 11);
13892 reg_rn = bits (thumb2_insn_r->arm_insn, 16, 19);
13898 offset_imm = bits (thumb2_insn_r->arm_insn, 0, 7);
13903 reg_rd = bits (thumb2_insn_r->arm_insn, 0, 3);
13909 reg_rd = bits (thumb2_insn_r->arm_insn, 0, 3);
13939 offset_imm = bits (thumb2_insn_r->arm_insn, 0, 7);
13941 if (bit (thumb2_insn_r->arm_insn, 24))
13943 if (bit (thumb2_insn_r->arm_insn, 23))
13979 op = bits (thumb2_insn_r->arm_insn, 21, 24);
13980 reg_rd = bits (thumb2_insn_r->arm_insn, 8, 11);
14008 reg_rd = bits (thumb2_insn_r->arm_insn, 8, 11);
14027 op = bits (thumb2_insn_r->arm_insn, 20, 26);
14028 op1 = bits (thumb2_insn_r->arm_insn, 12, 14);
14029 op2 = bits (thumb2_insn_r->arm_insn, 8, 11);
14073 op1 = bits (thumb2_insn_r->arm_insn, 21, 23);
14074 op2 = bits (thumb2_insn_r->arm_insn, 6, 11);
14075 reg_rn = bits (thumb2_insn_r->arm_insn, 16, 19);
14078 if (bit (thumb2_insn_r->arm_insn, 23))
14081 offset_imm = bits (thumb2_insn_r->arm_insn, 0, 11);
14091 reg_rm = bits (thumb2_insn_r->arm_insn, 0, 3);
14093 shift_imm = bits (thumb2_insn_r->arm_insn, 4, 5);
14099 offset_imm = bits (thumb2_insn_r->arm_insn, 0, 7);
14100 if (bit (thumb2_insn_r->arm_insn, 10))
14102 if (bit (thumb2_insn_r->arm_insn, 9))
14157 reg_rt = bits (thumb2_insn_r->arm_insn, 12, 15);
14158 reg_rn = bits (thumb2_insn_r->arm_insn, 16, 19);
14182 record_buf[0] = bits (thumb2_insn_r->arm_insn, 12, 15);
14186 if ((thumb2_insn_r->arm_insn & 0xfff00900) == 0xf8500900)
14190 record_buf[2] = bits (thumb2_insn_r->arm_insn, 16, 19);
14208 opcode1 = bits (thumb2_insn_r->arm_insn, 20, 22);
14209 opcode2 = bits (thumb2_insn_r->arm_insn, 4, 7);
14215 record_buf[0] = bits (thumb2_insn_r->arm_insn, 16, 19);
14216 record_buf[1] = bits (thumb2_insn_r->arm_insn, 12, 15);
14223 record_buf[0] = bits (thumb2_insn_r->arm_insn, 16, 19);
14224 record_buf[1] = bits (thumb2_insn_r->arm_insn, 12, 15);
14241 if (bit (thumb2_insn_r->arm_insn, 25))
14259 l_bit = bit (thumb2_insn_r->arm_insn, 21);
14260 a_bit = bit (thumb2_insn_r->arm_insn, 23);
14261 b_bits = bits (thumb2_insn_r->arm_insn, 8, 11);
14262 reg_rn = bits (thumb2_insn_r->arm_insn, 16, 19);
14263 reg_vd = bits (thumb2_insn_r->arm_insn, 12, 15);
14264 reg_vd = (bit (thumb2_insn_r->arm_insn, 22) << 4) | reg_vd;
14265 f_ebytes = (1 << bits (thumb2_insn_r->arm_insn, 6, 7));
14354 uint8_t bft_size = bits (thumb2_insn_r->arm_insn, 10, 11);
14422 if (bits (thumb2_insn_r->arm_insn, 0, 3) != 15)
14442 op = bit (thumb2_insn_r->arm_insn, 15);
14443 op1 = bits (thumb2_insn_r->arm_insn, 27, 28);
14444 op2 = bits (thumb2_insn_r->arm_insn, 20, 26);
14609 arm_record->arm_insn
14614 arm_record->cond = bits (arm_record->arm_insn, 28, 31);
14615 insn_id = bits (arm_record->arm_insn, 25, 27);
14635 insn_id = bits (arm_record->arm_insn, 13, 15);
14649 arm_record->arm_insn
14650 = (arm_record->arm_insn >> 16) | (arm_record->arm_insn << 16);
14893 arm_record.arm_insn
14909 insn_id = bits (arm_record.arm_insn, 11, 15);
Indexes created Wed May 06 00:24:28 UTC 2026