Lines Matching refs:sse
481 /* Provide dummy values for the SSE registers. */
580 /* We made an unfortunate choice in putting %mxcsr after the SSE
592 floating-point or SSE register value from *FXSAVE. This function
674 /* Fill register REGNUM (if it is a floating-point or SSE register) in
1043 sse = 0x2,
1051 all = x87 | sse | avxh | avx512_k | avx512_zmm0_h | avx512_zmm16_h
1084 regclass = sse;
1160 case sse:
1397 AVX or SSE features are enabled. */
1432 sse = 0x4,
1440 all = x87 | sse | avxh | avx512_k | avx512_zmm0_h | avx512_zmm16_h
1472 regclass = sse;
1551 or SSE is enabled, so only clear it if both of those features
1674 /* Check if any SSE registers are changed. */
1695 /* Now, we need to mark one of either SSE of AVX as enabled.
1698 it at that, otherwise we pick SSE. */
1801 case sse:
1802 /* This is an SSE register. */
1830 to see if either of AVX or SSE are already enabled.
1833 we'll attribute this change to the SSE feature. */
Indexes created Tue Mar 17 00:23:13 UTC 2026