1 /* $NetBSD: iyonix_pci.c,v 1.2 2020/06/17 07:01:02 thorpej Exp $ */ 2 3 /* 4 * Copyright (c) 2001, 2002 Wasabi Systems, Inc. 5 * All rights reserved. 6 * 7 * Based on code written by Jason R. Thorpe for Wasabi Systems, Inc. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed for the NetBSD Project by 20 * Wasabi Systems, Inc. 21 * 4. The name of Wasabi Systems, Inc. may not be used to endorse 22 * or promote products derived from this software without specific prior 23 * written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND 26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC 29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 35 * POSSIBILITY OF SUCH DAMAGE. 36 */ 37 38 /* 39 * Iyonix PCI interrupt support. 40 */ 41 42 #include <sys/cdefs.h> 43 __KERNEL_RCSID(0, "$NetBSD: iyonix_pci.c,v 1.2 2020/06/17 07:01:02 thorpej Exp $"); 44 45 #include <sys/param.h> 46 #include <sys/systm.h> 47 #include <sys/device.h> 48 49 #include <machine/autoconf.h> 50 #include <sys/bus.h> 51 52 #include <evbarm/iyonix/iyonixreg.h> 53 #include <evbarm/iyonix/iyonixvar.h> 54 55 #include <arm/xscale/i80321reg.h> 56 #include <arm/xscale/i80321var.h> 57 58 #include <dev/pci/pcidevs.h> 59 #include <dev/pci/ppbreg.h> 60 61 #include <dev/pci/pciconf.h> 62 63 int iyonix_pci_intr_map(const struct pci_attach_args *, 64 pci_intr_handle_t *); 65 const char *iyonix_pci_intr_string(void *, pci_intr_handle_t, char *, size_t); 66 const struct evcnt *iyonix_pci_intr_evcnt(void *, pci_intr_handle_t); 67 void *iyonix_pci_intr_establish(void *, pci_intr_handle_t, 68 int, int (*func)(void *), void *, const char *); 69 void iyonix_pci_intr_disestablish(void *, void *); 70 void pci_conf_write_byte(pci_chipset_tag_t, pcitag_t, int, int); 71 int pci_conf_read_byte(pci_chipset_tag_t, pcitag_t, int); 72 int iyonix_pci_conf_hook(void *, int, int, int, pcireg_t); 73 74 void 75 iyonix_pci_init(pci_chipset_tag_t pc, void *cookie) 76 { 77 78 pc->pc_intr_v = cookie; /* the i80321 softc */ 79 pc->pc_intr_map = iyonix_pci_intr_map; 80 pc->pc_intr_string = iyonix_pci_intr_string; 81 pc->pc_intr_evcnt = iyonix_pci_intr_evcnt; 82 pc->pc_intr_establish = iyonix_pci_intr_establish; 83 pc->pc_intr_disestablish = iyonix_pci_intr_disestablish; 84 pc->pc_conf_hook = iyonix_pci_conf_hook; 85 } 86 87 int 88 iyonix_pci_intr_map(const struct pci_attach_args *pa, pci_intr_handle_t *ihp) 89 { 90 struct i80321_softc *sc = pa->pa_pc->pc_intr_v; 91 int b, d, f; 92 uint32_t busno; 93 94 busno = bus_space_read_4(sc->sc_st, sc->sc_atu_sh, ATU_PCIXSR); 95 busno = PCIXSR_BUSNO(busno); 96 if (busno == 0xff) 97 busno = 0; 98 99 pci_decompose_tag(pa->pa_pc, pa->pa_intrtag, &b, &d, &f); 100 101 /* No mappings for devices not on our bus. */ 102 if (b != busno) 103 goto no_mapping; 104 105 /* 106 * XXX We currently deal only with the southbridge and with 107 * regular PCI. IOC devices may need further attention. 108 */ 109 110 /* Devices on the southbridge are all routed through xint 1 */ 111 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_ALI) { 112 switch (PCI_PRODUCT(pa->pa_id)) { 113 case PCI_PRODUCT_ALI_M1543: /* Southbridge */ 114 case PCI_PRODUCT_ALI_M5229: /* ATA */ 115 case PCI_PRODUCT_ALI_M5237: /* ohci */ 116 case PCI_PRODUCT_ALI_M5257: /* Modem */ 117 case PCI_PRODUCT_ALI_M5451: /* AC97 */ 118 case PCI_PRODUCT_ALI_M7101: /* PMC */ 119 *ihp = ICU_INT_XINT(1); 120 return (0); 121 } 122 } 123 124 /* Route other interrupts with default swizzling rule */ 125 *ihp = ICU_INT_XINT((d + pa->pa_intrpin - 1) % 4); 126 return 0; 127 128 no_mapping: 129 printf("iyonix_pci_intr_map: no mapping for %d/%d/%d\n", 130 pa->pa_bus, pa->pa_device, pa->pa_function); 131 return (1); 132 } 133 134 const char * 135 iyonix_pci_intr_string(void *v, pci_intr_handle_t ih, char *buf, size_t len) 136 { 137 138 strlcpy(buf, i80321_irqnames[ih], len); 139 return buf; 140 } 141 142 const struct evcnt * 143 iyonix_pci_intr_evcnt(void *v, pci_intr_handle_t ih) 144 { 145 146 /* XXX For now. */ 147 return (NULL); 148 } 149 150 void * 151 iyonix_pci_intr_establish(void *v, pci_intr_handle_t ih, int ipl, 152 int (*func)(void *), void *arg, const char *xname) 153 { 154 155 return (i80321_intr_establish(ih, ipl, func, arg)); 156 } 157 158 void 159 iyonix_pci_intr_disestablish(void *v, void *cookie) 160 { 161 162 i80321_intr_disestablish(cookie); 163 } 164 165 void 166 pci_conf_write_byte(pci_chipset_tag_t pc, pcitag_t tag, int addr, int value) 167 { 168 int temp; 169 temp = pci_conf_read(pc, tag, addr&~3); 170 temp = temp & ~(0xff << ((addr%4) * 8)); 171 temp = temp | (value << ((addr%4) * 8)); 172 pci_conf_write(pc, tag, addr&~3, temp); 173 } 174 175 int 176 pci_conf_read_byte(pci_chipset_tag_t pc, pcitag_t tag, int addr) 177 { 178 int temp; 179 temp = pci_conf_read(pc, tag, addr&~3); 180 temp = temp >> ((addr%4) * 8); 181 temp = temp & 0xff; 182 return temp; 183 } 184 185 int 186 iyonix_pci_conf_hook(void *v, int bus, int dev, int func, pcireg_t id) 187 { 188 189 /* 190 * We need to disable devices in the Southbridge, and as 191 * we have all the tags we need at this point, this is 192 * where we do it. 193 */ 194 if (PCI_VENDOR(id) == PCI_VENDOR_ALI && 195 PCI_PRODUCT(id) == PCI_PRODUCT_ALI_M1543) 196 { 197 pcitag_t tag; 198 int status; 199 pci_chipset_tag_t pc = (pci_chipset_tag_t) v; 200 201 tag = pci_make_tag(pc, bus, dev, func); 202 203 /* Undocumented magic */ 204 205 /* Disable USB */ 206 pci_conf_write_byte(pc, tag, 0x53, 0x40); 207 pci_conf_write_byte(pc, tag, 0x52, 0x00); 208 209 status = pci_conf_read_byte(pc, tag, 0x7e); 210 pci_conf_write_byte(pc, tag, 0x7e, status & ~0x80); 211 212 /* Disable modem */ 213 pci_conf_write_byte(pc, tag, 0x77, 1 << 6); 214 215 /* Disable SCI */ 216 pci_conf_write_byte(pc, tag, 0x78, 1 << 7); 217 } 218 219 return (PCI_CONF_DEFAULT); 220 } 221
Indexes created Sun Oct 25 00:26:45 UTC 2026