Lines Matching refs:IMMEDIATE
468 immediate operand to ease the operand encoding/decoding and qualifier
1538 /* The third operand is an index (e.g. immediate or bit)
1546 /* The third operand is an index (e.g. immediate or bit)
3246 /* Add/subtract (immediate). */
3373 /* AdvSIMD modified immediate. */
3620 /* AdvSIMD shift by immediate. */
3849 /* AdvSIMD scalar shift by immediate. */
3897 /* Unconditional branch (immediate). */
3918 /* Compare & branch (immediate). */
3921 /* Conditional branch (immediate). */
3923 /* Conditional compare (immediate). */
4151 /* Floating-point immediate. */
4157 /* Load/store register (immediate indexed). */
4178 /* Load/store register (unsigned immediate). */
4214 /* Load/store register (unscaled immediate). */
4228 /* Load/store register (scaled signed immediate). */
4296 /* Logical (immediate). */
4525 /* Move wide (immediate). */
4621 /* Test & branch (immediate). */
6985 Y(IMMEDIATE, imm, "CRn", 0, F(FLD_CRn), \
6987 Y(IMMEDIATE, imm, "CRm", 0, F(FLD_CRm), \
6989 Y(IMMEDIATE, imm, "IDX", 0, F(FLD_imm4_11), \
6990 "an immediate as the index of the least significant byte") \
6991 Y(IMMEDIATE, imm, "MASK", 0, F(FLD_imm4_0), \
6992 "an immediate as the index of the least significant byte") \
6993 Y(IMMEDIATE, advsimd_imm_shift, "IMM_VLSL", 0, F(), \
6995 Y(IMMEDIATE, advsimd_imm_shift, "IMM_VLSR", 0, F(), \
6997 Y(IMMEDIATE, advsimd_imm_modified, "SIMD_IMM", 0, F(), \
6998 "an immediate") \
6999 Y(IMMEDIATE, advsimd_imm_modified, "SIMD_IMM_SFT", 0, F(), \
7000 "an 8-bit unsigned immediate with optional shift") \
7001 Y(IMMEDIATE, advsimd_imm_modified, "SIMD_FPIMM", 0, F(), \
7003 X(IMMEDIATE, 0, ext_shll_imm, "SHLL_IMM", 0, F(), \
7004 "an immediate shift amount of 8, 16 or 32") \
7005 X(IMMEDIATE, 0, 0, "IMM0", 0, F(), "0") \
7006 X(IMMEDIATE, 0, 0, "FPIMM0", 0, F(), "0.0") \
7007 Y(IMMEDIATE, fpimm, "FPIMM", 0, F(FLD_imm8), \
7009 Y(IMMEDIATE, imm, "IMMR", 0, F(FLD_immr), \
7011 Y(IMMEDIATE, imm, "IMMS", 0, F(FLD_imm6_10), \
7013 Y(IMMEDIATE, imm, "WIDTH", 0, F(FLD_imm6_10), \
7015 Y(IMMEDIATE, imm, "IMM", 0, F(FLD_imm6_10), "an immediate") \
7016 Y(IMMEDIATE, imm, "IMM_2", 0, F(FLD_imm6_15), "an immediate") \
7017 Y(IMMEDIATE, imm, "UIMM3_OP1", 0, F(FLD_op1), \
7018 "a 3-bit unsigned immediate") \
7019 Y(IMMEDIATE, imm, "UIMM3_OP2", 0, F(FLD_op2), \
7020 "a 3-bit unsigned immediate") \
7021 Y(IMMEDIATE, imm, "UIMM4", 0, F(FLD_CRm), \
7022 "a 4-bit unsigned immediate") \
7023 Y(IMMEDIATE, imm, "UIMM4_ADDG", 0, F(FLD_imm4_10), \
7025 Y(IMMEDIATE, imm, "UIMM7", 0, F(FLD_CRm, FLD_op2), \
7026 "a 7-bit unsigned immediate") \
7027 Y(IMMEDIATE, imm, "UIMM10", OPD_F_SHIFT_BY_4, F(FLD_immr), \
7029 Y(IMMEDIATE, imm, "BIT_NUM", 0, F(FLD_b5, FLD_b40), \
7031 Y(IMMEDIATE, imm, "EXCEPTION", 0, F(FLD_imm16_5), \
7032 "a 16-bit unsigned immediate") \
7033 Y(IMMEDIATE, imm, "UNDEFINED", 0, F(FLD_imm16_0), \
7034 "a 16-bit unsigned immediate") \
7035 Y(IMMEDIATE, imm, "CCMP_IMM", 0, F(FLD_imm5), \
7036 "a 5-bit unsigned immediate") \
7037 Y(IMMEDIATE, imm, "SIMM5", OPD_F_SEXT, F(FLD_imm5), \
7038 "a 5-bit signed immediate") \
7039 Y(IMMEDIATE, imm, "NZCV", 0, F(FLD_nzcv), \
7041 Y(IMMEDIATE, limm, "LIMM", 0, F(FLD_N,FLD_immr,FLD_imms), \
7042 "Logical immediate") \
7043 Y(IMMEDIATE, aimm, "AIMM", 0, F(FLD_shift,FLD_imm12), \
7044 "a 12-bit unsigned immediate with optional left shift of 12 bits")\
7045 Y(IMMEDIATE, imm_half, "HALF", 0, F(FLD_imm16_5), \
7046 "a 16-bit immediate with optional left shift") \
7047 Y(IMMEDIATE, fbits, "FBITS", 0, F(FLD_scale), \
7049 X(IMMEDIATE, 0, 0, "IMM_MOV", 0, F(), "an immediate") \
7050 Y(IMMEDIATE, imm_rotate2, "IMM_ROT1", 0, F(FLD_rotate1), \
7052 Y(IMMEDIATE, imm_rotate2, "IMM_ROT2", 0, F(FLD_rotate2), \
7054 Y(IMMEDIATE, imm_rotate1, "IMM_ROT3", 0, F(FLD_rotate3), \
7074 "an address with 7-bit signed immediate offset") \
7076 "an address with 9-bit signed immediate offset") \
7078 "an address with 9-bit negative or unaligned immediate offset") \
7080 "an address with an optional 10-bit scaled, signed immediate offset") \
7082 "an address with 11-bit signed immediate (multiple of 16) offset")\
7084 "an address with scaled, unsigned immediate offset") \
7086 "an address with 13-bit signed immediate (multiple of 16) offset")\
7090 "an address with an optional 8-bit signed immediate offset") \
7092 "a post-indexed address with immediate or register increment") \
7112 "the DSB nXS option qualifier name SY, ISH, NSH, OSH or an optional 5-bit unsigned immediate") \
7114 "the ISB option name SY or an optional 4-bit unsigned immediate") \
7253 Y(IMMEDIATE, sve_aimm, "SVE_AIMM", 0, F(FLD_SVE_imm9), \
7255 Y(IMMEDIATE, sve_asimm, "SVE_ASIMM", 0, F(FLD_SVE_imm9), \
7257 Y(IMMEDIATE, fpimm, "SVE_FPIMM8", 0, F(FLD_SVE_imm8), \
7258 "an 8-bit floating-point immediate") \
7259 Y(IMMEDIATE, sve_float_half_one, "SVE_I1_HALF_ONE", 0, \
7261 Y(IMMEDIATE, sve_float_half_two, "SVE_I1_HALF_TWO", 0, \
7263 Y(IMMEDIATE, sve_float_zero_one, "SVE_I1_ZERO_ONE", 0, \
7265 Y(IMMEDIATE, imm_rotate1, "SVE_IMM_ROT1", 0, F(FLD_SVE_rot1), \
7267 Y(IMMEDIATE, imm_rotate2, "SVE_IMM_ROT2", 0, F(FLD_SVE_rot2), \
7269 Y(IMMEDIATE, imm_rotate1, "SVE_IMM_ROT3", 0, F(FLD_SVE_rot3), \
7271 Y(IMMEDIATE, inv_limm, "SVE_INV_LIMM", 0, \
7273 "an inverted 13-bit logical immediate") \
7274 Y(IMMEDIATE, limm, "SVE_LIMM", 0, \
7276 "a 13-bit logical immediate") \
7277 Y(IMMEDIATE, sve_limm_mov, "SVE_LIMM_MOV", 0, \
7279 "a 13-bit logical move immediate") \
7280 Y(IMMEDIATE, imm, "SVE_PATTERN", 0, F(FLD_SVE_pattern), \
7282 Y(IMMEDIATE, sve_scale, "SVE_PATTERN_SCALED", 0, \
7284 Y(IMMEDIATE, imm, "SVE_PRFOP", 0, F(FLD_SVE_prfop), \
7314 Y(IMMEDIATE, sve_shlimm, "SVE_SHLIMM_PRED", 0, \
7315 F(FLD_SVE_tszh,FLD_SVE_imm5), "a shift-left immediate operand") \
7316 Y(IMMEDIATE, sve_shlimm, "SVE_SHLIMM_UNPRED", 0, \
7317 F(FLD_SVE_tszh,FLD_imm5), "a shift-left immediate operand") \
7318 Y(IMMEDIATE, sve_shlimm, "SVE_SHLIMM_UNPRED_22", 0, \
7320 "a shift-left immediate operand") \
7321 Y(IMMEDIATE, sve_shrimm, "SVE_SHRIMM_PRED", 1 << OPD_F_OD_LSB, \
7322 F(FLD_SVE_tszh,FLD_SVE_imm5), "a shift-right immediate operand") \
7323 Y(IMMEDIATE, sve_shrimm, "SVE_SHRIMM_UNPRED", 1 << OPD_F_OD_LSB, \
7324 F(FLD_SVE_tszh,FLD_imm5), "a shift-right immediate operand") \
7325 Y(IMMEDIATE, sve_shrimm, "SVE_SHRIMM_UNPRED_22", 2 << OPD_F_OD_LSB, \
7327 "a shift-right immediate operand") \
7328 Y(IMMEDIATE, imm, "SVE_SIMM5", OPD_F_SEXT, F(FLD_SVE_imm5), \
7329 "a 5-bit signed immediate") \
7330 Y(IMMEDIATE, imm, "SVE_SIMM5B", OPD_F_SEXT, F(FLD_SVE_imm5b), \
7331 "a 5-bit signed immediate") \
7332 Y(IMMEDIATE, imm, "SVE_SIMM6", OPD_F_SEXT, F(FLD_SVE_imms), \
7333 "a 6-bit signed immediate") \
7334 Y(IMMEDIATE, imm, "SVE_SIMM8", OPD_F_SEXT, F(FLD_SVE_imm8), \
7335 "an 8-bit signed immediate") \
7336 Y(IMMEDIATE, imm, "SVE_UIMM3", 0, F(FLD_SVE_imm3), \
7337 "a 3-bit unsigned immediate") \
7338 Y(IMMEDIATE, imm, "SVE_UIMM7", 0, F(FLD_SVE_imm7), \
7339 "a 7-bit unsigned immediate") \
7340 Y(IMMEDIATE, imm, "SVE_UIMM8", 0, F(FLD_SVE_imm8), \
7341 "an 8-bit unsigned immediate") \
7342 Y(IMMEDIATE, imm, "SVE_UIMM8_53", 0, F(FLD_imm5,FLD_imm3_10), \
7343 "an 8-bit unsigned immediate") \
7344 Y(IMMEDIATE, imm, "SVE_UIMM4", 0, F(FLD_SVE_imm4), \
7345 "a 4-bit unsigned immediate") \
7510 Y(IMMEDIATE, plain_shrimm, "SME_SHRIMM4", 0, F(FLD_SVE_imm4), \
7511 "a shift-right immediate operand") \
7512 Y(IMMEDIATE, sve_shrimm, "SME_SHRIMM5", 1 << OPD_F_OD_LSB, \
7513 F(FLD_SVE_tszh,FLD_SVE_imm5b), "a shift-right immediate operand") \
7579 Y(IMMEDIATE, imm, "SME_VLxN_10", 0, F(FLD_SME_VL_10), \
7581 Y(IMMEDIATE, imm, "SME_VLxN_13", 0, F(FLD_SME_VL_13), \
7584 Y(IMMEDIATE, imm, "SME_ZT0_INDEX", OPD_F_SHIFT_BY_3, \
7586 Y(IMMEDIATE, imm, "SME_ZT0_INDEX2_12", 0, \
7589 Y(IMMEDIATE, imm, "TME_UIMM16", 0, F(FLD_imm16_5), \
7590 "a 16-bit unsigned immediate for TME tcancel") \
7592 "an indexed SM3 vector immediate") \
7601 Y(IMMEDIATE, imm, "CSSC_SIMM8", OPD_F_SEXT, F(FLD_CSSC_imm8), \
7602 "an 8-bit signed immediate") \
7603 Y(IMMEDIATE, imm, "CSSC_UIMM8", 0, F(FLD_CSSC_imm8), \
7604 "an 8-bit unsigned immediate") \
7618 "an address with an optional 8-bit signed immediate offset")
Indexes created Tue Aug 18 00:25:06 UTC 2026