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Lines Matching defs:mmu

1 /* Blackfin Memory Management Unit (MMU) model.
100   struct bfin_mmu *mmu = hw_data (me);
111   mmr_off = addr - mmu->base;
112   valuep = (void *)((uintptr_t)mmu + mmr_base() + mmr_off);
147 	  bu32 sram_addr = mmu->sram_base_address   |
160 	    sim_write (hw_system (me), sram_addr, mmu->dtest_data, 8);
162 	    sim_read (hw_system (me), sram_addr, mmu->dtest_data, 8);
177   struct bfin_mmu *mmu = hw_data (me);
185   mmr_off = addr - mmu->base;
186   valuep = (void *)((uintptr_t)mmu + mmr_base() + mmr_off);
220 attach_bfin_mmu_regs (struct hw *me, struct bfin_mmu *mmu)
244   mmu->base = attach_address;
250   struct bfin_mmu *mmu;
252   mmu = HW_ZALLOC (me, struct bfin_mmu);
254   set_hw_data (me, mmu);
258   attach_bfin_mmu_regs (me, mmu);
260   /* Initialize the MMU.  */
261   mmu->sram_base_address = 0xff800000 - 0;
263   mmu->dmem_control = 0x00000001;
264   mmu->imem_control = 0x00000001;
284   { {"mmu-skip-cplbs", no_argument, NULL, OPTION_MMU_SKIP_TABLES },
302       sim_io_eprintf (sd, "Unknown Blackfin MMU option %d\n", opt);
318 #define MMU_STATE(cpu) DV_STATE_CACHED (cpu, mmu)
321 _mmu_log_ifault (SIM_CPU *cpu, struct bfin_mmu *mmu, bu32 pc, bool supv)
323   mmu->icplb_fault_addr = pc;
324   mmu->icplb_fault_status = supv << 17;
334 _mmu_log_fault (SIM_CPU *cpu, struct bfin_mmu *mmu, bu32 addr, bool write,
340   if (!mmu)
343   fault_status = inst ? &mmu->icplb_fault_status : &mmu->dcplb_fault_status;
344   fault_addr = inst ? &mmu->icplb_fault_addr : &mmu->dcplb_fault_addr;
347     _mmu_log_ifault (cpu, mmu, PCREG, supv);
359 _mmu_process_fault (SIM_CPU *cpu, struct bfin_mmu *mmu, bu32 addr, bool write,
369   else if (!mmu)
378   _mmu_log_fault (cpu, mmu, addr, write, inst, miss, supv, dag1, 0);
387   struct bfin_mmu *mmu;
390     mmu = NULL;
392     mmu = MMU_STATE (cpu);
394   _mmu_process_fault (cpu, mmu, addr, write, inst, unaligned, miss,
455   struct bfin_mmu *mmu;
473   mmu = MMU_STATE (cpu);
474   mem_control = inst ? &mmu->imem_control : &mmu->dmem_control;
475   cplb_addr = inst ? &mmu->icplb_addr[0] : &mmu->dcplb_addr[0];
476   cplb_data = inst ? &mmu->icplb_data[0] : &mmu->dcplb_data[0];
548   _mmu_log_fault (cpu, mmu, addr, write, inst, hits == 0, supv, dag1, faults);